WO2002056654A1 - Terminal for chip and fabricating method thereof - Google Patents

Terminal for chip and fabricating method thereof Download PDF

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Publication number
WO2002056654A1
WO2002056654A1 PCT/KR2002/000061 KR0200061W WO02056654A1 WO 2002056654 A1 WO2002056654 A1 WO 2002056654A1 KR 0200061 W KR0200061 W KR 0200061W WO 02056654 A1 WO02056654 A1 WO 02056654A1
Authority
WO
WIPO (PCT)
Prior art keywords
chip
termination electrode
termination
tin
layer
Prior art date
Application number
PCT/KR2002/000061
Other languages
French (fr)
Inventor
Duk-Hee Kim
In-Kil Park
Original Assignee
Innochips Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Innochips Technology filed Critical Innochips Technology
Publication of WO2002056654A1 publication Critical patent/WO2002056654A1/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/228—Terminals
    • H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C1/00—Details
    • H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
    • H01C1/1406—Terminals or electrodes formed on resistive elements having positive temperature coefficient
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C1/00—Details
    • H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
    • H01C1/1413—Terminals or electrodes formed on resistive elements having negative temperature coefficient
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
    • H01C17/281—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals by thick film techniques
    • H01C17/283—Precursor compositions therefor, e.g. pastes, inks, glass frits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers

Definitions

  • the present invention relates to an termination electrode structure for chips and fabricating method therefore, and more particularly to an termination electrode structure for chips and fabricating method therefore adapted to prevent leaching phenomenon at termination electrodes when chip component is soldered to a printed circuit board and to specially design an termination electrode of the chip component for excellent solderability.
  • surface-mounting chip component is formed at both ends of a chip with both termination electrodes, where the termination electrodes of the chip component are soldered to a Printed Circuit Board (PCB) using soldering paste.
  • PCB Printed Circuit Board
  • the termination electrodes are mainly formed by dipping conductive materials thereon.
  • a layer body 12 formed with an internal electrode 11 is made and an termination electrode 13 is formed using paste as shown in Figure 1.
  • a nickel (Ni) layer 14 must be plated on which tin (Sn) or an alloy thereof (Sn-Pb) 15 should be plated in case the termination electrode is formed only with pure silver (Ag).
  • soldering paste is an alloy of tin (Sn-Pb)
  • the termination electrode must be plated with tin or a tin alloy (Sn-Pb) layer thereof to allow the soldering paste to get mutually fused for achieving a firm solderability, and if no nickel (Ni) layer is plated between tin, an alloy (Sn-Pb) layer thereof and silver (Ag), the silver (Ag) which is material for the termination electrode is simultaneously fused during soldering to be moved to a PCB substrate and to generate the so-called leaching phenomenon where electrodes are eaten away.
  • the nickel (Ni) layer is simultaneously melted with the soldering paste at outer tin (Sn) or an alloy (Sn-Pb) layer thereof to be fused with inner silver (Ag) when the chip component forms a firm solidification with the PCB substrate, thereby preventing being eaten away.
  • the termination electrode plated with nickel (Ni), tin (Sn) or an alloy thereof (Sn-Pb) serve to improve solderability of chip component to become a preferred structure by most of the chip parts suppliers, and most of the set suppliers also require the plated chip shown in Figure 1.
  • a chip component is plated by electrolytic method by which only the termination electrodes are selectively plated as the termination electrodes are conductive.
  • the method utilizes a principle of electrolytic plating where conductive components are only plated.
  • a nickel layer, a tin layer or an alloy (Sn-Pb) layer thereof is plated on termination electrode of chip component, sintered ceramic body as well as the termination electrode are partially plated due to low resistance at body part of chip component comprising the sintered ceramic body.
  • a so-called plate spreading phenomenon greatly occurs when a nickel (Ni) layer is plated, while the spread phenomenon is relatively less generated when a tin (Sn) layer or an alloy layer (Sn-Pb) thereof is plated.
  • the tin (Sn) layer or the alloy (Sn-Pb) layer thereof is easily plated on the nickel (Ni) - plated spread layer where spread has been already done.
  • silver (Ag) added by a small quantity of palladium (Pd) or platinum (Pt) is used for an termination electrode 23 of chip component.
  • the silver (Ag) mixed with a small amount of palladium (Pd) or platinum (Pt) is used for the termination electrode, it is possible to mount the chip component to a PCB substrate without separate plating process of nickel (Ni) or tin (Sn).
  • silver (Ag) when silver (Ag) is added by a small quantity of palladium (Pd) or platinum (Pt), silver (Ag) reacts to soldering but palladium (Pd) or platinum (Pt) prevents the silver (Ag) from leaching, although the termination electrode achieves less firm solidification.
  • solderability can be expected such that soldering paste 35 on a land 34 is not fully melted with the termination electrode 32, as shown in Figure 3, thereby resulting in the PCB substrate to achieve a poor solidification.
  • the present invention is disclosed to solve the afore-said problems and it is an object of the present invention to provide an termination electrode structure for chips and fabricating method therefore adapted to adjust material and structure of termination electrode to eliminate the so-called leaching phenomenon of silver (Ag) at the termination electrode, thereby achieving a good solderability.
  • an termination electrode structure for chips and fabricating method therefore wherein an termination electrode electrically connected to an internal electrode is double formed with an silver (Ag) layer added by palladium (Pd) or platinum (Pt) and a tin (Sn) layer plated on the silver (Ag) layer or a tin alloy (Sn-Pb) layer.
  • Figure 1 is a schematic representation of an termination electrode on plated chip component according to the prior art
  • Figure 2 is a schematic representation of an termination electrode on non- plated chip component according to the prior art
  • Figure 3 is a schematic representation of chip component showing a poor solderability
  • Figure 4 is a schematic representation of an termination electrode on chip component according to the present invention.
  • raw material of powder for making a stacked chip varistor element that is being sold on the market for industrial uses.
  • a desired mixture where ZnO powder is added by Bi 2 0 3 , Pr On, CoO, MnO and the like is milled by ball mill for 24 hour via water or alcohol as solvent to prepare raw material of powder.
  • a PVB-based binder of about 8% in weight of the powder is dissolved in a toluene/alcohol-based solvent and put together with the powder.
  • the mixture is milled by small ball mill for about 24 hours and blended to make slurry, which is made into green sheets 41 in a desired thickness by a method like doctor blade or the like.
  • an internal electrode 42 is screen-printed on the fabricated sheet.
  • paste of Ag, Pt, Pd or the like is screen printed on the green sheet to form a predetermined pattern of internal electrode.
  • Green sheets screen-printed with the internal electrode are stacked in as many sheets as desired and in order to thoroughly eliminate a variety of binder components in the compressed stacked structure 43, the stacked structure thus constructed will be backed out by heating at about 400 degrees centigrade for approximately for 6 hours and then plasticized at an increased, higher plasticization temperature.
  • An termination electrode 44 connecting with the internal electrode at the stacked structure is formed at outside of the sintered stacked structure 43 to fabricate varistor elements.
  • both tip ends of chip varistor stacked structure are dipped into a bed coated with (Ag-Pd system plus additives), (Ag-Pt system plus additives) or (Ag-Pd-Pt system plus additives) to form in a dumbbell shape and fired to form a first termination electrode at an appropriate temperature, the first termination electrode is plated with tin (Sn) layer or an alloy (Sn-Pb) layer thereof by utilizing the electrolytic method to fabricate a surface-mounted chip varistor, as illustrated in Figure 2.
  • termination electrodes may be used for fabrication of termination electrodes of various chip components besides the above exemplified elements. Particularly, plate spreading can be prevented in chip component of low resistance and termination electrodes having an excellent solderability may be fabricated.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Thermistors And Varistors (AREA)

Abstract

A termination electrode structure for chips and fabricating method therefore, and nore particularly to a termination electrode structure for chips and fabricating method therefore adapted to prevent leaching phenomenon at termination electrodes when chip component is soldered to a printed circuit board and to specially design a termination electrode of the chip component for excelelnt solderability, wherein (Ag-Pd system plus additives), (Ag-Pt system plus additives) or (Ag-Pd-Pt system plus additives) is used as termination electrode material of chip component to form electrodes, on which tin (Sn) or a tin alloy (Sn-Pb) thereof is plated to fabricate the termination electrode in double stack, such that so-called leaching phenomenon at termination electrode material can be eliminated for excellent solderability and termination electrodes of chip component free from plating spreading phenomenon occuring in the process of plating can be fabricated.

Description

TERMINAL FOR CHIP AND FABRICATING METHOD THEREOF
BACKGROUND OF THE INVENTION
FIELD OF THE INVENTION
The present invention relates to an termination electrode structure for chips and fabricating method therefore, and more particularly to an termination electrode structure for chips and fabricating method therefore adapted to prevent leaching phenomenon at termination electrodes when chip component is soldered to a printed circuit board and to specially design an termination electrode of the chip component for excellent solderability.
DESCRIPTION OF THE PRIOR ARTS
Generally, surface-mounting chip component is formed at both ends of a chip with both termination electrodes, where the termination electrodes of the chip component are soldered to a Printed Circuit Board (PCB) using soldering paste.
The termination electrodes are mainly formed by dipping conductive materials thereon. In case of using silver (Ag) as termination electrode, a layer body 12 formed with an internal electrode 11 is made and an termination electrode 13 is formed using paste as shown in Figure 1.
At this time, in order to prevent the so-called leaching phenomenon occurring when the chip component formed with an termination electrode is soldered to a substrate, a nickel (Ni) layer 14 must be plated on which tin (Sn) or an alloy thereof (Sn-Pb) 15 should be plated in case the termination electrode is formed only with pure silver (Ag).
This is because, as component of soldering paste is an alloy of tin (Sn-Pb), the termination electrode must be plated with tin or a tin alloy (Sn-Pb) layer thereof to allow the soldering paste to get mutually fused for achieving a firm solderability, and if no nickel (Ni) layer is plated between tin, an alloy (Sn-Pb) layer thereof and silver (Ag), the silver (Ag) which is material for the termination electrode is simultaneously fused during soldering to be moved to a PCB substrate and to generate the so-called leaching phenomenon where electrodes are eaten away.
In other words, the nickel (Ni) layer is simultaneously melted with the soldering paste at outer tin (Sn) or an alloy (Sn-Pb) layer thereof to be fused with inner silver (Ag) when the chip component forms a firm solidification with the PCB substrate, thereby preventing being eaten away.
The termination electrode plated with nickel (Ni), tin (Sn) or an alloy thereof (Sn-Pb) serve to improve solderability of chip component to become a preferred structure by most of the chip parts suppliers, and most of the set suppliers also require the plated chip shown in Figure 1.
A chip component is plated by electrolytic method by which only the termination electrodes are selectively plated as the termination electrodes are conductive. In other words, the method utilizes a principle of electrolytic plating where conductive components are only plated. However, in case of such materials as varistor and the like having a lower resistance, there is a problem in that, when a nickel layer, a tin layer or an alloy (Sn-Pb) layer thereof is plated on termination electrode of chip component, sintered ceramic body as well as the termination electrode are partially plated due to low resistance at body part of chip component comprising the sintered ceramic body. A so-called plate spreading phenomenon greatly occurs when a nickel (Ni) layer is plated, while the spread phenomenon is relatively less generated when a tin (Sn) layer or an alloy layer (Sn-Pb) thereof is plated. However, the tin (Sn) layer or the alloy (Sn-Pb) layer thereof is easily plated on the nickel (Ni) - plated spread layer where spread has been already done.
In case of chip component, when plated layer is formed on surface of sintered ceramic body between termination electrodes as well as on the termination electrodes, electrical defects occur.
In order to cope with the plating-spread phenomenon occurring in the plating of termination electrodes, component suppliers, particularly, chip varistor suppliers have attempted to plate in various methods but they still have encountered problems such as decreased productivity.
Furthermore, in another prior art as shown in Figure 2, silver (Ag) added by a small quantity of palladium (Pd) or platinum (Pt) is used for an termination electrode 23 of chip component. When the silver (Ag) mixed with a small amount of palladium (Pd) or platinum (Pt) is used for the termination electrode, it is possible to mount the chip component to a PCB substrate without separate plating process of nickel (Ni) or tin (Sn). This is because, when silver (Ag) is added by a small quantity of palladium (Pd) or platinum (Pt), silver (Ag) reacts to soldering but palladium (Pd) or platinum (Pt) prevents the silver (Ag) from leaching, although the termination electrode achieves less firm solidification.
In case chip component 31 for termination electrode made of silver (Ag) added by platinum (Pt) or palladium (Pd) is soldered on a PCB substrate 33, decreased solderability can be expected such that soldering paste 35 on a land 34 is not fully melted with the termination electrode 32, as shown in Figure 3, thereby resulting in the PCB substrate to achieve a poor solidification.
SUMMARY OF THE INVENTION
The present invention is disclosed to solve the afore-said problems and it is an object of the present invention to provide an termination electrode structure for chips and fabricating method therefore adapted to adjust material and structure of termination electrode to eliminate the so-called leaching phenomenon of silver (Ag) at the termination electrode, thereby achieving a good solderability.
It is another object of the present invention to provide an termination electrode structure for chips and fabricating method therefore adapted to adjust material and structure of termination electrode to eliminate the so-called plate spreading phenomenon occurring in the process of plating the termination electrode.
In accordance with the objects of the present invention, there is provided an termination electrode structure for chips and fabricating method therefore, wherein an termination electrode electrically connected to an internal electrode is double formed with an silver (Ag) layer added by palladium (Pd) or platinum (Pt) and a tin (Sn) layer plated on the silver (Ag) layer or a tin alloy (Sn-Pb) layer.
BRIEF DESCRIPTION OF THE DRAWINGS
For fuller understanding of the nature and objects of the invention, reference should be made to the following detailed description taken in conjunction with the accompanying drawings in which:
Figure 1 is a schematic representation of an termination electrode on plated chip component according to the prior art;
Figure 2 is a schematic representation of an termination electrode on non- plated chip component according to the prior art;
Figure 3 is a schematic representation of chip component showing a poor solderability; and Figure 4 is a schematic representation of an termination electrode on chip component according to the present invention. DETAILED DESCRIPTION OF THE INVENTION
Now, detailed description of the present invention will be described with reference to stacked varistor component in fabricating the termination electrode.
First of all, there should be provided raw material of powder for making a stacked chip varistor element that is being sold on the market for industrial uses. Or, a desired mixture where ZnO powder is added by Bi203, Pr On, CoO, MnO and the like is milled by ball mill for 24 hour via water or alcohol as solvent to prepare raw material of powder. A PVB-based binder of about 8% in weight of the powder is dissolved in a toluene/alcohol-based solvent and put together with the powder. The mixture is milled by small ball mill for about 24 hours and blended to make slurry, which is made into green sheets 41 in a desired thickness by a method like doctor blade or the like.
By way of screen having an internal electrode pattern, an internal electrode 42 is screen-printed on the fabricated sheet. At this time, paste of Ag, Pt, Pd or the like is screen printed on the green sheet to form a predetermined pattern of internal electrode.
Green sheets screen-printed with the internal electrode are stacked in as many sheets as desired and in order to thoroughly eliminate a variety of binder components in the compressed stacked structure 43, the stacked structure thus constructed will be backed out by heating at about 400 degrees centigrade for approximately for 6 hours and then plasticized at an increased, higher plasticization temperature.
An termination electrode 44 connecting with the internal electrode at the stacked structure is formed at outside of the sintered stacked structure 43 to fabricate varistor elements. In other words, both tip ends of chip varistor stacked structure are dipped into a bed coated with (Ag-Pd system plus additives), (Ag-Pt system plus additives) or (Ag-Pd-Pt system plus additives) to form in a dumbbell shape and fired to form a first termination electrode at an appropriate temperature, the first termination electrode is plated with tin (Sn) layer or an alloy (Sn-Pb) layer thereof by utilizing the electrolytic method to fabricate a surface-mounted chip varistor, as illustrated in Figure 2.
As described above, methods for fabricating termination electrodes may be used for fabrication of termination electrodes of various chip components besides the above exemplified elements. Particularly, plate spreading can be prevented in chip component of low resistance and termination electrodes having an excellent solderability may be fabricated.
As apparent from the foregoing, there is an advantage in the structure of termination electrode according to the present invention thus described in that the so-called leaching phenomenon of Ag can be prevented without the Ni layer to thereby enable to obtain a good solderability and plate spreading phenomenon occurring in the process of plate coating can be eliminated.
There is another advantage in that a small sized chip components can be fabricated in simple double layer structure and without additional process, thereby enable to reduce manufacturing cost.
There is still another advantage in that mounting effect onto a PCB can be improved and the so-called plating spread phenomenon occurring on surface of chip component can be prevented to stably obtain electrical characteristic of chip component.

Claims

WHAT IS CLAIMED IS:
1. An termination electrode structure for chip wherein an termination electrode electrically connected to an internal electrode is doubly formed with an silver (Ag) layer added by palladium (Pd) or platinum (Pt) and a tin (Sn) layer or a tin alloy (Sn-Pb) layer plated on the silver (Ag) layer.
2. The structure as defined in claim 1 , wherein the chip element has a low resistance.
3. The structure as defined in claim 1 or 2, wherein the chip element is one of the chip varistor, chip inductor, chip NTC or chip PTC.
4. A fabricating method for chips, the method comprising the steps of: fabricating chip element; dipping (Ag-Pd system plus additives), (Ag-Pt system plus additives) or (Ag-Pd-Pt system plus additives) to both ends of the chip element to form an termination electrode; and plating tin (Sn) or tin alloy thereof (Sn-Pb) on the termination electrode.
5. A fabricating method for chips, the method comprising the steps of: fabricating green sheets; screen-printing soldering paste to the green sheet to form an internal electrode; stacking the green sheets printed with internal electrode in several sheets to form a chip element; dipping (Ag-Pd system plus additives), (Ag-Pt system plus additives) or (Ag-Pd-Pt system plus additives) on both ends of the chip element to form an termination electrode; and plating the termination electrode with tin (Sn) or a tin alloy (Sn-pb) alloy.
6. The method as defined in claim 4 or 5, wherein the chip element has a low resistance.
7. The method as defined in claim 4 or 5, wherein the chip element fabricates one out of chip varistor, chip inductor, chip NTC or chip PTC.
PCT/KR2002/000061 2001-01-15 2002-01-15 Terminal for chip and fabricating method thereof WO2002056654A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020010002125A KR20010025653A (en) 2001-01-15 2001-01-15 Termination structure for chip and fabricating method therefor
KR2001/2125 2001-01-15

Publications (1)

Publication Number Publication Date
WO2002056654A1 true WO2002056654A1 (en) 2002-07-18

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WO (1) WO2002056654A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100400606B1 (en) * 2001-09-08 2003-10-08 정재필 Double pre-coated substrate using lead free solder plated with low-melting-pointed alloy and manufacturing method thereof
KR20040045769A (en) * 2002-11-25 2004-06-02 삼성전기주식회사 Low Temperature Co-fired Ceramic Multi-laminated board enhancing a force of soldering

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0575238A (en) * 1991-03-06 1993-03-26 Nau Chem:Yugen Circuit board and its manufacture
JPH08293654A (en) * 1995-04-21 1996-11-05 World Metal:Kk Formation of metal film on ceramic base material and metal-coated ceramic structure
JPH10335388A (en) * 1997-06-04 1998-12-18 Ibiden Co Ltd Ball grid array
JPH11103157A (en) * 1997-09-26 1999-04-13 Ibiden Co Ltd Printed wiring board
JPH11103144A (en) * 1997-09-26 1999-04-13 Ibiden Co Ltd Solder material as well as printed wiring board and its manufacture
JPH11103160A (en) * 1997-09-25 1999-04-13 Ibiden Co Ltd Solder member and printed wiring board

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0575238A (en) * 1991-03-06 1993-03-26 Nau Chem:Yugen Circuit board and its manufacture
JPH08293654A (en) * 1995-04-21 1996-11-05 World Metal:Kk Formation of metal film on ceramic base material and metal-coated ceramic structure
JPH10335388A (en) * 1997-06-04 1998-12-18 Ibiden Co Ltd Ball grid array
JPH11103160A (en) * 1997-09-25 1999-04-13 Ibiden Co Ltd Solder member and printed wiring board
JPH11103157A (en) * 1997-09-26 1999-04-13 Ibiden Co Ltd Printed wiring board
JPH11103144A (en) * 1997-09-26 1999-04-13 Ibiden Co Ltd Solder material as well as printed wiring board and its manufacture

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