WO2002030073A3 - Abschnittsweise entschachtelung - Google Patents

Abschnittsweise entschachtelung Download PDF

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Publication number
WO2002030073A3
WO2002030073A3 PCT/DE2001/003721 DE0103721W WO0230073A3 WO 2002030073 A3 WO2002030073 A3 WO 2002030073A3 DE 0103721 W DE0103721 W DE 0103721W WO 0230073 A3 WO0230073 A3 WO 0230073A3
Authority
WO
WIPO (PCT)
Prior art keywords
segment
deinterlacing
deinterlaced
calculated
segmental
Prior art date
Application number
PCT/DE2001/003721
Other languages
English (en)
French (fr)
Other versions
WO2002030073A2 (de
Inventor
Burkhard Becker
Peter Jung
Joerg Plechinger
Markus Doetsch
Tideya Kella
Michael Schneider
Original Assignee
Infineon Technologies Ag
Burkhard Becker
Peter Jung
Joerg Plechinger
Markus Doetsch
Tideya Kella
Michael Schneider
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Burkhard Becker, Peter Jung, Joerg Plechinger, Markus Doetsch, Tideya Kella, Michael Schneider filed Critical Infineon Technologies Ag
Priority to JP2002533562A priority Critical patent/JP2004511179A/ja
Priority to EP01982161A priority patent/EP1323269A2/de
Publication of WO2002030073A2 publication Critical patent/WO2002030073A2/de
Publication of WO2002030073A3 publication Critical patent/WO2002030073A3/de
Priority to US10/405,847 priority patent/US7013412B2/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
    • H03M13/2714—Turbo interleaver for 3rd generation partnership project [3GPP] universal mobile telecommunications systems [UMTS], e.g. as defined in technical specification TS 25.212
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/276—Interleaving address generation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2771—Internal interleaver for turbo codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2789—Interleaver providing variable interleaving, e.g. variable block sizes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6502—Reduction of hardware complexity or efficient processing
    • H03M13/6505—Memory efficient implementations
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03828—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties
    • H04L25/03866—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties using scrambling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0047—Decoding adapted to other signal detection operation
    • H04L1/005—Iterative decoding, including iteration between signal detection and decoding operation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0064—Concatenated codes
    • H04L1/0066—Parallel concatenated codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Power Engineering (AREA)
  • Error Detection And Correction (AREA)
  • Television Systems (AREA)
  • Detection And Correction Of Errors (AREA)

Abstract

Bei einem Verfahren zur Entschachtelung eines gemäss einer vorgegebenen Verschachtelungsvorschrift blockweise verschachtelten Datensignals werden Entschachtelungs-Zieladressen bezüglich eines ersten vorgegebenen Abschnitts der zu entschachtelnden Datensymbole berechnet und in einem Zieladressenspeicher abgelegt. Mittels der berechneten Zieladressen wird dann der betreffende Abschnitt der Datensymbole entschachtelt. Nachfolgend werden diese beiden Schritte so oft wiederholt, bis der gesamte Datenblock abschnittsweise entschachtelt ist.
PCT/DE2001/003721 2000-10-02 2001-09-25 Abschnittsweise entschachtelung WO2002030073A2 (de)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2002533562A JP2004511179A (ja) 2000-10-02 2001-09-25 断片的脱インターリーブ
EP01982161A EP1323269A2 (de) 2000-10-02 2001-09-25 Abschnittsweise entschachtelung
US10/405,847 US7013412B2 (en) 2000-10-02 2003-04-02 Method for segmentally deinterleaving a data signal

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10048872.2 2000-10-02
DE10048872A DE10048872A1 (de) 2000-10-02 2000-10-02 Abschnittsweise Entschachtelung

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US10/405,847 Continuation US7013412B2 (en) 2000-10-02 2003-04-02 Method for segmentally deinterleaving a data signal

Publications (2)

Publication Number Publication Date
WO2002030073A2 WO2002030073A2 (de) 2002-04-11
WO2002030073A3 true WO2002030073A3 (de) 2002-07-18

Family

ID=7658494

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2001/003721 WO2002030073A2 (de) 2000-10-02 2001-09-25 Abschnittsweise entschachtelung

Country Status (6)

Country Link
US (1) US7013412B2 (de)
EP (1) EP1323269A2 (de)
JP (1) JP2004511179A (de)
CN (1) CN1582555A (de)
DE (1) DE10048872A1 (de)
WO (1) WO2002030073A2 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10202090B4 (de) * 2002-01-21 2010-08-12 Infineon Technologies Ag Elektronische Sender-Empfänger-Vorrichtung
WO2004030226A1 (en) * 2002-09-25 2004-04-08 Koninklijke Philips Electronics N.V. Method of calculating an intra-row permutation pattern for an interleaver
US8077743B2 (en) * 2003-11-18 2011-12-13 Qualcomm Incorporated Method and apparatus for offset interleaving of vocoder frames
CN101218747B (zh) * 2005-05-04 2012-09-05 诺基亚公司 提供增强信道交织的方法和装置
CN101436160B (zh) * 2007-11-16 2011-05-11 瑞昱半导体股份有限公司 解交叉单元的数据存取方法
US8291291B1 (en) * 2008-11-13 2012-10-16 Altera Corporation Data resequencing
US8189408B2 (en) * 2009-11-17 2012-05-29 Freescale Semiconductor, Inc. Memory device having shifting capability and method thereof
US9065485B1 (en) 2011-01-05 2015-06-23 Altera Corporation Method and apparatus for interleaving using stored initial value
EP2525498A1 (de) * 2011-05-18 2012-11-21 Panasonic Corporation Bitverschachtelte codierte Modulation (BICM) mit quasi-zyklischen LDPC Codes
US9539109B2 (en) 2011-09-16 2017-01-10 Globus Medical, Inc. Low profile plate
CN104917587B (zh) * 2014-03-13 2018-08-14 钜泉光电科技(上海)股份有限公司 通信设备中的数据块交织和解交织方法及其装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5677911A (en) * 1993-12-29 1997-10-14 Zenith Electronics Corporation Data frame format for a digital signal having multiple data constellations
WO1999007076A2 (en) * 1997-07-30 1999-02-11 Samsung Electronics Co., Ltd. Adaptive channel encoding method and device
US6108388A (en) * 1995-02-07 2000-08-22 France Telecom Iterative-structure digital signal reception device, and module and method therefor

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5659580A (en) * 1994-11-29 1997-08-19 Lucent Technologies Inc. Data interleaver for use with mobile communication systems and having a contiguous counter and an address twister
US6029264A (en) * 1997-04-28 2000-02-22 The Trustees Of Princeton University System and method for error correcting a received data stream in a concatenated system
KR100330980B1 (ko) * 1997-11-10 2002-04-01 다치카와 게이지 인터리빙 방법, 인터리빙 장치 및 인터리빙 패턴 생성 프로그램이 기록된 기록 매체
DE19846721B4 (de) * 1998-10-12 2009-09-10 Ipcom Gmbh & Co. Kg Verfahren zur Kodierung und Dekodierung und Vorrichtung zum Kodieren oder Dekodieren
KR100350459B1 (ko) * 1998-12-26 2002-12-26 삼성전자 주식회사 통신시스템의인터리빙/디인터리빙장치및방법

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5677911A (en) * 1993-12-29 1997-10-14 Zenith Electronics Corporation Data frame format for a digital signal having multiple data constellations
US6108388A (en) * 1995-02-07 2000-08-22 France Telecom Iterative-structure digital signal reception device, and module and method therefor
WO1999007076A2 (en) * 1997-07-30 1999-02-11 Samsung Electronics Co., Ltd. Adaptive channel encoding method and device

Also Published As

Publication number Publication date
EP1323269A2 (de) 2003-07-02
WO2002030073A2 (de) 2002-04-11
US7013412B2 (en) 2006-03-14
CN1582555A (zh) 2005-02-16
JP2004511179A (ja) 2004-04-08
US20030221157A1 (en) 2003-11-27
DE10048872A1 (de) 2002-04-25

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