Classifications

• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04B—TRANSMISSION
  • H04B7/00—Radio transmission systems, i.e. using radiation field
  • H04B7/24—Radio transmission systems, i.e. using radiation field for communication between two or more posts
  • H04B7/26—Radio transmission systems, i.e. using radiation field for communication between two or more posts at least one of which is mobile
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L1/00—Arrangements for detecting or preventing errors in the information received
  • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
  • H04L1/0023—Systems modifying transmission characteristics according to link quality, e.g. power backoff characterised by the signalling
  • H04L1/0027—Scheduling of signalling, e.g. occurrence thereof
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L1/00—Arrangements for detecting or preventing errors in the information received
  • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
  • H04L1/0002—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L1/00—Arrangements for detecting or preventing errors in the information received
  • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
  • H04L1/0023—Systems modifying transmission characteristics according to link quality, e.g. power backoff characterised by the signalling
  • H04L1/0025—Transmission of mode-switching indication

Definitions

• the present invention relates generally to a mobile telecommunication system for transmission of packet data, and in particular, to a method and apparatus for transmitting data rate control (DRC) information.
• DRC data rate control
• HDR High Date Rate
• the HDR system employs a link adaptation scheme in which a data rate is controlled by adapting a code rate and modulation to channel conditions.
• a pilot channel, a MAC (Media Access Control) channel, a traffic channel, and a control channel on the forward link are subject to time division multiplexing (TDM) prior to transmission in the HDR system.
• TDM time division multiplexing
• the forward traffic channel utilizing link adaptation can be transmitted at 13 data rates by combining three modulations, QPSK (Quadrature Phase Shift Keying), 8PSK (8-ary Phase Shift Keying), and 16QAM (16-ary Quadrature Amplitude Modulation), three code rates, 1/4, 3/8 and 1/2, and the number of slots in which a packet is transmitted.
• An access terminal measures the carrier to interference ratio (C/I) of forward pilot channels received from eight effective sectors (active set sectors), estimates channels conditions, and then requests a data rate for a forward traffic channel and a sector from which it will receive data to an access network (AN) on a DRC channel.
• the DRC information is composed of data rate information in a 4-bit DRC symbol and cell selection information in a 3-bit index by which an 8-bit orthogonal (Walsh) code is determined.
• FIG. 1 illustrates the relationship between reverse channels in a typical HDR system. The puncturing patterns of a pilot channel, a DRC channel, and an RRI (Reverse Rate Indicator) channel on the reverse link are shown here.
• the RRI channel indicates the data rate of a reverse traffic channel and the DRC channel transmits DRC information to an AN as stated before.
• Each bit of the DRC information transmitted on the DRC channel is repeated once and spread with an 8-bit Walsh code indicating a sector. The result is then spread with a 4-bit Walsh code. Consequently the DRC symbol has a total of 512 chips and repeats itself once so that 1024 chips are filled on the DRC channel.
• the DRC chips are divided into 16 64-chip TDM slots and TDM-transmitted with the pilot channel and the RRI channel after puncturing in the pattern shown in FIG. 1.
• the AN Upon receipt of data rates from ATs within the sector on the DRC channels, the AN schedules user data according to the amount of packet data and requested data rate of each user and selects an AT that will receive a data packet in the next slot. The AN transmits the data packet at the requested data rate to the selected AT for one packet period starting from the next slot.
• FIG. 2 illustrates the lengths of data packets according to data rates on the forward link in the typical HDR system.
• the forward traffic channel transmits packets of different lengths according to data rates requested by ATs.
• the AN selects an AT to be serviced on the forward traffic channel in the next slot and determines a data rate at which to transmit data to the AT based on DRC information received from the ATs within the sector.
• the AN transmits a preamble at the start of each packet to inform the destination AT to receive the packet and the length of the packet.
• the preamble is multiplied by a Walsh code corresponding to a MAC index assigned to the AT and the repeating times of the preamble is determined according to the data rate of the packet. Table 1 shown below lists preamble repetition and the number of preamble chips versus data rate.
• the AT searches for the preamble by use of the Walsh code corresponding to its MAC index and checks the data rate.
• the AN schedules user packet data referring to DRC information received from the ATs just before the packet transmission.
• DRC information is transmitted in each slot on the reverse link.
• the DRC information is unnecessary when no schedule is made out, the DRC information is continuously transmitted on DRC channels. This implies that reverse link resources are continuously occupied, thereby decreasing the system capacity of the reverse link.
• the problem becomes worse when data is transmitted at a low data rate (e.g., 38.4 kbps and 76.8 kbps in FIG. 2) on the forward link. Since DRC information is used only at the time for scheduling before complete transmission of a packet, untimely DRC information for scheduling is useless.
• An object of the present invention is, therefore, to provide a method and apparatus for transmitting DRC information used to determine a data rate for the forward link on the reverse link only when scheduling is needed in a mobile telecommunication system like an HDR system.
• Another object of the present invention is to provide a method and apparatus for reducing interference load on the reverse link in a mobile telecommunication system like an HDR system.
• a further object of the present invention is to provide a method and apparatus for increasing the system capacity of the reverse link in a mobile telecommunication system like an HDR system.
• Still another object of the present invention is to provide a method and apparatus for reducing interference load on the reverse link for a DRC information non- transmission period in a mobile telecommunication system like an HDR system.
• DRC information is transmitted on the reverse link only in time for scheduling user data.
• An AN transmits a DRI bit or an AT detects preambles of all users or its own preamble in order to control transmission of the DRC info ⁇ nation.
• some ATs are controlled to transmit pilot channels and RRI channels at different time points from other ATs. Therefore, interference load on the reverse link is reduced and the system capacity of the reverse link is increased.
• FIG. 1 illustrates the puncturing patterns of a pilot channel, a DRC channel, and an RRI channel on the reverse link in a typical HDR system
• FIG. 2 illustrates the lengths of data packets versus data rates on the forward link in the typical HDR system
• FIG. 3 illustrates the slot transmission reception relationship between the forward link and the reverse link in a DRC channel transmission control operation according to an embodiment of the present invention
• FIG. 4 is a flowchart illustrating the DRC channel transmission control operation according to the embodiment of the present invention.
• FIG. 5 is a block diagram of an AN transmitter according to the embodiment of the present invention.
• FIG. 6 is a block diagram of an AT transmitter according to the embodiment of the present invention.
• FIG. 7 illustrates the slot transmission reception relationship between the forward link and the reverse link in a DRC channel transmission control operation according to another embodiment of the present invention
• FIG. 8 is a flowchart illustrating the DRC channel transmission control operation according to the second embodiment of the present invention.
• FIG. 9 is a block diagram of an AT transmitter according to the second embodiment of the present invention.
• FIG. 10 is the slot transmission/reception relationship between the forward link and the reverse link in a DRC channel transmission control operation according to a third embodiment of the present invention.
• FIG. 11 is a flowchart illustrating the DRC channel transmission control operation according to the third embodiment of the present invention.
• FIG. 12 is a block diagram of an AT transmitter according to the third embodiment of the present invention.
• FIGs. 13A, 13B, and 13C illustrate transmission of pilot channels and RRI channels for a DRC channel non-transmission period according to a fourth embodiment of the present invention.
• the present invention provides an apparatus and method for transmitting DRC information on the reverse link only when scheduling is needed, for use in determining a data rate for the forward link in a mobile telecommunication system like an HDR system. That is, when an AN intends to transmit another packet in an HDR system, ATs transmit DRC information just before the previous packet is completely transmitted. According to the present invention, a decision is first made on when to transmit DRC information and the DRC information is transmitted only at the decided time. Pilot channels and RRI channels are transmitted at different time points according to users in order to reduce interference load on the reverse link while the DRC information is not transmitted.
• Embodiment 4 offers a method of reducing interference load on the reverse link by transmitting pilot channels and RRI channels at different time points according to users, incorporating Embodiment 1 to Embodiment 3 therein.
• FIG. 3 illustrates the relationship in slot transmission/reception between the forward link and the reverse link in a DRC channel transmission control operation according to a first embodiment of the present invention.
• This embodiment is characterized by control of DRC channels with the introduction of a DRI (DRC Request Indicator) bit. While the following description focuses on the data rate of 76.8kbps, it is a mere exemplary application. Obviously, the first embodiment is applicable to any data rate.
• DRI DRC Request Indicator
• an AN controls transmission of DRC channels from all ATs by informing them whether it needs to receive reverse DRC channels.
• the AN transmits the information in a DRI bit on a MAC channel.
• the DRI bit indicates whether DRC information is needed for scheduling after a predetermined slot period.
• the DRC information is needed when transmission of the forward packet is terminated in the predetermined slot period and the AN must select the next AT and a data rate.
• the DRI bit is set to 1 if the transmission of the forward packet is terminated in the predetermined slot and to 0 if the transmission of the current forward packet continues. If the AN requests DRC information within the predetermined slot period and receives the requested information, it determines a data rate for the next packet to transmit.
• the AN makes out a schedule to determine an AT to receive the new packet in the second transmission period and a data rate for the packet in the latter half of the last slot of the first transmission period.
• the AN transmits a DRI bit requesting the DRC information to ATs in the predetermined slot of the first transmission period.
• the predetermined slot is located at least two slots before the last slot.
• the predetermined slot is the second slot from the last slot.
• the predetermined slot may indicate the first two slots from the last slot and the last slot in consideration of the case that a packet is completely transmitted in one slot in the second transmission period. For example, if the last slot is 16 th slot, the predetermined slot is 14 th slot or 14 th , 15 th and 16 th slots. When necessary, the predetermined slot can be set to a different value.
• FIG. 4 is a flowchart illustrating a DRC channel transmission control operation according to the first embodiment of the present invention. This is an algorithm of controlling transmission of DRC channels from the ATs by the DRI bit.
• an AT reads a DRI bit from a forward MAC channel signal in step 401 and checks whether the DRI bit is 1 or 0 in step 402. If the DRI bit is 1, the AT measures the pilot CI of each effective sector (active set sector) in step 403, determines a sector corresponding to the highest C/l in step 404, converts the highest C/I to a corresponding DRC symbol in step 405, and transmits the DRC symbol to the AN in step 406. In step 407, the AT receives the next slot and returns to step 401. As well known, the DRC symbol conversion is performed by mapping the C/I to the corresponding DRC symbol.
• step 402 the AT jumps to step 407.
• the DRI bit in an nth forward slot controls the DRC channel in an (n+l)fh reverse slot.
• the DRC channel arrives in an (n+2)th slot and determines a data rate for an (n+3)th forward slot.
• DRC information must be requested three slots before the current packet is completely transmitted in the first transmission period, that is, in the second slot from the last slot of the first transmission period, so that the DRC information can be received in time for scheduling to determine the data rate of a new packet to be transmitted in the second transmission period. Therefore, the AN transmits the DRI bit set to 1 three slots before termination of packet transmission and transmits DRI bit set to 0s in the other slots.
• the DRC channel need not be transmitted in (N-3) slots.
• the ratio of the number of slots for non-DRC channel transmission to the total number of slots in a packet is (N-3)/N.
• Table 2 illustrates the ratio of the number of slots for non-DRC channel transmission to the total number of slots versus data rates. If packet length is three slots or less, the DRC channel is transmitted in all slots. Interference load caused by transmission of the DRC channel in a slot period can be reduced at a data rate of 153.6kbps or below and at 307.2kbps (long packet).
• FIG. 5 is a block diagram of an AN transmitter according to the first embodiment of the present invention.
• the transmitter is characterized by the introduction of the DRI bit.
• a traffic channel is encoded in an encoder 501, modulated in QPSK, 8PSK, or 16QAM according to a data rate in a modulator 502, and interleaved in an interleaver 503.
• the interleaved traffic channel signal is punctured and repeated according to the data rate in a puncturer & repeater 504.
• a demultiplexer (DEMUX) 505 outputs 16 successive bits of the repeated signal on 16 parallel channels.
• a Walsh cover unit 506 Walsh-covers the 16 channels with 16 Walsh codes and a Walsh chip level summer 507 sums the Walsh-covered channel data at a chip level.
• a preamble is repeated according to the data rate in a preamble repeater 511 and spread with a Walsh code assigned to a reverse power control channel in a Walsh spreader 512.
• a multiplexer (MUX) 513 multiplexes the outputs of the Walsh chip level summer 507 and the spread preamble received from the Walsh spreader 512 in such a way that the preamble is located at the start of the traffic channel.
• a pilot channel, an FA (Forward Activity) bit or an FAB, and an RA (Reverse Activity) bit or an RAB are respectively multiplied by Walsh codes #0, #1, and #2 and transmitted on a forward MAC channel.
• the other 29 Walsh codes are multiplied by reverse power control (RPC) bits for users prior to transmission.
• RPC reverse power control
• One of the 29 Walsh codes assigned to the RPC bits can be assigned for transmission of the DRI bit. For example, Walsh code #3 can be assigned to the DRI bit.
• an FA bit is repeated 15 times (occurs 16 times) in a repeater 521 and multiplied by Walsh code #1 in a multiplier 522.
• An RA bit occurs as many times as a RABLength factor in a repeater 531 and is multiplied by Walsh code #2 in a multiplier 532.
• a DRI bit is multiplied by Walsh code #3 in a multiplier 541.
• An RPC Walsh channel gain controller 551 controls the gain of an RPC channel and a multiplier 552 multiplies the gain-controlled RPC bits by the other Walsh codes, respectively.
• a Walsh chip level summer 553 sums the signals received from the multipliers 533, 532, 541, and 552 at a chip level.
• the sum occurs four times in a MAC channel repeater 554 and is transmitted before and after the second pilot burst in each slot by halves.
• the pilot channel signal is multiplied by Walsh code #0 in a multiplier 561.
• a second MUX 562 connects the output of the first MUX 513, the output of the MAC channel repeater 554, and the output of the multiplier 561 as shown in FIG. 3.
• the output of the second MUX 562 is subject to complex spreading in a complex spreader 563 and filtering in a baseband filter 564 prior to transmission.
• FIG. 6 is a block diagram of an AT transmitter according to the first embodiment of the present invention. This transmitter is also characterized by the introduction of the DRI bit. A description of an AT receiver for receiving the DRI bit related with the present invention from an AN will be omitted and only the structure of the AT transmitter associated with determining whether a DRC symbol is to be transmitted based on the DRI bit related with the present invention will be described hereinbelow in detail.
• a pilot channel is multiplied with Walsh code #0 in a multiplier 601.
• An RRI channel is modulated to an 8-bit Walsh symbol in an 8-ary orthogonal modulator 611, repeated 63 times in a Walsh symbol repeater 612, and multiplied with Walsh code #0 in a multiplier 613. If the DRI bit is 0, a MUX 631 passes a DRC symbol and if the DRI bit is 0, it blocks the DRC symbol. That is, the MUX 631 acts as a selector for selecting the DRC symbol according to the DRI bit. The DRC symbol is block-encoded in a block encoder 632 and the codeword is repeated in a repeater 633. The output of the repeater 633 is multiplied with Walsh codes in a series of multipliers 634, 635, and 636.
• a MUX 637 TDM-multiplexes the spread signal with the pilot signal and the RRI.
• a traffic channel is encoded in an encoder 641, interleaved in an interleaver
• the output of the multiplier 643 is multiplied by Walsh code #2 in a multiplier
• the outputs of the MUX 637 and the multiplier 644 are output to the in-phase (I) arm and the quadrature (Q) arm, respectively.
• the I arm and the Q arm are spread in a complex spreader 645 and filtered in a baseband filter 646 prior to transmission.
• FIG. 7 illustrates the relationship in slot transmission/reception between the forward link and the reverse link according to a second embodiment of the present invention.
• transmission of DRC channels is controlled by allowing an AT to search for preambles of all ATs within the service area of an AN.
• the AT determines an AT that communicates packet data with the AN by detecting the preambles of all the ATs and transmits DRC information in a predetermined slot period before the packet data is completely transmitted.
• each AT searches for the preambles of the other ATs, it can find out how long the current forward packet is. Thus, the AT does not transmit its DRC channel until scheduling is needed. That is, each AT checks whether its DRC channel is to be transmitted or not and as a result, it transmits the DRC channel only in time for scheduling. The DRC channel transmission is controlled in this manner. As stated before, a preamble is multiplied with a Walsh code according to a MAC index assigned to an AT and the length of a packet is variable depending on a data rate.
• each AT measures energy by decoding a preamble with Walsh codes corresponding to MAC indexes assigned to all the ATs and compares the energy measurement with preamble repetition times shown in Table 1, thereby finding out the length of the current packet and locating the start and end slots of the packet.
• a DRC channel After receipt of the first pilot burst in an nth slot, a DRC channel transmits DRC information for an (n+2)th slot. Therefore, the AT transmits the DRC channel two slots before the end slot of the packet. Since one slot is taken to know the length of the packet after the start slot is located, the AT transmits the DRC channel in the start slot, too. Therefore, the number of slots that need not be transmitted is (N-3), and the ratio of the number of slots for the non-DRC channel transmission to an N-slot packet is (N-3)/N as in the first embodiment.
• FIG. 8 is a flowchart illustrating a DRC channel transmission control operation according to the second embodiment of the present invention.
• the AT searches for the preambles of all ATs and determines the length of the current packet in step 801. That is, each of ATs within the service area of the AN determines an AT which is receiving a packet from the AN by multiplying a received preamble with a plurality of predetermined orthogonal codes, mainly Walsh codes, assigned to the ATs and detects the length of the packet from the preamble.
• the AT determines whether the current packet will be terminated within two slots. If the current packet is terminated within two slots, the AT measures the pilot C/I of effective sectors (active set sectors) in step 803 and determines the highest C/I and a sector corresponding to the highest C/I in step 804.
• the AT converts the determined C/I to a corresponding DRC symbol in step 805 and transmits the DRC symbol to the AN in step 806. On the other hand, if the current packet is not terminated within two slots in step 802, steps 803 to 807 are omitted.
• step 807 Upon termination of the packet transmission in step 807, the AT returns to step 801, searches for preambles of all the ATs, and reads the length of the next packet. If the packet transmission is not completed in step 807, the AT receives the next slot in step 808 and returns to step 802. In step 802, the AT checks whether the current packet will be terminated within two slots in the received slot.
• FIG. 9 is a block diagram of an AT transmitter according to the second embodiment of the present invention.
• the AT transmitter is characterized by searching for preambles of all ATs for control of the DRC channel.
• the structure of the AN transmitter related with the pilot channel, the RRI channel, and the traffic channel is the same as that shown in FIG. 6. Therefore, a description will be made on only the transmitter structure related with decision about whether to transmit a DRC symbol or not based on the preambles of all the ATs.
• a preamble buffer 901 stores it.
• a Walsh code generator 902 generates Walsh codes for all the ATs within the sector.
• a multiplier 903 multiplies the preamble stored in the buffer 901 by the Walsh codes.
• An accumulator 904 accumulates the product received from the multiplier 903 and an energy detector 905 detects energy from the accumulation.
• a packet length detector 906 detects packet length from the output of the energy detector 905. Since a period suitable for DRC symbol transmission can be known from the packet length, a DRC controller 907 controls a MUX 921 to selectively transmit the DRC symbol as shown in FIG. 7.
• the DRC controller 907 controls the MUX 921 to pass the DRC symbol two slots before the packet transmission is completed and to block the DRC symbol in the other slots. That is, if the length of the packet is shorter than three slots, the DRC symbol is transmitted all the time.
• an AT among a plurality of ATs receives packet data from an AN in a first transmission period including a plurality slots
• the AT transmits a DRC symbol in slots from a predetermined slot before the end of the first transmission period (two slots before the last slot) to request a data rate for packet data to be transmitted in a second transmission period after the first transmission period.
• This operation can be performed in ATs that are not receiving the packet data from the AN in the first transmission period as well as the AT receiving the packet data in the first transmission period.
• the second group transmits DRC symbols to the AN in the predetermined slot before the transmission of the packet data to the first group is completed.
• the first group also transmits DRC symbols to the AN in the predetermined slot before the transmission of the packet data is completed.
• FIG. 10 illustrates the relationship in slot transmission/reception between the forward link and the reverse link in a DRC channel transmission control operation according to a third embodiment of the present invention.
• the DRC channel of an AT receiving the current forward channel is controlled.
• the DRC channel of an AT receiving a packet from the AN is controlled in the third embodiment of the present invention, there is no need for a detector for detecting the preambles of the other ATs as compared to the second embodiment.
• the AT assigned to the current forward traffic channel can detect packet length and locate the start and end slots of the packet by searching for the preamble destined for the AT.
• the AT can also find out a time period in which DRC information is not needed until the scheduling time before the packet is completely transmitted.
• the DRC channel is transmitted in the start slot and the last two slots of the packet.
• FIG. 11 is a flowchart illustrating a DRC channel transmission control operation in which the DRC channel of the AT receiving the forward traffic channel is controlled according to the third embodiment of the present invention.
• the AT searches for a preamble transmitted from the AN in step 1101 and determines whether it has received a packet in step 1102. Upon receipt of the packet, the AT determines whether the packet will be terminated within two slots in step 1103. If it is, the AT measures the pilot C/I of effective sectors in step
• step 1105 maps the highest C/I to a corresponding DRC symbol in step 1106, and transmits the DRC symbol to the AN in step 1107.
• the AT jumps to step 1108. If the packet transmission is completed in step 1108, the AT receives the next slot in step 1109. Then, the AT determines whether the current packet will be terminated within two slots in the new slot in step 1103 and determines whether to transmit the DRC channel according to the determination result.
• FIG. 12 is a block diagram of an AT transmitter according to the third block diagram of the present invention.
• the AT transmitter is characterized by control of the DRC channel of an AT that receives the current forward traffic channel. Since the transmitter structure associated with the pilot channel, the RRI channel, and the traffic channel is the same as that shown in FIG. 6, only the transmitter structure associated with determining whether to transmit the DRC symbol will be described in detail.
• a preamble detector 1201 detects a preamble destined for the AT.
• a packet length detector 1202 detects packet length from the preamble. Since a time period in which the DRC symbol must be transmitted can be known from the packet length as shown in FIG. 10, a DRC controller 1203 controls a MUX 1221 to pass the DRC symbol two slots before the packet transmission is terminated and to block the DRC symbol in the other slots. That is, if the packet length is shorter than three slots, the DRC symbol is passed all the time.
• interference load is reduced by controlling the DRC channels of all ATs.
• the DRC channels are transmitted with the pilot channels and the RRI channels in time division, pilot channels and RRI channels from users are transmitted at the same time points even though the DRC channels are not transmitted.
• the interference load is not reduced when the pilot and RRI channels are transmitted from the users. Therefore, if the pilot channels and the RRI channels are transmitted at different time points according to the users for the DRC non-transmission period, interference load can be equally distributed. This is the basic idea of Embodiment 4.
• FIGs. 13 A, 13B, and 13C illustrate time points at which the pilot channels and the RRI channels are transmitted for a DRC non-transmission period.
• all ATs are grouped into ones assigned to even-numbered MAC indexes and odd-numbered MAC indexes to transmit their pilot and RRI channels at different time points.
• the ATs can be grouped in a different way.
• the odd-numbered AMC index group transmits pilots and RRI channels in odd- numbered TDM slots as shown in FIG. 13B, whereas the even-numbered AMC index group transmits pilots and RRI channels in even-numbered TDM slots as shown in FIG. 13C.
• the resulting equal distribution of interference load contributes to the increase of the reverse linlc system capacity.
• the first group terminals transmit pilot signals and RRI channels in a first group of slots (e.g., odd-numbered slots) and the second group terminals transmit pilot signals and RRI channels in a second group of slots (e.g., even-numbered slots).
• transmission of DRC channels is controlled so that DRC information is transmitted on the reverse link only when necessary in an HDR system. Therefore, interference load on the reverse link is reduced and the system capacity of the reverse link is increased. Furthermore pilot channels and RRI channels are transmitted at different time points according to users for a DRC non-transmission period, thereby further decreasing the interference load generated for the DRC non-transmission period.

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