WO2001093320A1 - Platinum electrode structure for semiconductor and method for enhancing adhesion between semiconductor substrate and platinum electrode - Google Patents

Platinum electrode structure for semiconductor and method for enhancing adhesion between semiconductor substrate and platinum electrode Download PDF

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Publication number
WO2001093320A1
WO2001093320A1 PCT/KR2000/000573 KR0000573W WO0193320A1 WO 2001093320 A1 WO2001093320 A1 WO 2001093320A1 KR 0000573 W KR0000573 W KR 0000573W WO 0193320 A1 WO0193320 A1 WO 0193320A1
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Prior art keywords
thin film
substrate
ion beam
tin
semiconductor
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PCT/KR2000/000573
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English (en)
French (fr)
Inventor
Seok-Keun Koh
Jung Cho
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Korea Institute Of Science And Technology
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Publication date
Application filed by Korea Institute Of Science And Technology filed Critical Korea Institute Of Science And Technology
Priority to KR10-2002-7001202A priority Critical patent/KR100451415B1/ko
Priority to PCT/KR2000/000573 priority patent/WO2001093320A1/en
Publication of WO2001093320A1 publication Critical patent/WO2001093320A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76855After-treatment introducing at least one additional element into the layer
    • H01L21/76856After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28568Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising transition metals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76855After-treatment introducing at least one additional element into the layer
    • H01L21/76859After-treatment introducing at least one additional element into the layer by ion implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76861Post-treatment or after-treatment not introducing additional chemical elements into the layer
    • H01L21/76862Bombardment with particles, e.g. treatment in noble gas plasmas; UV irradiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76861Post-treatment or after-treatment not introducing additional chemical elements into the layer
    • H01L21/76864Thermal treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/10Applying interconnections to be used for carrying current between separate components within a device
    • H01L2221/1068Formation and after-treatment of conductors
    • H01L2221/1073Barrier, adhesion or liner layers
    • H01L2221/1078Multiple stacked thin films not being formed in openings in dielectrics

Definitions

  • the present invention relates to a platinum electrode structure for a semiconductor and a method for enhancing adhesion between a semiconductor substrate and a platinum substrate, and in particular to a technique of forming a TiN/Ti gradient buffer layer, by modifying a surface using an ion beam assisted method, in order to enhance adhesion of Pt deposited on a silicon wafer or glass substrate.
  • the properties and fabrication methods of the materials constituting the device as well as the design of the device are very important.
  • a thermal and electrical stability are required between a substrate and an oxide film, and between the electrodes in order to employ an advanced technique of forming various electric components on a single substrate.
  • Al has been generally used as an electrode material.
  • Pt is utilized as an electrode material for smart materials, such as a Micro Electro Mechanical System (MEMS) which has been recently widely used.
  • MEMS Micro Electro Mechanical System
  • Pt has a high thermal and chemical stability properties. Especially, Pt does not oxidize well.
  • the adhesion between the Pt and wafer of film is too low, and thus Pt easily falls off. That is, when the thin film is deposited on the silicon wafer and heat is applied thereto, the thin film and the substrate cannot easily adhere because of the difference in the thermal expansion of coefficient and crystallographic growth orientation.
  • TiN is used as a buffer thin film.
  • the TiN thin film has a columnar structure, and is grown on the silicon wafer.
  • Ti existing between the substrate and the electrode acts as a diffusion path for the substrate or electrode.
  • titanium oxide is formed between the surface and the grain boundary.
  • a conventional surface modification method employs energy of a few hundreds keV. Therefore, a device for generating an ion beam is very large in size, and peripheral devices are complicated. As a result, the method is difficult to be normally used.
  • the surface is damaged by the high energy particles. For example, when the surface is varied to a high energy state, the mechanical property and the chemical resistance to hydrochloric acid are deteriorated due to the structural variation at a high temperature.
  • a Pt electrode structure for a semiconductor including: a semiconductor substrate; a TiN/Ti gradient layer formed at an upper portion of the substrate; and a Pt thin film formed at an upper portion of the gradient layer.
  • a silicon or glass may be used as the substrate material.
  • the TiN/Ti gradient layer may be formed on an insulation film formed on the silicon wafer.
  • a method for enhancing the adhesion between a semiconductor substrate and a platinum electrode including: a step for depositing a Ti seed layer on the semiconductor substrate; a step for forming a TiN/Ti gradient layer by irradiating nitrogen ion beam and injecting reaction gas to the surface of the Ti seed layer; and a step for depositing a Pt thin film on the TiN/Ti gradient layer.
  • the injection amount of the ion beam is preferably 1 x 10 15 ⁇ 1 x 10 17 ions/cm 2 .
  • An acceleration voltage is about 1 keV.
  • Nitrogen is used as the reaction gas.
  • An injection amount of the nitrogen gas is advantageously between 0.1 and 6ml/min.
  • a degree of vacuum is preferably 1.5 x 10 " torr.
  • the nitride (TiN gradient layer) formed on the TiN thin film operates as a buffer layer, thereby enhancing the adhesion of Pt and thermal stability. Accordingly, the nitride operates as a diffusion barrier layer at an Ti interface, thereby reducing stress.
  • the substrate is stable to temperature increases, and maintains adhesion. Accordingly, the electric conductivity can be improved by applying the present invention to form an electrode for a semiconductor or fabricating an ultra thin film device of electric electronic materials.
  • Figure 1 a illustrates a TiN/Ti gradient layer on a Ti surface, when nitrogen ion beam was irradiated to the Ti surface
  • Figure 1b illustrates a microstructure of a TiN/Ti gradient layer
  • Figure 2 shows a surface modification apparatus used for the present invention
  • Figure 3 is a graph showing variation of surface roughness according to variation of the ion amount of irradiation, after modifying the Ti surface by nitrogen ion beam assisted reaction;
  • Figure 4A to 4D are an AFM image showing the surface roughness of Figure 3 in a three-dimensional shape
  • Figure 5 is a graph showing variation of the surface roughness according to variation of an injection amount of nitrogen gas which was the reaction gas, when the ion irradiation amount was 1 x 10 16 ions/cm 2 , an ion beam current density was 1 ⁇ A/cm 2 , and an ion beam energy was 1 keV;
  • Figure 6 is a photograph showing the Scotch tape test results of a sample processed according to the nitrogen ion beam assisted reaction method, and a sample which was not;
  • Figure 7 is a photograph showing the Scotch tape test results of the sample processed according to the nitrogen ion beam assisted reaction method, and the sample which was not;
  • Figure 8 is a graph showing variation of the adhesion of the sample which was processed by the nitrogen ion beam assisted reaction method, according to variation of the ion amount of irradiation;
  • Figures 9a to 9d are photographs respectively showing microstructure cross-section, after annealing a sample which was surface-modified according to the present invention, wherein: Figure 9a is a photograph in a state where the sample was annealed for 1 hour at a temperature of 100°C;
  • Figure 9b is a photograph in a state where the sample was annealed for 1 hour at a temperature of 300°C;
  • Figure 9c is a photograph in a state where the sample was annealed for 1 hour at a temperature of 500°C.
  • Figure 9d is a photograph in a state where the sample was annealed for 1 hour at a temperature of 700°C.
  • Figure 10 is a photograph showing an adhesion test result of a surface- modified Ti formed on a glass substrate and Pt formed thereon. MODES FOR CARRYING OUT THE PREFERRED EMBODIMENTS
  • a method for modifying a surface of a ceramic or glass by using an ion beam is basically different in the material structure and mechanism from a method for modifying a surface of a polymer by using ion beam.
  • an inorganic material surface such as ceramic and glass maintains a molecular bonding state having a strong adhesion, through covalent bonding and ion bonding, and thus having a solid phase with high surface strength and adhesion. Accordingly, the bonding scission of the surface, a kind of surface damage, modified by the ion beam are relatively less generated, as compared with the polymer.
  • a strain is varied by stress of the surface or the surface becomes amorphous. That is, a crystal structure and a chemical composition are varied.
  • the surface is varied to a different surface structure to AIN.
  • the surface stress is varied, thereby forming a different aluminum compound layer.
  • the adhesion with Al and Cu is remarkably enhanced. The increase of the adhesion is closely connected with the formation of the hydrophilic group.
  • Figure 1 a is a diagram illustrating a step for forming a TiN/Ti gradient layer on a surface of a Ti thin film 2 formed on a substrate 1 , by irradiating nitrogen ions 3 having energy of 1 keV and injecting nitrogen gas 4.
  • a lattice spacing of a conventional titanium metal thin film was increased due to the gradient TiN resulting from the injection of the nitrogen ions 3, thereby increasing the atom density.
  • Reference numeral 5 denotes the Ti lattice spacing in the TiN layer
  • reference numeral 6 denotes the Ti lattice spacing in the Ti layer.
  • FIG. 2 is a schematic diagram illustrating a surface modification apparatus for modifying the surface of a Ti thin film 13 by using the nitrogen ion beam.
  • the surface atoms of the Ti thin film 13 are activated by the collision with the nitrogen ions of energy of 1keV accelerated by an ion gun 11 from an ion source 10, the Ti thin film 13 reacts with the reaction gas, thereby forming bonds of TiN or TiON.
  • a vacuum pump 14 is provided at one side of the apparatus.
  • a Ti seed layer was formed on a silicon wafer or glass substrate, and a Ti thin film was deposited thereon. Ion was irradiated to the Ti thin film according to a nitrogen ion beam assisted reaction method.
  • the deposition conditions were as follows. A vacuum degree in a chamber was maintained approximately at 3 x 10 " 5 Torr. Thereafter, an ion beam energy of 1 keV was irradiated to the titanium thin film, injecting the nitrogen ions of 2ml/min to a cold cathode ion gun at an operational pressure of 1.2x10 "4 Torr. A deposition speed was approximately 0.1 A/sec, and the deposited titanium thin film was approximately 200A. The thusly-formed titanium thin film was positioned at an upper portion in the chamber. Nitrogen ion beam was irradiated to the thin film, and the nitrogen ions were injected around the thin film, thereby forming a TiN/Ti gradient layer.
  • FIG. 3 is a graph showing variation of the surface roughness of the sample according to variation of the amount of ion irradiation. As compared with other sputtering methods, the surface roughness of the thin film formed by using the ion beam was remarkably low. As shown in the graph, when the sample is not surface-modified at an initial stage, the roughness is 0.26A. When the irradiation amount was increased according to the ion beam assisted reaction method, the roughness of the thin film was constant. However, when the ion beam was irradiated at 1 x 10 17 ions/cm 2 , the roughness sharply increased.
  • Figure 4 is a picture showing variation of the surface roughness according to the amount of ion irradiation of Figure 3 in a three-dimensional shape.
  • Figure 4A is a sample which is not processed
  • Figure 4B is a sample which was processed with the nitrogen ions at the ion irradiation amount of 1 x 10 15 ions/cm 2
  • Figure 4C is a sample which was processed with the nitrogen ions at the ion irradiation amount of 1 x 10 16 ions/cm 2
  • Figure 4D is a sample which was processed with the nitrogen ions at the ion irradiation amount of 1 x 10 17 ions/cm 2 , respectively.
  • Example 2
  • the surface roughness was observed by maintaining the ion irradiation amount of 1 x 10 6 ions/cm 2 , irradiating the ion beam at an acceleration energy of 1 keV, and varying the amount of nitrogen gas to be injected around the sample.
  • Figure 5 is a graph showing the variation of the surface roughness according to variation of the injection amount of the nitrogen gas.
  • the surface becomes softer according to the increase of the amount of the nitrogen gas.
  • the value of the surface roughness increased.
  • Figure 6 is a photograph showing the results of a Scotch tape test performed after depositing the platinum thin film on the TiN/Ti gradient film formed by modifying the Ti surface under the conditions of argon injecting at 2ml/min, the acceleration energy of 1 keV and the nitrogen gas injection amount of 6ml/min.
  • the substrate was not wholly surface- processed, the titanium thin film was deposited on the substrate, and the platinum thin film was deposited thereon. There was no adhesion between the platinum thin film and the titanium thin film. Accordingly, the platinum thin film fell off.
  • the titanium thin film was deposited according to the Argon ion beam sputtering method.
  • Figure 7 is a photograph showing the result of the adhesion test performed by varying the amount of ion irradiation.
  • the condition was (a) 1 x 10 15 ions/cm 2 , (b) 5 x 10 15 ions/cm 2 , and (c) 1 x 10 16 lons/cm 2 .
  • the left side of the samples indicate a portion to which the platinum was adhered, and the right sides thereof indicate a portion which was not processed.
  • the platinum thin film wholly fell off from the right sides.
  • sample (c) showed very good adhesion.
  • Figure 8 is a graph showing the result of the scratch test according to variation of the amount of ion irradiation.
  • a rectangular diamond tip having a diameter of 2mm was employed. The tip was moved in a different direction, and the load was consecutively increased.
  • the adhesion was also enhanced. The adhesion had maximal value at 5 x 10 16 ions/cm 2 . However, when the amount of ion irradiation exceeded 5 x 10 16 ions/cm 2 , the adhesion did not increase.
  • FIG. 9a is a photograph in a state where the sample was annealed for 1 hour at a temperature of 100°C
  • Figure 9b is a photograph in a state where the sample was annealed for 1 hour at a temperature of 300°C.
  • Figure 9c is a photograph in a state where the sample was annealed for 1 hour at a temperature of 500°C
  • Figure 9d is a photograph in a state where the sample was annealed for 1 hour at a temperature of 700°C.
  • the temperature increased, diffusion was generated between the substrate and the thin film. Accordingly, a thermal spike or a hillock phenomenon took place at an interface thereof. However, such phenomena did not happen at the interface of the thin film according to the present invention, even when the temperature rose.
  • a titanium thin film was deposited on a glass substrate, and then the surface thereof was modified by employing a nitrogen ion beam.
  • the platinum thin film was deposited thereon.
  • Figure 10 shows the test result.
  • the adhesion test of the present example after the Scotch tape test, the sample which was not processed and the processed sample were placed in a beaker. Water is poured into the beaker. Thereafter, the water was boiled at a temperature of approximately 120°C for about 6 hours. The samples were tested again with Scotch tape.
  • the adhesion of the Pt electrode deposited on the semiconductor substrate is enhanced, and the influence of the interface resulting from the increase of the temperature is reduced.
  • the oxidation of the Ti thin film which is the intermediate layer is prevented, and the thermal diffusion of the platinum is prevented between the substrate and the Ti thin film.
  • the present invention modifies merely the surface of the Ti thin film by using the nitrogen, and thus can be applied to almost all semiconductor process.
  • the surface is modified with a relatively low energy of a few keV, and thus the energy size of the ion beam is actually not limited.
  • the device can be remarkably simplified.
  • the adhesion between the substrate and the platinum electrode can be enhanced without damaging the surface, and the surface can be stably modified at a high temperature.

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
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PCT/KR2000/000573 2000-06-01 2000-06-01 Platinum electrode structure for semiconductor and method for enhancing adhesion between semiconductor substrate and platinum electrode WO2001093320A1 (en)

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Application Number Priority Date Filing Date Title
KR10-2002-7001202A KR100451415B1 (ko) 2000-06-01 2000-06-01 반도체 기판과 백금 전극간의 접착력 향상 방법 및반도체용 백금 전극 구조
PCT/KR2000/000573 WO2001093320A1 (en) 2000-06-01 2000-06-01 Platinum electrode structure for semiconductor and method for enhancing adhesion between semiconductor substrate and platinum electrode

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PCT/KR2000/000573 WO2001093320A1 (en) 2000-06-01 2000-06-01 Platinum electrode structure for semiconductor and method for enhancing adhesion between semiconductor substrate and platinum electrode

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KR20060020030A (ko) 2004-08-30 2006-03-06 삼성에스디아이 주식회사 도너 기판의 제조방법

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08248442A (ja) * 1995-03-13 1996-09-27 Toshiba Corp 液晶表示装置
US5561307A (en) * 1992-07-23 1996-10-01 Symetrix Corporation Ferroelectric integrated circuit
JPH0945877A (ja) * 1995-07-31 1997-02-14 Matsushita Electron Corp 容量素子の製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5561307A (en) * 1992-07-23 1996-10-01 Symetrix Corporation Ferroelectric integrated circuit
JPH08248442A (ja) * 1995-03-13 1996-09-27 Toshiba Corp 液晶表示装置
JPH0945877A (ja) * 1995-07-31 1997-02-14 Matsushita Electron Corp 容量素子の製造方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
ENSINGER: "Ion bombardment effects during deposition of nitride and metal films", SURFACE AND COATINGS TECHNOLOGY, vol. 99, no. 3, 1998, ELSEVIER SCIENCE, pages 1 - 13 *

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