WO2001065344A2 - Procede et appareil d'alimentation en courant d'un microprocesseur a gestion de chaleur integree et d'interference electromagnetique - Google Patents

Procede et appareil d'alimentation en courant d'un microprocesseur a gestion de chaleur integree et d'interference electromagnetique Download PDF

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Publication number
WO2001065344A2
WO2001065344A2 PCT/US2001/005067 US0105067W WO0165344A2 WO 2001065344 A2 WO2001065344 A2 WO 2001065344A2 US 0105067 W US0105067 W US 0105067W WO 0165344 A2 WO0165344 A2 WO 0165344A2
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WO
WIPO (PCT)
Prior art keywords
circuit board
conductive
substrate
component
board assembly
Prior art date
Application number
PCT/US2001/005067
Other languages
English (en)
Other versions
WO2001065344A3 (fr
WO2001065344B1 (fr
Inventor
Joseph Ted Ii Dibene
David Hartke
James Hjerpe Kaskade
Carl E. Hoge
Original Assignee
Incep Technologies, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Incep Technologies, Inc. filed Critical Incep Technologies, Inc.
Priority to JP2001563974A priority Critical patent/JP2003529921A/ja
Priority to EP01944108A priority patent/EP1256263A2/fr
Priority to AU2001266551A priority patent/AU2001266551A1/en
Priority to CA002400568A priority patent/CA2400568A1/fr
Priority to MXPA02008042A priority patent/MXPA02008042A/es
Publication of WO2001065344A2 publication Critical patent/WO2001065344A2/fr
Publication of WO2001065344A3 publication Critical patent/WO2001065344A3/fr
Publication of WO2001065344B1 publication Critical patent/WO2001065344B1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/427—Cooling by change of state, e.g. use of heat pipes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16—Constructional details or arrangements
    • G06F1/18—Packaging or power distribution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16—Constructional details or arrangements
    • G06F1/18—Packaging or power distribution
    • G06F1/181—Enclosures
    • G06F1/182—Enclosures with special features, e.g. for use in industrial environments; grounding or shielding against radio frequency interference [RFI] or electromagnetical interference [EMI]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16—Constructional details or arrangements
    • G06F1/18—Packaging or power distribution
    • G06F1/189—Power distribution
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/02—Arrangements of circuit components or wiring on supporting structure
    • H05K7/10—Plug-in assemblages of components, e.g. IC sockets
    • H05K7/1092—Plug-in assemblages of components, e.g. IC sockets with built-in components, e.g. intelligent sockets
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15192—Resurf arrangement of the internal vias
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/1031—Surface mounted metallic connector elements
    • H05K2201/10318—Surface mounted metallic pins
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10325—Sockets, i.e. female type connectors comprising metallic connector elements integrated in, or bonded to a common dielectric support
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10598—Means for fastening a component, a casing or a heat sink whereby a pressure is exerted on the component towards the PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10704—Pin grid array [PGA]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10734—Ball grid array [BGA]; Bump grid array
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2018—Presence of a frame in a printed circuit or printed circuit assembly
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/301—Assembling printed circuits with electric components, e.g. with resistor by means of a mounting structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/36—Assembling printed circuits with other printed circuits
    • H05K3/368—Assembling printed circuits with other printed circuits parallel to each other

Definitions

  • the modular circuit board assembly comprises a substrate, having a component mounted thereon, a circuit board, including a circuit for supplying power to the component, and at least one conductive interconnect device disposed between the substrate and the circuit board, the conductive interconnect device configured to electrically couple the circuit to the component.
  • the present invention boosts the volumetric form factor efficiency of the microprocessor.
  • signal integrity/performance, manufacturability, reliability and cost effectiveness are also improved.
  • the architecture is suitable for the generation of three dimensional solutions for microprocessor and electronic circuits configurations that are pre-packaged on, or pre- connected to, interposer boards, OLGAs using BUM technology, CLGAs, Flip-Chip Pin Grid Arrays (FC-PGAs), Flip Chip Ball Grid Arrays (FC-BGAs), as well as other electronic circuits substrates and bare chips.
  • FIG. 17 is a diagram illustrating the power regulator module positioned and aligned over the substrate assembly
  • FIG. 18 is a diagram presenting the power regulator module and substrate assembly
  • FIG. 19 is a diagram showing one embodiment of an integrated thermal power dissipation system
  • FIG. 20 is a diagram illustrating one embodiment of the present invention with including the power regulator, substrate assembly, and the integrated thermal power dissipation system;
  • FIG. 31 is a diagram presenting an cross sectional view showing one implementation of the low inductance frame standoff sub-assembly 3000.
  • a processor 3110 is electrically coupled to a substrate 3112, which is electrically coupled to an interface board 3102, which is coupled to a main board 3104.
  • Power and ground connectivity is supplied from circuit board 3108 to the interface board 3102 by the inner 3004 and outer 3002 frame members, and thence to the processor via substrate 3112.
  • the interface board 3102 is to remove any need to mount power directly to the main board which can improve rout ability and cost on the main board.
  • FIG. 32 is a diagram presenting illustrative method steps used to practice one embodiment of the present invention.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • Combinations Of Printed Boards (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

L'invention concerne une architecture d'emballage de microprocesseur utilisant un ensemble de carte de circuit modulaire qui produit du courant à un microprocesseur, tandis qu'il génère également une interférence électromagnétique (EMI) et thermique intégrée. Ledit ensemble de carte de circuit modulaire comprend un substrat pourvu d'un composant, une carte de circuit comprenant un circuit d'alimentation du composant et au moins un dispositif d'interconnexion conducteur disposé entre le substrat et la carte de circuit, ledit dispositif d'interconnexion étant configuré pour coupler électriquement le circuit au composant.
PCT/US2001/005067 2000-02-18 2001-02-16 Procede et appareil d'alimentation en courant d'un microprocesseur a gestion de chaleur integree et d'interference electromagnetique WO2001065344A2 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2001563974A JP2003529921A (ja) 2000-02-18 2001-02-16 熱およびｅｍｉ管理が統合されたマイクロプロセッサに電力を供給するための方法および装置
EP01944108A EP1256263A2 (fr) 2000-02-18 2001-02-16 Procede et appareil d'alimentation en courant d'un microprocesseur a gestion de chaleur integree et d'interference electromagnetique
AU2001266551A AU2001266551A1 (en) 2000-02-18 2001-02-16 Method and apparatus for providing power to a microprocessor with integrated thermal and emi management
CA002400568A CA2400568A1 (fr) 2000-02-18 2001-02-16 Procede et appareil d'alimentation en courant d'un microprocesseur a gestion de chaleur integree et d'interference electromagnetique
MXPA02008042A MXPA02008042A (es) 2000-02-18 2001-02-16 Metodo y aparato para proporcionar energia a un microprocesador con manejo de interfase integrada termica y electromagnetica.

Applications Claiming Priority (12)

Application Number Priority Date Filing Date Title
US18347400P 2000-02-18 2000-02-18
US60/183,474 2000-02-18
US18676900P 2000-03-03 2000-03-03
US60/186,769 2000-03-03
US18777700P 2000-03-08 2000-03-08
US60/187,777 2000-03-08
US19605900P 2000-04-10 2000-04-10
US60/196,059 2000-04-10
US21981300P 2000-07-21 2000-07-21
US60/219,813 2000-07-21
US23297100P 2000-09-14 2000-09-14
US60/232,971 2000-09-14

Publications (3)

Publication Number Publication Date
WO2001065344A2 true WO2001065344A2 (fr) 2001-09-07
WO2001065344A3 WO2001065344A3 (fr) 2002-04-25
WO2001065344B1 WO2001065344B1 (fr) 2002-06-27

Family

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Family Applications (1)

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PCT/US2001/005067 WO2001065344A2 (fr) 2000-02-18 2001-02-16 Procede et appareil d'alimentation en courant d'un microprocesseur a gestion de chaleur integree et d'interference electromagnetique

Country Status (8)

Country Link
EP (1) EP1256263A2 (fr)
JP (1) JP2003529921A (fr)
KR (1) KR100699094B1 (fr)
CN (1) CN1419803A (fr)
AU (1) AU2001266551A1 (fr)
CA (1) CA2400568A1 (fr)
MX (1) MXPA02008042A (fr)
WO (1) WO2001065344A2 (fr)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002067646A1 (fr) * 2001-02-16 2002-08-29 Koninklijke Philips Electronics N.V. Systeme avec circuit integre monte sur un moyen de support et systeme de modules d'alimentation en energie
WO2003028420A1 (fr) * 2001-09-26 2003-04-03 Molex Incorporated Gestion thermique de systemes d'alimentation pour circuits integres
WO2003073250A2 (fr) * 2002-02-25 2003-09-04 Molex Incorporated Connecteur a alimentation en courant filtree
US6801431B2 (en) 1999-07-15 2004-10-05 Incep Technologies, Inc. Integrated power delivery and cooling system for high power microprocessors
WO2005048323A2 (fr) * 2003-11-04 2005-05-26 Intel Corporation Module de regulation de tension detachable d'un boitier
US6979784B1 (en) 2003-10-17 2005-12-27 Advanced Micro Devices, Inc. Component power interface board
WO2006063277A2 (fr) * 2004-12-10 2006-06-15 Intel Corporation Systemes de refroidissement de plusieurs composants electriques
US7881072B2 (en) 1999-07-15 2011-02-01 Molex Incorporated System and method for processor power delivery and thermal management
WO2016188762A1 (fr) * 2015-05-28 2016-12-01 IFP Energies Nouvelles Dispositif électronique comprenant une carte de circuit imprimé avec un refroidissement amélioré
EP3110238A3 (fr) * 2015-06-26 2017-04-26 Delta Electronics, Inc. Structure d'ensemble et dispositif électronique muni de celle-ci

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6940724B2 (en) * 2003-04-24 2005-09-06 Power-One Limited DC-DC converter implemented in a land grid array package
KR100724916B1 (ko) * 2006-01-02 2007-06-04 삼성전자주식회사 전자회로 패키지
SG135074A1 (en) 2006-02-28 2007-09-28 Micron Technology Inc Microelectronic devices, stacked microelectronic devices, and methods for manufacturing such devices
CN102026481A (zh) * 2009-09-18 2011-04-20 仁宝电脑工业股份有限公司 电路板叠合结构
US9128123B2 (en) * 2011-06-03 2015-09-08 Taiwan Semiconductor Manufacturing Company, Ltd. Interposer test structures and methods
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CN1419803A (zh) 2003-05-21
WO2001065344A3 (fr) 2002-04-25
CA2400568A1 (fr) 2001-09-07
WO2001065344B1 (fr) 2002-06-27
JP2003529921A (ja) 2003-10-07
EP1256263A2 (fr) 2002-11-13
AU2001266551A1 (en) 2001-09-12
KR20020092961A (ko) 2002-12-12
KR100699094B1 (ko) 2007-03-21

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