WO2001026309A1 - Hierarchical output-queued packet-buffering system and method - Google Patents
Hierarchical output-queued packet-buffering system and method Download PDFInfo
- Publication number
- WO2001026309A1 WO2001026309A1 PCT/US2000/027753 US0027753W WO0126309A1 WO 2001026309 A1 WO2001026309 A1 WO 2001026309A1 US 0027753 W US0027753 W US 0027753W WO 0126309 A1 WO0126309 A1 WO 0126309A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- packet
- queues
- level
- priority
- buffer
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/10—Flow control; Congestion control
- H04L47/24—Traffic characterised by specific attributes, e.g. priority or QoS
- H04L47/2441—Traffic characterised by specific attributes, e.g. priority or QoS relying on flow classification, e.g. using integrated services [IntServ]
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/50—Queue scheduling
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/50—Queue scheduling
- H04L47/52—Queue scheduling by attributing bandwidth to queues
- H04L47/521—Static queue service slot or fixed bandwidth allocation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/50—Queue scheduling
- H04L47/62—Queue scheduling characterised by scheduling criteria
- H04L47/6205—Arrangements for avoiding head of line blocking
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/50—Queue scheduling
- H04L47/62—Queue scheduling characterised by scheduling criteria
- H04L47/6215—Individual queue per QOS, rate or priority
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3027—Output queuing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9047—Buffering arrangements including multiple buffers, e.g. buffer pools
- H04L49/9052—Buffering arrangements including multiple buffers, e.g. buffer pools with buffers of different sizes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
- H04L2012/5679—Arbitration or scheduling
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
- H04L2012/5681—Buffer or queue management
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/20—Support for services
- H04L49/205—Quality of Service based
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/25—Routing or path finding in a switch fabric
- H04L49/253—Routing or path finding in a switch fabric using establishment or release of connections between ports
- H04L49/254—Centralised controller, i.e. arbitration or scheduling
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3009—Header conversion, routing tables or routing tags
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/50—Overload detection or protection within a single switching element
- H04L49/505—Corrective measures
- H04L49/508—Head of Line Blocking Avoidance
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9023—Buffering arrangements for implementing a jitter-buffer
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP00973429A EP1222780A1 (en) | 1999-10-06 | 2000-10-06 | Hierarchical output-queued packet-buffering system and method |
AU11934/01A AU1193401A (en) | 1999-10-06 | 2000-10-06 | Hierarchical output-queued packet-buffering system and method |
JP2001529151A JP2003511909A (ja) | 1999-10-06 | 2000-10-06 | 階層状に出力がキューされたパケットバッファリングシステムおよび方法 |
CA002388348A CA2388348A1 (en) | 1999-10-06 | 2000-10-06 | Hierarchical output-queued packet-buffering system and method |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15792599P | 1999-10-06 | 1999-10-06 | |
US60/157,925 | 1999-10-06 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2001026309A1 true WO2001026309A1 (en) | 2001-04-12 |
Family
ID=22565924
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2000/027753 WO2001026309A1 (en) | 1999-10-06 | 2000-10-06 | Hierarchical output-queued packet-buffering system and method |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP1222780A1 (ja) |
JP (1) | JP2003511909A (ja) |
AU (1) | AU1193401A (ja) |
CA (1) | CA2388348A1 (ja) |
WO (1) | WO2001026309A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2014000467A1 (zh) * | 2012-06-29 | 2014-01-03 | 华为技术有限公司 | 一种网络虚拟化系统中带宽调整的方法及装置 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5440523A (en) * | 1993-08-19 | 1995-08-08 | Multimedia Communications, Inc. | Multiple-port shared memory interface and associated method |
DE19617816A1 (de) * | 1996-05-03 | 1997-11-13 | Siemens Ag | Verfahren zum optimierten Übertragen von ATM-Zellen über Verbindungsabschnitte |
US5831980A (en) * | 1996-09-13 | 1998-11-03 | Lsi Logic Corporation | Shared memory fabric architecture for very high speed ATM switches |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2682434B2 (ja) * | 1994-04-05 | 1997-11-26 | 日本電気株式会社 | 出力バッファ型atmスイッチ |
JP3673025B2 (ja) * | 1995-09-18 | 2005-07-20 | 株式会社東芝 | パケット転送装置 |
JP2827998B2 (ja) * | 1995-12-13 | 1998-11-25 | 日本電気株式会社 | Atm交換方法 |
US6324165B1 (en) * | 1997-09-05 | 2001-11-27 | Nec Usa, Inc. | Large capacity, multiclass core ATM switch architecture |
-
2000
- 2000-10-06 CA CA002388348A patent/CA2388348A1/en not_active Abandoned
- 2000-10-06 AU AU11934/01A patent/AU1193401A/en not_active Abandoned
- 2000-10-06 JP JP2001529151A patent/JP2003511909A/ja active Pending
- 2000-10-06 WO PCT/US2000/027753 patent/WO2001026309A1/en not_active Application Discontinuation
- 2000-10-06 EP EP00973429A patent/EP1222780A1/en not_active Withdrawn
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5440523A (en) * | 1993-08-19 | 1995-08-08 | Multimedia Communications, Inc. | Multiple-port shared memory interface and associated method |
DE19617816A1 (de) * | 1996-05-03 | 1997-11-13 | Siemens Ag | Verfahren zum optimierten Übertragen von ATM-Zellen über Verbindungsabschnitte |
US5831980A (en) * | 1996-09-13 | 1998-11-03 | Lsi Logic Corporation | Shared memory fabric architecture for very high speed ATM switches |
Non-Patent Citations (1)
Title |
---|
WOODWORTH C B ET AL: "A FLEXIBLE BROADBAND PACKET SWITCH FOR A MULTIMEDIA INTEGRATED NETWORK", PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON COMMUNICATIONS,US,NEW YORK, IEEE, vol. -, 23 June 1991 (1991-06-23), pages 78 - 85, XP000269383, ISBN: 0-7803-0006-8 * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2014000467A1 (zh) * | 2012-06-29 | 2014-01-03 | 华为技术有限公司 | 一种网络虚拟化系统中带宽调整的方法及装置 |
US9699113B2 (en) | 2012-06-29 | 2017-07-04 | Huawei Technologies Co., Ltd. | Method and apparatus for bandwidth adjustment in network virtualization system |
Also Published As
Publication number | Publication date |
---|---|
EP1222780A1 (en) | 2002-07-17 |
AU1193401A (en) | 2001-05-10 |
JP2003511909A (ja) | 2003-03-25 |
CA2388348A1 (en) | 2001-04-12 |
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