Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L23/00—Details of semiconductor or other solid state devices
  • H01L23/57—Protection from inspection, reverse engineering or tampering
  • H01L23/576—Protection from inspection, reverse engineering or tampering using active circuits
• • G—PHYSICS
  • G06—COMPUTING OR CALCULATING; COUNTING
  • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
  • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
  • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
  • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
  • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
  • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
• • G—PHYSICS
  • G06—COMPUTING OR CALCULATING; COUNTING
  • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
  • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
  • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
  • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
  • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
  • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
  • G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
  • G06K19/07363—Means for preventing undesired reading or writing from or onto record carriers by preventing analysis of the circuit, e.g. dynamic or static power analysis or current analysis
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/42—Wire connectors; Manufacturing methods related thereto
  • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
  • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
  • H01L2224/4805—Shape
  • H01L2224/4809—Loop shape
  • H01L2224/48091—Arched
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/42—Wire connectors; Manufacturing methods related thereto
  • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
  • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
  • H01L2224/481—Disposition
  • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
  • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
  • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
  • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
  • H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item

Definitions

• the invention relates to microcontrollers intended to be incorporated in portable objects and, in particular, in such card format objects more commonly called smart cards.
• Chip cards are generally used in applications in which the security of storage and processing of confidential data is essential. They are in particular intended for applications in the health field, for pay television applications, or even for banking applications, for example so-called electronic purses.
• the microcontrollers are programmed automatons produced in the form of an integrated circuit. They apply a sequence of logical instructions to data from their internal memories or from the outside world, via an input / output pad.
• CMOS complementary metal-oxide-semiconductor
• CMOS complementary metal-oxide-semiconductor
• EEPROM Electrically Erasable Programmable Read Only Memory
• FRAM Feromagnetic Random Access Memory
• RAM Random Access Memory
• Fraudsters have developed so-called current attacks in order to obtain confidential data managed by the microcontroller and for example keys intended for the implementation of encryption algorithms implemented in microcontrollers such as algorithms known as DES (Data Encryption Standard) or RSA (Rivest Shamir Adelman).
• DES Data Encryption Standard
• RSA Raster Shamir Adelman
• fraudsters connect in particular a resistance R of low value, in particular of 1 ⁇ , in series between a voltage supply source V ⁇ c of the microcontroller and its VCC supply pad. They then visualize the variations in the voltage R Icc (t) as a function of time obtained in response to the execution of several hundred or even several thousand instructions applied to identical, similar or different operands by means of a coupled computer, for example, to a digital oscilloscope which amplifies these variations, samples them and digitizes the results obtained for analysis in delayed time.
• a microcontroller intended to be incorporated into a portable object of the smart card type, comprising at least:
• the solution of the invention to this problem relates to such a microcontroller, characterized in that it further comprises:
• the means for varying the supply voltage of the effective data processing part comprise: a variable resistance as a function of time connected in series with the supply pad of the microcontroller, this variable resistance being for example a switch open during time intervals T 0 ff and closed during time intervals Ton, the duty cycle T 0 ff / (T on + T 0 ff) varying as a function of time, the period Ton + T 0 ff varying with time.
• the means for varying the supply voltage of the effective data processing part advantageously comprise a pulse generator, this pulse generator comprising a voltage threshold crossing synchronization circuit at the terminals of the part efficient data processing.
• the means for varying the supply voltage of the effective data processing part also advantageously comprise a capacitor, this capacitor being for example a capacitance whose capacitance is greater than 0.1 nanofarad.
• the microcontroller comprises a main layer of silicon, the active face of which incorporates a circuit and carries the contact pads, is sealed to an additional protective layer by means of a layer. sealing, the means for varying the supply voltage of the effective data processing part being located in the complementary protective layer.
• FIG. 1 shows, in perspective, a smart card according to the invention
• - Figure 2 shows, in cross section, a smart card according to the invention
• FIG. 3 shows, in front view, the contact pads of a smart card according to the invention
• FIG. 4 shows, in perspective, a microcontroller according to the invention
• FIG. 6A represents the active layer of the microcontroller according to the invention shown in FIG. 4
• - Figure 6B shows the complementary layer of the microcontroller according to the invention shown in Figure 4;
• FIG. 7 shows schematically a CMOS inverter of an effective data processing part of a microcontroller according to the invention
• - Figure 8 shows the variations of the control signal V e , of the power supply i cc and of the output signal V s of the CMOS inverter of Figure 7 as a function of time
• Figure 9 is an electrical diagram of a microcontroller according to the invention
• FIGS. 10A to 10D show, respectively, the variations of the signal S, of the intensity of the ICAP current, of the voltage V MCE and of the intensity Icc of the supply current of a microcontroller according to the invention as a function time
• FIG 11 is a comparative recording of the variations in the intensity Icc of the current as a function of time in the case of a microcontroller according to the state of the art (signature A) then in the case of a secure microcontroller according to the invention (signature B);
• FIG. 12 is an electrical diagram of a particular embodiment of a microcontroller according to the invention.
• FIG. 13 shows the variations of the signals Si, S 2 and S3 as a function of time, in the case of a microcontroller corresponding to the embodiment of FIG. 12.
• the portable objects according to the invention are standardized objects defined in particular in the various parts of the ISO7816 standard, the content of which is incorporated herein, by reference citation.
• an object is in the form of a card 1 substantially rectangular parallelepiped and thin, including a body 2 incorporates an electronic module 3.
• the card body 2 is for example made up of five laminated plastic sheets 20, 21, 22, 23 and 24 and includes a cavity 25 for incorporating the module 3.
• the module 3 comprises a microcontroller 30 of which contact pads 300 are electrically connected, by means of conductive wires 31, to contact pads 32 flush with the surface of the card body 2. These areas 32 are based on a thickness 33 of a dielectric of the epoxy glass type.
• the micro-controller 30 and son 31 conductor assembly is coated in a protective resin 34.
• the microcontroller 30 is in the form of a rectangular parallelepiped whose thickness is of the order of 180 ⁇ m and whose surface is of the order of 10 mm 2 .
• This microcontroller 30 comprises a main layer 301 of silicon, the active face of which incorporates a circuit and carries the pads 300 contact, is sealed to a complementary layer 302 of silicon protection by means of a sealing layer 303.
• This complementary layer 302 is provided with openings 304 located directly above the pads 300 in order to allow their connection to the pads 32.
• the pads 300 are five in number. These are the VCC, RST, CLK, I / O and GND pads respectively connected to the VCC, RST, CLK, I / O and GND contact pads of module 3.
• the VCC power pad is intended to power the microphone -controller.
• the reset block RST is intended for the transmission of a reset signal to the microcontroller
• the clock pad CLK is intended for the transmission of a clock signal to the microcontroller
• the pad I / O input / output is intended to allow the exchange of logical data between the microcontroller and the outside world
• the GND grounding pad allows the grounding of the microcontroller.
• the integrated circuit of the microcontroller 30 according to the invention has different active parts. These include a ⁇ CI interface microcontroller part and an efficient part for processing ⁇ CE data shown in Figure 5.
• the interface microcontroller or interface microcontroller ⁇ CI advantageously comprises only means which consume energy which is not capable of revealing information as to the confidential data processed by the microcontroller.
• the ⁇ CI interface microcontroller comprises, for example, a charge pump or interface circuits associated with the RST, CLK and I / O pads.
• the RST pad these are in particular means for detecting an initialization signal and associated means for initializing the microcontroller.
• the CLK pad these are frequency detection means comprised between a low limit and a high limit.
• the I / O pad these are means intended to allow the micro- controller communicate by going from an input mode to an output mode or vice versa.
• the effective data processing part or effective microcontroller ⁇ CE is a part of the microcontroller 30 which comprises sub-assemblies including inverters intended for the processing of confidential data. It therefore constitutes the part of the microcontroller capable of giving fraudsters information about this confidential data.
• it comprises the central processing unit CPU, possibly a cryptoprocessor associated with this unit, control circuits for the data and address buses as well as the RAM, ROM and EEPROM memories or all memories of another type. .
• the microcontroller 30 also comprises a GEN pulse generator, a CAP capacitor and a COM switch.
• the pulse generator, the capacitor and the switch are means for varying the supply voltage of the effective microcontroller.
• the pulse generator GEN is for example formed by two oscillators consisting, for each of them, of an inverter with hysteresis of the Schmitt type on the input circuit, of a capacity connected between the input of the inverter and ground and a resistor connected between the output of this inverter and its input, said two oscillators being coupled together by a resistor to form a frequency modulated signal source.
• the GEN pulse generator advantageously comprises a synchronization circuit for crossing a threshold voltage V se u ⁇ i of the voltage V ⁇ CE across the terminals of the effective microcontroller.
• This circuit can be formed of a voltage comparator whose positive input is connected to a reference voltage, the voltage V seU ⁇ i, whose negative input is connected to the voltage across the terminals of the effective microcontroller, and whose the output is connected to the input D of a flip-flop synchronized by the synchronization signal from the frequency modulated signal source.
• the CAP capacity has a capacity greater than approximately 0.1 nanofarad, in particular between approximately 1 nanofarad and approximately 10 nanofarads, for example of the order of 6 nanofarads. It will be noted that the electrodes with a capacity of 1.5 nanofarad have an area of the order of 1 mm 2 . Also, a capacity of 6 nanofarads has a surface of the order of 4mm 2 .
• the COM switch can be, in the invention, replaced by a variable resistor as a function of time connected in series with the VCC supply pad of the microcontroller.
• the I / O, RST and CLK pads are connected, by electrical connection lines, to the ⁇ CI interface microcontroller.
• the GND pad is connected, by electrical connection lines, to the GEN pulse generator, to the CAP capacitance, to the efficient micro-controller ⁇ CE and to the interface micro-controller ⁇ CI.
• the VCC block is connected, by electrical connection lines, to the GEN pulse generator, to the COM switch and to the ⁇ CI interface microcontroller.
• the COM switch is connected, by electrical connection lines, to the GEN pulse generator and to the CAP capacity.
• an electrical connection line connects the efficient microcontroller ⁇ CE to the electrical connection line connecting the capacitance CAP to the switch COM and an electrical connection line connects the generator GEN to this last line so as to allow monitoring of the voltage V ⁇ cE for its comparison with the voltage V seU ⁇ i.
• the above-mentioned elements are arranged in the manner shown in FIGS. 6A and 6B in which the complementary layer 302 (FIG. 6B) comprises the GEN pulse generator, the capacity CAP and switch COM, and the main layer 301 (FIG. 6A), which carries the contact pads, comprises the effective microcontroller parts ⁇ CE and microcontroller interface ⁇ CI.
• the complementary layer 302 (FIG. 6B) comprises the GEN pulse generator, the capacity CAP and switch COM
• the main layer 301 (FIG. 6A), which carries the contact pads, comprises the effective microcontroller parts ⁇ CE and microcontroller interface ⁇ CI.
• the main layer 301 comprises three interconnection pads PI, P2 and P3, a first pad PI connected to the pad VCC, a second pad P2 connected to the efficient microcontroller and a third pad P3 connected to the GND pad.
• the complementary layer 302 comprises three interconnection pads PI ', P2' and P3 'intended to be placed, in the microcontroller, facing and vertically from the pads PI, P2 and P3, respectively.
• the first pad PI ' is connected, on the one hand, to the switch COM and, on the other hand, to the pulse generator GEN
• the second pad P2' is connected to the common point between the switch COM and the capacitance CAP
• the third pad P3 ′ is connected, on the one hand, to the capacitance CAP and, on the other hand, to the pulse generator GEN.
• the pads PI, P2 and P3 are respectively electrically connected to the pads PI ', P2' and P3 'via conductive bosses.
• microcontroller presented above constitutes only one embodiment according to the invention and it is quite possible to provide other embodiments of microcontrollers which do not show a structure in several layers but a more conventional structure in which the various aforementioned elements: contact pads, interface and efficient microcontrollers, capacitance, pulse generator and switch, are integrated in a single layer of silicon substrate not covered with a complementary layer.
• the energy Ec ⁇ c consumed by a microcontroller is equal to the sum of the energies Ec ⁇ c ⁇ , EC M CE and EC M consumed respectively by the micro-control, the interface, the micro- efficient controller and the pulse generator / capacitor / switch set. So we have the relation:
• the energy Ec ⁇ c ⁇ consumed by the interface microcontroller is not indicative of the instructions executed by the microcontroller 30 and therefore not indicative of the confidential data involved in the execution of said instructions.
• the elementary gates of the efficient microcontroller are inverters 40 as shown in FIG. 7. These inverters 40 are formed by a P-type transistor 401 connected in series with a N-type transistor 402. The transistor P is brought to the voltage V ⁇ cE and the transistor N is earthed GND.
• a capacity Ci is associated with each inverter 40. This capacity Ci is the capacity equivalent to the physical capacities of the interconnection lines of the inverter and to the capacities of the gates forming the transistors P and N of the inverter possibly connected downstream of the inverter of figure 7.
• the transistors P and N are controlled by a common control signal V e corresponding to the input voltage of the inverter.
• V e GND
• FIG. 8 shows the variations of the control signal V e , of the intensity of the supply current i c and of the output signal V s as a function of time t, in the case where the working frequency of the inverter is equal to F ⁇ cE, which is generally the frequency of the clock imposed by the terminal via the CLK pad, but which can be a frequency particular, in the case where the microcontroller is provided with means for generating an internal clock.
• the inverter consumes a short circuit energy E cc , which is equal to: where Isc is the average value of the short-circuit current intensity over the period l / F ⁇ cE.
• the capacity G is charged until reaching the voltage value V M CE and the dynamic energy Ed then consumed is equal to the sum of the energy stored in the capacitor Ci in the form of electrostatic energy and the energy dissipated in the equivalent resistance limiting the load current, here the P-type transistor , is :
• E cc is less than 20% of Ed and E s is much less than Ed.
• Auâsi the energy E c consumed by the inverter i is mainly dynamic and it is estimated that E c "is substantially equal to Ed.
• the energy consumed by the efficient microcontroller on a clock transition is, when said efficient microcontroller is supplied by the voltage V ⁇ cE, substantially equal to:
• the energy consumed by the efficient microcontroller therefore varies with the square of its supply voltage V ⁇ cE.
• the ECM energy consumed by the means of the invention is equal to the ECGEN energy consumed by the pulse generator GEN added to the ECCOM energy consumed by the switch COM and to the ECCAP energy consumed by the CAP capacity. Also :
• ECM ECGEN + ECCOM + ECCAP
• the ECGEN energy consumed by the GEN pulse generator is of the same type as the energy consumed by the interface microcontroller. Indeed, it does not reveal any indication of the confidential data involved in the execution of the instructions.
• the ECCOM energy consumed by the COM switch is in fact the energy dissipated by this switch when the CAP capacity is charged. Also :
• the ECCAP energy consumed by the CAP capacity depends on the open or closed state of the COM switch.
• the open or closed state of the COM switch is controlled by the GEN pulse generator. Indeed, this generator is able to send a control signal S open or close the COM switch. Depending on the ' .S signal received, this switch is closed or open. It is closed for Ton time intervals. It is open during time intervals
• Toff In the time interval T on , the capacity, supplied by the current of intensity Icc, is charged, and its energy consumed ECCAP (T on ) is equal to:
• EccAp (T 0 n) 1/2 C ⁇ V 2 where ⁇ V represents the voltage variation across the capacitors in Ton.
• a fraudster has access only to the intensity of the supply current of the microcontroller as a whole and consequently only to the energy consumed by the microcontroller as a whole.
• the energy consumed by the microcontroller is equal to the energy consumed by the interface microcontroller.
• the efficient microcontroller is supplied by the CAP capacity which discharges. Also, in T 0 ff:
• Ec ⁇ c ⁇ does not reveal any information on the switching of the inverters of the effective microcontroller and consequently no information on the confidential data processed. Also, thanks to the invention, the fraudster will not be able to have access to said data during the time intervals T 0 ff.
• the energy consumed by the microcontroller is equal to the energy consumed by the micro- interface controller, added to the energy consumed by the means according to the invention and added to the energy consumed by the efficient microcontroller. Also :
• EC ⁇ C EC ⁇ CI + EC ⁇ CE + ECM.
• an INS instruction applied to the same OPE operands and executed by the microcontroller according to the invention. In practice, this INS instruction is executed on a few clock transitions. At each clock transition, part of the INS instruction is executed and some of the N inverters of the efficient microcontroller are subject to a change of state for this purpose.
• the energy consumed by the efficient microcontroller during such a transition is directly proportional to the square of the voltage V M CE at the terminals of said microcontroller.
• the voltage V ⁇ cE across the efficient microcontroller is the same as the VCAP voltage across the CAP capacitor.
• the difference between the energies consumed by the effective microcontroller is all the greater as they are functions of the square of the supply voltage V MCE of this microcontroller.
• FIGS. 10A to 10D respectively visualize the signal S, the intensity I C A P of the supply current of the capacitance CAP, the voltage V ⁇ cE of supply of the effective microcontroller and the intensity of the current Icc d ' power supply of the microcontroller as a function of time t. As shown in Figure 10A, the time intervals
• the duty cycle T 0 ff / (T 0 n + T 0 ff) therefore varies over time and, advantageously, randomly and therefore unpredictable for the fraudster.
• the intensity of the current ICAP for supplying the capacitor CAP is positive during the time intervals T on during which the capacitor charges.
• the capacity is at maximum load when the switch goes to the open state.
• the intensity of the ICAP current is negative in the time intervals T 0 ff during which the capacity discharges to supply the efficient microcontroller.
• the supply voltage V ⁇ CE of the effective microcontroller increases in the time intervals T on and decreases in the time intervals T 0 ff.
• ⁇ V represents the depth
• FIG. 11 shows the variations in the intensity of the current Icc as a function of time t, on the one hand, in the case of a microcontroller according to the state of the art (signature A) and, on the other hand part, in the case of the same microcontroller according to the invention (signature B) for the execution of identical instructions applied to the same operands.
• signature A the state of the art
• signature B the same microcontroller according to the invention
• FIG. 12 shows a microcontroller provided with two capacities CAP1 and CAP2, three switches COM l, COM2 and COM3 and three signals SI, S2 and S3 for controlling the opening and closing the three switches COM l, COM2 and COM3, respectively.
• the capacity CAP1 is discharged at a reference voltage, for example GND, through the switch COM3 while the switches COM l and COM2 are open, before being recharged through the switch COM l while COM2 and COM3 switches are open.
• the CAP 1 capacity once loaded through the COM l switch, discharges into the CAP2 capacity in parallel with the effective ⁇ CE microcontroller - through the COM2 switch while the COM l and COM2 switches are open.
• FIG. 13 the sequence of the signals Si, S 2 and S3 has been shown over time.
• the embodiment makes it possible to consume a constant energy independent of the activity of the ⁇ CE. It is no longer possible to obtain confidential information by analyzing the current Icc. This embodiment increases the energy consumption of the efficient microcontroller.

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• Engineering & Computer Science (AREA)
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• Physics & Mathematics (AREA)
• General Physics & Mathematics (AREA)
• General Engineering & Computer Science (AREA)
• Computer Security & Cryptography (AREA)
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• Condensed Matter Physics & Semiconductors (AREA)
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• Microcomputers (AREA)
• Control Of Combustion (AREA)
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• 1999
  • 1999-07-22 FR FR9909555A patent/FR2796738B1/fr not_active Expired - Fee Related
• 2000
  • 2000-07-17 DE DE60008544T patent/DE60008544T9/de active Active
  • 2000-07-17 AT AT00953248T patent/ATE260494T1/de not_active IP Right Cessation
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