WO2001006542A3 - Verfahren zur herstellung eines vertikal-halbleitertransistorbauelements und vertikal-halbleitertransistorbauelement - Google Patents

Verfahren zur herstellung eines vertikal-halbleitertransistorbauelements und vertikal-halbleitertransistorbauelement Download PDF

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Publication number
WO2001006542A3
WO2001006542A3 PCT/DE2000/002316 DE0002316W WO0106542A3 WO 2001006542 A3 WO2001006542 A3 WO 2001006542A3 DE 0002316 W DE0002316 W DE 0002316W WO 0106542 A3 WO0106542 A3 WO 0106542A3
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WO
WIPO (PCT)
Prior art keywords
semiconductor transistor
vertical semiconductor
transistor component
producing
channel layer
Prior art date
Application number
PCT/DE2000/002316
Other languages
English (en)
French (fr)
Other versions
WO2001006542A2 (de
Inventor
Thomas Schulz
Wolfgang Roesner
Martin Franosch
Herbert Schaefer
Lothar Risch
Thomas Aeugle
Original Assignee
Infineon Technologies Ag
Thomas Schulz
Wolfgang Roesner
Martin Franosch
Herbert Schaefer
Lothar Risch
Thomas Aeugle
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Thomas Schulz, Wolfgang Roesner, Martin Franosch, Herbert Schaefer, Lothar Risch, Thomas Aeugle filed Critical Infineon Technologies Ag
Publication of WO2001006542A2 publication Critical patent/WO2001006542A2/de
Publication of WO2001006542A3 publication Critical patent/WO2001006542A3/de
Priority to US10/047,013 priority Critical patent/US6909141B2/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823487MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of vertical transistor structures, i.e. with channel vertical to the substrate surface
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66439Unipolar field-effect transistors with a one- or zero-dimensional channel, e.g. quantum wire FET, in-plane gate transistor [IPG], single electron transistor [SET], striped channel transistor, Coulomb blockade transistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66666Vertical transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/7613Single electron transistors; Coulomb blockade devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having a potential-jump barrier or a surface barrier
    • H10K10/40Organic transistors
    • H10K10/46Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462Insulated gate field-effect transistors [IGFETs]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/20Carbon compounds, e.g. carbon nanotubes or fullerenes
    • H10K85/221Carbon nanotubes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/60Organic compounds having low molecular weight
    • H10K85/615Polycyclic condensed aromatic hydrocarbons, e.g. anthracene

Abstract

Auf einem Substrat (1) ist eine Doppel-Gate-MOSFET-Halbleiterschichtstruktur aufgebaut. Diese besteht aus einer ersten und einer zweiten Gateelektrode (10A, 10B), zwischen denen eine Halbleiter-Kanalschichtzone (4A) eingebettet ist, sowie einem Source- (2A) und Drain-Bereich (2B), welche an gegenüberliegenden Stirnseiten der Halbleiter-Kanalschichtzone (4A) angeordnet sind. An einer der Gateelektroden (10B) ist zumindest eine weitere Halbleiter-Kanalschichtzone (6A) vorgesehen, deren Stirnseiten ebenfalls von dem Source- (2A) und Drain-Bereichen (2B) kontaktiert sind.
PCT/DE2000/002316 1999-07-16 2000-07-17 Verfahren zur herstellung eines vertikal-halbleitertransistorbauelements und vertikal-halbleitertransistorbauelement WO2001006542A2 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/047,013 US6909141B2 (en) 1999-07-16 2002-01-16 Method for producing a vertical semiconductor transistor component and vertical semiconductor transistor component

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19933564.8 1999-07-16
DE19933564A DE19933564C1 (de) 1999-07-16 1999-07-16 Verfahren zur Herstellung eines Vertikal-Halbleitertransistorbauelements und Vertikal-Halbleitertransistorbauelement

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US10/047,013 Continuation US6909141B2 (en) 1999-07-16 2002-01-16 Method for producing a vertical semiconductor transistor component and vertical semiconductor transistor component

Publications (2)

Publication Number Publication Date
WO2001006542A2 WO2001006542A2 (de) 2001-01-25
WO2001006542A3 true WO2001006542A3 (de) 2001-07-19

Family

ID=7915129

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2000/002316 WO2001006542A2 (de) 1999-07-16 2000-07-17 Verfahren zur herstellung eines vertikal-halbleitertransistorbauelements und vertikal-halbleitertransistorbauelement

Country Status (4)

Country Link
US (1) US6909141B2 (de)
DE (1) DE19933564C1 (de)
TW (1) TW469597B (de)
WO (1) WO2001006542A2 (de)

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FR2830686B1 (fr) 2001-10-04 2004-10-22 Commissariat Energie Atomique Transistor a un electron et a canal vertical, et procedes de realisation d'un tel transistor
US6784091B1 (en) * 2003-06-05 2004-08-31 International Business Machines Corporation Maskless array protection process flow for forming interconnect vias in magnetic random access memory devices
ATE445914T1 (de) * 2004-03-11 2009-10-15 Samsung Mobile Display Co Ltd Verfahren zur herstellung eines organischen, vertikalen feldeffekttransistors
JP4425774B2 (ja) * 2004-03-11 2010-03-03 三星モバイルディスプレイ株式會社 垂直電界効果トランジスタ、それによる垂直電界効果トランジスタの製造方法及びそれを備える平板ディスプレイ装置
US7372092B2 (en) * 2005-05-05 2008-05-13 Micron Technology, Inc. Memory cell, device, and system
KR100697291B1 (ko) * 2005-09-15 2007-03-20 삼성전자주식회사 비휘발성 반도체 메모리 장치 및 그 제조방법
EP2064745A1 (de) 2006-09-18 2009-06-03 QuNano AB Verfahren zur herstellung von präzisions-vertikal-und-horizontal-schichten in einer vertikal-halbleiterstruktur
JP2008172164A (ja) * 2007-01-15 2008-07-24 Toshiba Corp 半導体装置
KR101774511B1 (ko) * 2010-12-17 2017-09-05 삼성전자주식회사 수직 채널 트랜지스터를 구비하는 반도체 장치
US8487371B2 (en) * 2011-03-29 2013-07-16 Fairchild Semiconductor Corporation Vertical MOSFET transistor having source/drain contacts disposed on the same side and method for manufacturing the same
US9293591B2 (en) 2011-10-14 2016-03-22 The Board Of Regents Of The University Of Texas System Tunnel field effect transistor (TFET) with lateral oxidation
US9698339B1 (en) * 2015-12-29 2017-07-04 International Business Machines Corporation Magnetic tunnel junction encapsulation using hydrogenated amorphous semiconductor material
US10614867B2 (en) * 2018-07-31 2020-04-07 Spin Memory, Inc. Patterning of high density small feature size pillar structures

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JPH08306905A (ja) * 1995-05-11 1996-11-22 Hitachi Ltd 電子デバイスの製造方法及び電子デバイス
US5871870A (en) * 1996-05-21 1999-02-16 Micron Technology, Inc. Mask for forming features on a semiconductor substrate and a method for forming the mask

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Also Published As

Publication number Publication date
WO2001006542A2 (de) 2001-01-25
DE19933564C1 (de) 2001-01-25
US6909141B2 (en) 2005-06-21
US20020121662A1 (en) 2002-09-05
TW469597B (en) 2001-12-21

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