WO2000077775A1 - Sound switching device - Google Patents

Sound switching device Download PDF

Info

Publication number
WO2000077775A1
WO2000077775A1 PCT/JP2000/003230 JP0003230W WO0077775A1 WO 2000077775 A1 WO2000077775 A1 WO 2000077775A1 JP 0003230 W JP0003230 W JP 0003230W WO 0077775 A1 WO0077775 A1 WO 0077775A1
Authority
WO
WIPO (PCT)
Prior art keywords
signal
circuit
signals
output
sampling frequency
Prior art date
Application number
PCT/JP2000/003230
Other languages
French (fr)
Japanese (ja)
Inventor
Toshiyuki Nomura
Original Assignee
Nec Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corporation filed Critical Nec Corporation
Priority to CA002376816A priority Critical patent/CA2376816A1/en
Priority to AU47789/00A priority patent/AU773996B2/en
Priority to EP00929812A priority patent/EP1204095A4/en
Publication of WO2000077775A1 publication Critical patent/WO2000077775A1/en

Links

Classifications

    • GPHYSICS
    • G10MUSICAL INSTRUMENTS; ACOUSTICS
    • G10LSPEECH ANALYSIS TECHNIQUES OR SPEECH SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING TECHNIQUES; SPEECH OR AUDIO CODING OR DECODING
    • G10L19/00Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
    • G10L19/04Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis using predictive techniques
    • G10L19/16Vocoder architecture
    • G10L19/18Vocoders using multiple modes
    • GPHYSICS
    • G10MUSICAL INSTRUMENTS; ACOUSTICS
    • G10LSPEECH ANALYSIS TECHNIQUES OR SPEECH SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING TECHNIQUES; SPEECH OR AUDIO CODING OR DECODING
    • G10L19/00Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
    • G10L19/04Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis using predictive techniques
    • G10L19/08Determination or coding of the excitation function; Determination or coding of the long-term prediction parameters
    • G10L19/12Determination or coding of the excitation function; Determination or coding of the long-term prediction parameters the excitation function being a code excitation, e.g. in code excited linear prediction [CELP] vocoders

Definitions

  • the present invention relates to an audio encoding / decoding device, and more particularly, to an audio switching device that switches any one of a plurality of audio signals.
  • the encoding circuit outputs the encoded output to the second CELP encoding circuit, and the second CELP encoding circuit encodes the input signal based on the encoded output of the first CELP encoding circuit.
  • the multiplexer outputs the encoded output of the first and second CELP encoding circuits to the bit stream, and the demultiplexer encodes the first CELP encoding circuit from the bit stream when the control signal is at a low bit rate.
  • the bandwidth of the reproduced audio signal that is, the sampling frequency of the decoded audio signal changes according to the bit rate at the time of reception.
  • the sampling frequency setting change processing is required, and during the sampling frequency setting change processing, the reproduced sound is often interrupted.
  • the audio switching device uses two types of sampled audio signals (for example, 8 kHz and 16 kHz) and two standardized audio signals (first digital audio signal and second digital audio signal, respectively). Audio signal) and a control signal, and switch between the first and second audio signals according to the control signal for playback.
  • control signal is a signal for instructing which of the two types of audio signals is to be reproduced.
  • the switching circuit 103 receives the first audio signal, the second audio signal, and the control signal, and switches between the two types of audio signals at the timing when the switching is instructed by the control signal.
  • the DZA conversion circuit 1 1 2 Output to
  • the DZA conversion circuit 112 sets the sampling frequency of the audio signal specified by the control signal, converts the input digital signal to an analog signal, and outputs the analog signal.
  • an audio switching device comprises a plurality of input signals sampled at a plurality of different sampling frequencies and a control signal for designating a signal to be reproduced from the plurality of input signals. And an audio switching device for selecting one of the plurality of input signals according to a control signal and outputting the selected signal, wherein at least one of the plurality of input signals converts a sampling frequency of at least one of the input signals.
  • a sampling frequency conversion circuit a delay adjustment circuit that adjusts the phase of a signal whose sampling frequency has been converted by the sampling frequency conversion circuit with respect to a plurality of input signals, and outputs the remaining input signals, and a plurality of outputs of the delay adjustment circuit And a switching circuit for selecting one signal from the signals according to the control signal.
  • the delay adjustment circuit may adjust the phase of the signal whose sampling frequency has been converted and the phase of the remaining input signal to be the same.
  • the switching circuit may switch the output from a timing at which the switching is instructed by the control signal at a timing in consideration of a delay time in the delay adjustment circuit.
  • the audio switching device of the present invention receives a plurality of input signals sampled at a plurality of different sampling frequencies and a control signal for designating a signal to be reproduced from the plurality of input signals, and receives a plurality of signals according to the control signal.
  • An audio switching device for selecting and outputting one signal from a plurality of input signals comprising: a plurality of sampling frequency conversion circuits for converting sampling frequencies of a plurality of input signals into predetermined frequencies; and a plurality of sampling frequencies. It is characterized by including a delay adjustment circuit that adjusts and outputs a phase between output signals of the conversion circuit, and a switching circuit that selects one signal from a plurality of output signals of the delay adjustment circuit according to a control signal.
  • the delay adjustment circuit may adjust the phase of the signal whose sampling frequency has been converted and the phase of the remaining input signal to be the same.
  • the switching circuit may switch the output from a timing at which the switching is instructed by the control signal at a timing in consideration of a delay time in the delay adjustment circuit.
  • the audio switching device of the present invention receives a plurality of input signals sampled at a plurality of different sampling frequencies and a control signal for designating a signal to be reproduced from the plurality of input signals, and receives a plurality of signals according to the control signal.
  • An audio switching device for selecting and outputting one signal from input signals of at least one of a plurality of input signals.
  • At least one sampling frequency conversion circuit for converting the pulling frequency, a delay adjustment circuit for adjusting the phase of a signal whose sampling frequency has been converted by the sampling frequency conversion circuit for a plurality of input signals, and outputting the remaining input signals, and An adder circuit that selects two signals from a plurality of output signals of the delay adjustment circuit according to a control signal and performs weighting and addition, and one signal from the plurality of output signals of the delay adjustment circuit and the output signal of the adder circuit according to the control signal. And a switching circuit for selecting.
  • the switching circuit switches from the signal before switching the output signal from the delay adjustment circuit to the output signal of the addition circuit from the timing at which the switching is instructed by the control signal to the timing considering the delay time of the delay adjustment circuit. After outputting the output signal of the adding circuit for a predetermined interval, the signal after switching may be output.
  • the audio switching device of the present invention receives a plurality of input signals sampled at a plurality of different sampling frequencies and a control signal for designating a signal to be reproduced from the plurality of input signals, and receives a plurality of signals according to the control signal.
  • a plurality of sampling frequency conversion circuits for converting a sampling frequency of each of a plurality of input signals into a predetermined frequency, and a sampling frequency conversion circuit.
  • a delay adjustment circuit that adjusts the phase between the output signals of the delay adjustment circuit, outputs two signals from a plurality of output signals of the delay adjustment circuit, selects and weights and adds two signals according to a control signal, and a plurality of output signals of the delay adjustment circuit And a switching circuit for selecting one signal from the output signal of the adding circuit according to the control signal.
  • the switching circuit switches from the signal before switching the output signal from the delay adjustment circuit to the output signal of the addition circuit from the timing at which the switching is instructed by the control signal to the timing considering the delay time of the delay adjustment circuit. After outputting the output signal of the adding circuit for a predetermined interval, the signal after switching may be output.
  • the above audio switching device is an audio decoding circuit that decodes a plurality of signals sampled from one bit stream at different sampling frequencies and outputs the decoded signals as a plurality of input signals to a sampling frequency conversion circuit or a delay adjustment circuit. It may be arranged such that one signal is selected from a plurality of output decoded signals of the audio decoding circuit by a control signal in accordance with a bit rate at the time of reception and output.
  • the above audio switching device inputs a bit stream obtained by multiplexing a plurality of bit streams obtained by compressing a plurality of types of signals having different sampling frequencies, and switches to a plurality of output terminals according to the type of the bit stream.
  • a bit stream switching circuit for outputting, and a plurality of audio decoding circuits for respectively decoding the bit stream output from the bit stream switching circuit and outputting as a plurality of input signals to a sampling frequency conversion circuit or a delay adjustment circuit.
  • One of the decoded signals output from the audio decoding circuit may be selected and output according to the control signal.
  • FIG. 1 is a diagram showing the configuration of the first exemplary embodiment of the present invention.
  • FIG. 2 is a diagram showing the configuration of the second exemplary embodiment of the present invention.
  • FIG. 3 is a diagram showing the configuration of the third exemplary embodiment of the present invention.
  • FIG. 4 is a diagram showing the configuration of the fourth exemplary embodiment of the present invention.
  • FIG. 5 is a diagram showing a configuration of the fifth exemplary embodiment of the present invention.
  • FIG. 6 is a diagram showing a configuration of the sixth exemplary embodiment of the present invention.
  • FIG. 7 is a diagram illustrating an example of a configuration of a conventional voice switching device. BEST MODE FOR CARRYING OUT THE INVENTION
  • the present invention converts a plurality of digital audio signals having different sampling frequencies to the same sampling frequency in order to eliminate the interruption of the reproduced sound caused by setting the sampling frequency when switching the reproduction of digital audio signals having different sampling frequencies. It is designed to adjust the phase generated thereby and reproduce.
  • a sampling frequency conversion circuit (1 in Fig. 1) that converts the sampling frequency of a digital audio signal
  • a delay adjustment circuit ( Figure 1) that adjusts the phase shift caused by the sampling frequency conversion between a plurality of digital audio signals. 1) 2) and.
  • the sampling frequency conversion circuit and the delay adjustment circuit by setting the sampling frequency conversion circuit and the delay adjustment circuit to have the same phase as the sampling frequency of the digital signal before and after the switching, the sampling frequency setting in the DZA circuit is not required, and the reproduced sound is interrupted. It becomes difficult to repel.
  • the addition circuit weights and adds the digital signal before and after the switching, so that the discontinuity between the last sample of the audio signal before the switching and the starting sample of the interval is compared with the case where no weighting addition is performed. Less.
  • the switching circuit by performing switching after outputting the output signal of the adding circuit at a predetermined interval, discontinuity between samples at the beginning and end of the interval is reduced, so that abnormal noise is less likely to occur in reproduced sound. Become.
  • FIG. 1 is a block diagram showing a configuration of the first exemplary embodiment of the present invention.
  • a first embodiment of the present invention provides two different sampling frequencies (eg, 8 kHz and 16 kHz) of audio signals (a first audio signal and a second audio signal, respectively). 2) and a control signal for instructing which of the two types of audio signals to reproduce, and switch the audio signal according to the control signal for reproduction.
  • sampling frequencies eg, 8 kHz and 16 kHz
  • Sampling frequency conversion circuit 1 converts the sampling frequency of the first audio signal a second equal as the sampling frequency conversion with the sampling frequency of the audio signal (e.g., a Sanpurigu frequency from 8 k H Z in 1 6 k H Z ) And outputs it to the delay adjustment circuit 2.
  • the sampling frequency conversion circuit 1 performs frequency conversion by performing a frequency multiplication or frequency division circuit, or an interpolation or decimation process, and a known circuit is used for this frequency conversion. For example, reference is made to the description in Section 4.1.1 ( Figure 4-1-8) of the document entitled "Multirate Systems and Filter Banks J" by PP Vaidyanathan.
  • the processing of the sampling frequency conversion circuit 1 causes a phase delay of the output signal with respect to the input signal.
  • D be the delay time that occurs at this time.
  • the delay adjustment circuit 2 outputs to the switching circuit 3 a signal obtained by delaying the input second audio signal by a delay circuit (not shown) by a delay time D and an output signal of the sampling frequency circuit 1.
  • a delay circuit an arbitrary one such as an inverter train or a delay line is used.
  • the switching circuit 3 inputs the first audio signal whose sampling frequency has been converted and the second audio signal whose delay has been adjusted from the delay adjustment circuit 2, and takes the delay time D into account, and in accordance with the control signal, Switch between two types of audio signals and output to DZA conversion circuit 4.
  • the DZ ⁇ conversion circuit 4 converts the input digital audio signal into an analog signal and outputs it.
  • the analog signal is provided to a user via a speaker, headphones, or the like.
  • FIG. 2 is a block diagram showing the configuration of the second exemplary embodiment of the present invention.
  • the second embodiment of the present invention is different from the first embodiment in that a sampling frequency circuit 5 for converting a sampling frequency of a second audio signal is further added.
  • the sampling frequency conversion circuit 1 converts the sampling frequency of the first audio signal into a predetermined sampling frequency and outputs the same to the delay adjustment circuit 2.
  • the sampling frequency conversion circuit 5 converts the sampling frequency of the second audio signal into the predetermined sampling frequency and outputs the same to the delay adjustment circuit 2. Note that the delay time generated by the sampling frequency conversion circuit 1 is D1, and the delay time generated by the sampling frequency conversion circuit 5 is D2.
  • the delay adjustment circuit 2 adjusts the delay so that the phases of the first audio signal and the second audio signal that have been subjected to the sampling frequency conversion are the same, and outputs the same to the switching circuit 3.
  • the longer one of the delay times D1 and D2 is set to D, and both signals are delayed by the same time, that is, the delay time D by a delay circuit (not shown).
  • the switching circuit 3 receives the first audio signal and the second audio signal that have been subjected to the sampling frequency conversion and the delay adjustment from the delay adjustment circuit 2, and takes the delay time D into consideration.
  • the two types of audio signals are switched according to the control signal and output to the DZA conversion circuit 4.
  • the D / A conversion circuit 4 converts the input digital audio signal into an analog signal and outputs it.
  • the analog signal is provided to a user via a speaker, headphones, or the like.
  • the sampling frequencies of the first and second audio signals are 8 kHz and 12 kHz, respectively
  • the first and second audio signals are sampled by the sampling frequency circuit. Is converted to 24 kHz, so that the processing amount of the sampling frequency conversion can be reduced as compared with the first embodiment in which only the first audio signal is converted to the sampling frequency of 12 kHz.
  • FIG. 3 is a block diagram showing a configuration of the third exemplary embodiment of the present invention.
  • the third embodiment of the present invention further includes an adder circuit 6 and differs from the first embodiment in the operation of the switching circuit 7.
  • the sampling frequency conversion circuit 1 converts the sampling frequency of the first audio signal to be equal to the sampling frequency of the second audio signal, and outputs it to the delay adjustment circuit 2.
  • the delay time generated by the sampling frequency conversion circuit 1 is D.
  • the delay adjustment circuit 2 outputs a signal obtained by delaying the input second audio signal by the delay time D and an output signal of the sampling frequency circuit 1 to the addition circuit 6 and the switching circuit 7.
  • the adding circuit 6 weights and adds the sampling frequency-converted first audio signal and the delay-adjusted second audio signal, and outputs the result to the switching circuit 7.
  • the signals before and after switching are
  • the output signal of the adder circuit 5 is S 3 (n),
  • n 0, ⁇ ,.,., ⁇ -1
  • is the number of samples representing the interval at which the output signal of the adder circuit is used, and is determined for each sampling frequency of the input audio signal.
  • the switching circuit 7 receives the sampling frequency-converted first audio signal, the delay-adjusted second audio signal, the output signal of the adding circuit 6, and the control signal, and the switching signal is instructed by the control signal.
  • the output signal is switched from the signal SI (n) before switching to the output signal S 3 (n) of the adder circuit 6 at a timing that takes the delay time D into consideration from the output timing, and S 3 (n ), And outputs the switched signal S 1 (n) to the D / A conversion circuit.
  • the DZA conversion circuit 4 converts the input digital audio signal into an analog signal and outputs it.
  • the analog signal is provided to a user via a speaker, headphones, or the like.
  • FIG. 4 is a block diagram showing a configuration of the fourth exemplary embodiment of the present invention.
  • the fourth embodiment of the present invention further includes an adder circuit 6 and differs from the second embodiment in the operation of the switching circuit 7.
  • the operations of the adder circuit 6 and the switching circuit 7 are the same as those described in the third embodiment.
  • the sampling frequency conversion circuit 1 converts the sampling frequency of the first audio signal to a predetermined sampling frequency (for example, 24 kHz) and outputs the same to the delay adjustment circuit 2.
  • the sampling frequency conversion circuit 5 converts the sampling frequency of the second audio signal into a predetermined sampling frequency, and outputs it to the delay adjustment circuit 2.
  • the delay time generated by the sampling frequency conversion circuit 1 is D1
  • the delay time generated by the sampling frequency conversion circuit 5 is D2.
  • the delay adjustment circuit 2 adjusts the delay so that the phases of the first audio signal and the second audio signal subjected to the sampling frequency conversion become the same, and outputs the same to the addition circuit 6 and the switching circuit 7.
  • the longer one of the delay times D 1 and D 2 is set to D, and both signals are delayed by the delay time D.
  • the adder 6 weights and adds the first audio signal and the second audio signal whose sampling frequency has been converted and the delay has been adjusted, and outputs the result to the switching circuit 7.
  • the above equation (1) is used as an example of weighted addition.
  • the signals SI (n) and S2 (n) before and after the switching one of the first audio signal and the second audio signal subjected to the sampling frequency conversion and the delay adjustment is assigned.
  • the switching circuit 7 receives the first audio signal, the second audio signal, which has been subjected to the sampling frequency conversion and the delay adjustment, the output signal of the adding circuit 6, and the control signal, and starts from the timing at which the switching is instructed by the control signal.
  • the output signal is switched from the signal SI (n) before switching to the output signal S3 (n) of the adder circuit 5, and S3 (n) for a predetermined interval. After that, the switched signal SI (n) is output to the DZA conversion circuit.
  • the D / A conversion circuit 4 converts the input digital audio signal into an analog signal and outputs it.
  • the analog signal is provided to a user via a speaker, a headphone, or the like.
  • FIG. 5 is a block diagram showing, as a fifth embodiment of the present invention, a configuration of a voice decoding circuit 8 based on bandwidth hierarchical voice coding and a voice switching device in which the configuration of the third embodiment is combined. It is.
  • a bandwidth hierarchical audio decoding circuit 8 converts a digital audio signal obtained by decoding an input bit stream into a sampling frequency conversion circuit. 1. Output to the delay circuit 2 as a first digital audio signal or a second digital audio signal, respectively.
  • Bandwidth hierarchical audio decoding circuit 8 outputs a control signal for instructing which of the two types of audio signals to reproduce, to addition circuit 6 and switching circuit 7.
  • bit stream is divided into a basic part essential for decoding the compressed audio signal information and an extended part for improving the quality by expanding the bandwidth of the audio signal.
  • the bandwidth hierarchical speech decoding circuit 8 decodes a speech signal having a narrow bandwidth (for example, a digital signal having a sampling frequency of 8 kHz) and performs sampling. Output to frequency conversion circuit 1.
  • the extension decodes an audio signal with a wider bandwidth (for example, a digital signal with a sampling frequency of 16 kHz) and outputs it to the delay adjustment circuit 2.
  • a wider bandwidth for example, a digital signal with a sampling frequency of 16 kHz
  • the bandwidth-layered speech decoding circuit 8 is an extension In the case where only the basic part is used and the extended part is used, a plurality of decoded signals can be simultaneously decoded.
  • sampling frequency conversion circuit 1 The description of the operation of the sampling frequency conversion circuit 1, the delay adjustment circuit 2, the addition circuit 6, the switching circuit 7, and the D / A conversion circuit 4 is the same as that described in the second embodiment. Omitted.
  • FIG. 6 is a block diagram showing a configuration of a voice switching device in which a plurality of voice decoding circuits and the first embodiment are combined as a sixth embodiment of the present invention.
  • bit stream switching circuit 11 receives a bit stream obtained by multiplexing a plurality of bit streams obtained by compressing signals of different sampling frequencies, and The input bit stream is output to the first audio decoding circuit 9 or the second audio decoding circuit 10 according to the type of the input bit stream.
  • bit stream multiplexing method a plurality of bit streams may be multiplexed simultaneously or may be switched and multiplexed.
  • two types of audio signals are decoded simultaneously from the two types of bit streams, while in the latter case, the audio signal is decoded from only one of the bit streams.
  • bit stream switching circuit 11 outputs to the switching circuit 3 a control signal for instructing which of the two types of audio signals to reproduce.
  • the first speech decoding circuit 9 decodes a bit stream having a lower bit rate (for example, 8 kbit / s) than the second speech decoding circuit 10 (for example, a sampling frequency Is output to the sampling frequency conversion circuit 1 as a first digital audio signal.
  • a lower bit rate for example, 8 kbit / s
  • the second speech decoding circuit 10 for example, a sampling frequency Is output to the sampling frequency conversion circuit 1 as a first digital audio signal.
  • the second audio decoding circuit 10 decodes a bit stream having a higher bit rate (for example, 16 kbit / s) than the first audio decoding circuit 9 (for example, if the sampling frequency is 16 kHz digital signal) to the second digital It is output to the delay adjustment circuit 2 as an audio signal.
  • a higher bit rate for example, 16 kbit / s
  • the first audio decoding circuit 9 for example, if the sampling frequency is 16 kHz digital signal
  • sampling frequency conversion circuit 1 The operations of the sampling frequency conversion circuit 1, the delay adjustment circuit 2, the switching circuit 3, and the DZA conversion circuit 4 are the same as those of the first embodiment, and the description thereof will be omitted.
  • FIG. 5 shows a combination of the bandwidth hierarchical speech decoding circuit and the configuration of the third embodiment.
  • FIG. 6 shows a plurality of speech decoding circuits and the configuration of the first embodiment. Is shown, but it goes without saying that any combination of the above embodiments may be used.
  • both signals overlap when switching between the first audio signal and the second audio signal. Need to be.
  • the combination with the bandwidth hierarchical audio decoding circuit or when a plurality of audio decoding circuits are used, a plurality of input bit streams are required. Must be multiplexed simultaneously.
  • the reason is that, in the present invention, by changing the sampling frequency and the phase of the signals before and after switching of a plurality of audio signals to be the same, it is not necessary to change the sampling frequency setting.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computational Linguistics (AREA)
  • Signal Processing (AREA)
  • Health & Medical Sciences (AREA)
  • Audiology, Speech & Language Pathology (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Multimedia (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

A sound switching device is provided with a sampling frequency converting circuit (1) for converting the sampling frequency of an input signal, a delay adjusting circuit (2) for adjusting and outputting the phases of the signal whose sampling frequency is converted and the other input signal, a switching circuit (3) for selecting a signal from the output signals of the delay adjusting circuit according to a control signal. This makes it possible to reduce noise in switching the reproduction of one of different sound signals to that of another signal.

Description

明 細 書 音声切替装置 技術分野  Description Audio switching device Technical field
本発明は、 音声符号化 ·復号装置に関し、 特に、 複数の音声信号のいずれか一 を切替える音声切替装置に関する。 背景技術  The present invention relates to an audio encoding / decoding device, and more particularly, to an audio switching device that switches any one of a plurality of audio signals. Background art
従来、 ビットレートが変化する伝送路上で音声を伝送する際に、 伝送路ビット レートに応じて音声信号の帯域幅を増減させることにより、 符号化ビットレート を伝送路ビットレートに適応させて、 再生音声信号の品質を調整する符号化方法 が用いられている。 例えば本願発明者はすでに特開平 9— 2 0 2 4 7 5号公報に において、 音声信号を階層的に符号化する際に、 入力音声信号のサンプリング周 波数を変化させた信号を N + 1個作成し、 入力音声信号と前記サンプリング周波 数を変化させた信号を、 サンプリング周波数が低い信号から順次、 符号化して得 た線形予測係数とピッチとマルチパス信号とゲインを表すィンデックスを N階層 分まとめて多重化する音声符号化装置、 及び、 復号するビットレートに応じて再 生信号のサンプリング周波数が階層的に変わる音声復号装置として、 ダウンサン プリング回路で入力信号をダウンサンプリングした信号を受ける第一 C E L P Conventionally, when transmitting audio over a transmission line where the bit rate changes, the bandwidth of the audio signal is increased or decreased according to the transmission line bit rate, so that the encoding bit rate is adapted to the transmission line bit rate and played back. An encoding method for adjusting the quality of the audio signal is used. For example, the inventor of the present application has already disclosed in Japanese Patent Application Laid-Open No. 9-202475 that when an audio signal is hierarchically encoded, N + 1 signals obtained by changing the sampling frequency of the input audio signal are used. A linear prediction coefficient, a pitch, a multipath signal, and an index representing a gain obtained by encoding an input audio signal and a signal obtained by changing the sampling frequency in order from a signal having a lower sampling frequency, for N layers. As an audio encoding device that performs multiplexing by means of a multiplexing, and an audio decoding device in which the sampling frequency of a reproduced signal changes hierarchically according to the bit rate to be decoded, CELP
(符号励振型線形予測) 符号化回路は符号化出力を第二 C E L P符号化回路に出 力し、 第二 C E L P符号化回路は入力信号を第一 C E L P符号化回路の符号化出 力に基づき符号化し、 マルチプレクサは、 第一、 第二 C E L P符号化回路の符号 化出力をビットス トリームに出力し、 デマルチプレクサは、 制御信号が低ビット レートのとき、 ビットストリームから第一 C E L P符号化回路の符号化出力を第 — C E L P復号回路に出力し、 高ビットレートのとき、 ビットス トリームから第 - C E L P符号化回路の出力の一部と第二 C E L P符号化回路の出力を抽出し、 第二 C E L P復号回路に出力し、 切替回路を介して出力する音声符号化復号装置 を提案している。 (Code-excited linear prediction) The encoding circuit outputs the encoded output to the second CELP encoding circuit, and the second CELP encoding circuit encodes the input signal based on the encoded output of the first CELP encoding circuit. The multiplexer outputs the encoded output of the first and second CELP encoding circuits to the bit stream, and the demultiplexer encodes the first CELP encoding circuit from the bit stream when the control signal is at a low bit rate. Output the output to the CELP decoding circuit. At a high bit rate, extract a part of the output of the CELP encoding circuit and the output of the second CELP encoding circuit from the bit stream and output it to the second CELP decoding circuit. Speech encoding / decoding device for outputting and outputting via a switching circuit Has been proposed.
復号側では、 受信時のビットレートに応じて、 再生音声信号の帯域幅、 すなわ ち、 復号された音声信号のサンプリング周波数が変化する。 一方、 標本化された 音声信号を受聴する際、 ディジタル信号からアナログ信号への変換処理のためサ ンプリング周波数の設定を必要とする。 このとき、 サンプリング周波数の異なる 音声信号を切替えて再生するためには、 サンプリング周波数の設定変更処理を必 要とされ、 サンプリング周波数の設定変更処理の間、 再生音の途切れが生じる場 合が多い。  On the decoding side, the bandwidth of the reproduced audio signal, that is, the sampling frequency of the decoded audio signal changes according to the bit rate at the time of reception. On the other hand, when listening to sampled audio signals, it is necessary to set the sampling frequency for the conversion process from digital signals to analog signals. At this time, in order to switch and reproduce the audio signals having different sampling frequencies, the sampling frequency setting change processing is required, and during the sampling frequency setting change processing, the reproduced sound is often interrupted.
図 7を参照して、 従来の音声切替装置の動作を説明する。 音声切替装置は、 2 種類のサンプリング周波数 (例えば、 8 k H zと 1 6 k H z ) で、 それぞれ、 標 本化された 2種類の音声信号 (第 1のディジタル音声信号、 第 2のディジタル音 声信号) と、 制御信号とを入力し、 制御信号に従い第 1、 第 2の音声信号を切替 えて再生する。  The operation of the conventional voice switching device will be described with reference to FIG. The audio switching device uses two types of sampled audio signals (for example, 8 kHz and 16 kHz) and two standardized audio signals (first digital audio signal and second digital audio signal, respectively). Audio signal) and a control signal, and switch between the first and second audio signals according to the control signal for playback.
ここで、 制御信号は 2種類の音声信号のうちどちらを再生するかを指示する信 号である。  Here, the control signal is a signal for instructing which of the two types of audio signals is to be reproduced.
切替回路 1 0 3は、 第 1の音声信号と第 2の音声信号と制御信号とを入力し、 制御信号により切替が指示されたタイミングで 2種類の音声信号を切替えて D Z A変換回路 1 1 2に出力する。  The switching circuit 103 receives the first audio signal, the second audio signal, and the control signal, and switches between the two types of audio signals at the timing when the switching is instructed by the control signal. The DZA conversion circuit 1 1 2 Output to
D ZA変換回路 1 1 2は、 制御信号により指示された音声信号のサンプリング 周波数を設定し、 入力ディジタル信号をアナログ信号に変換し出力する。  The DZA conversion circuit 112 sets the sampling frequency of the audio signal specified by the control signal, converts the input digital signal to an analog signal, and outputs the analog signal.
上述した従来の音声切替装置では、 サンプリング周波数の異なる音声信号を切 替えて再生する際には、 D ZA変換回路におけるサンプリング周波数の設定変更 処理が必要とされており、 設定変更処理の間、 再生音の途切れが生じる、 という 問題点を有している。  In the above-described conventional audio switching device, when switching and reproducing an audio signal having a different sampling frequency, it is necessary to change the sampling frequency setting in the DZA conversion circuit. The problem is that the sound is interrupted.
したがって本発明は、 上記問題点に鑑みてなされたものであって、 その目的は、 複数の異なる音声信号の再生切替時における異音を低減することができる音声切 替装置を提供することにある。 発明の開示 上記の目的を達成するために本発明の音声切替装置は、 複数種の異なるサンプ リング周波数で標本化された複数の入力信号と複数の入力信号の中から再生すベ き信号を指定する制御信号とを入力し制御信号に従い複数の入力信号から一つの 信号を選択して出力する音声切替装置であって、 複数の入力信号のうちの少なく とも一つの入力信号のサンプリング周波数を変換する少なくとも一つのサンプリ ング周波数変換回路と、 複数の入力信号についてサンプリング周波数変換回路で サンプリング周波数が変換された信号と残りの入力信号との位相を調整して出力 する遅延調整回路と、 遅延調整回路の複数の出力信号から一つの信号を制御信号 に従い選択する切替回路とを備えることによって特徴づけられる。 Therefore, the present invention has been made in view of the above problems, and an object of the present invention is to provide an audio switching device capable of reducing abnormal noise when switching reproduction of a plurality of different audio signals. . Disclosure of the invention To achieve the above object, an audio switching device according to the present invention comprises a plurality of input signals sampled at a plurality of different sampling frequencies and a control signal for designating a signal to be reproduced from the plurality of input signals. And an audio switching device for selecting one of the plurality of input signals according to a control signal and outputting the selected signal, wherein at least one of the plurality of input signals converts a sampling frequency of at least one of the input signals. A sampling frequency conversion circuit, a delay adjustment circuit that adjusts the phase of a signal whose sampling frequency has been converted by the sampling frequency conversion circuit with respect to a plurality of input signals, and outputs the remaining input signals, and a plurality of outputs of the delay adjustment circuit And a switching circuit for selecting one signal from the signals according to the control signal.
ここで、 遅延調整回路は、 サンプリング周波数が変換された信号の位相と、 残 りの入力信号の位相とが同じになるように調整するようにしてもよい。  Here, the delay adjustment circuit may adjust the phase of the signal whose sampling frequency has been converted and the phase of the remaining input signal to be the same.
また、 切替回路は、 制御信号により切替が指示されたタイミングから遅延調整 回路での遅延時間を考慮したタイミングで出力を切り替えるようにしてもよい。 また、 本発明の音声切替装置は、 複数種の異なるサンプリング周波数で標本化 された複数の入力信号と複数の入力信号の中から再生すべき信号を指定する制御 信号とを入力し制御信号に従い複数の入力信号から一つの信号を選択して出力す る音声切替装置であって、 複数の入力信号のサンプリング周波数をそれぞれ予め 定めた周波数に変換する複数のサンプリング周波数変換回路と、 複数のサンプリ ング周波数変換回路の出力信号間の位相を調整して出力する遅延調整回路と、 遅 延調整回路の複数の出力信号から一つの信号を制御信号に従い選択する切替回路 とを備えることによって特徴づけられる。  Further, the switching circuit may switch the output from a timing at which the switching is instructed by the control signal at a timing in consideration of a delay time in the delay adjustment circuit. Also, the audio switching device of the present invention receives a plurality of input signals sampled at a plurality of different sampling frequencies and a control signal for designating a signal to be reproduced from the plurality of input signals, and receives a plurality of signals according to the control signal. An audio switching device for selecting and outputting one signal from a plurality of input signals, comprising: a plurality of sampling frequency conversion circuits for converting sampling frequencies of a plurality of input signals into predetermined frequencies; and a plurality of sampling frequencies. It is characterized by including a delay adjustment circuit that adjusts and outputs a phase between output signals of the conversion circuit, and a switching circuit that selects one signal from a plurality of output signals of the delay adjustment circuit according to a control signal.
ここで、 遅延調整回路は、 サンプリング周波数が変換された信号の位相と、 残 りの入力信号の位相とが同じになるように調整するようにしてもよい。  Here, the delay adjustment circuit may adjust the phase of the signal whose sampling frequency has been converted and the phase of the remaining input signal to be the same.
また、 切替回路は、 制御信号により切替が指示されたタイミングから遅延調整 回路での遅延時間を考慮したタイミングで出力を切り替えるようにしてもよい。 また、 本発明の音声切替装置は、 複数種の異なるサンプリング周波数で標本化 された複数の入力信号と複数の入力信号の中から再生すべき信号を指定する制御 信号とを入力し制御信号に従い複数の入力信号から一つの信号を選択して出力す る音声切替装置であって、 複数の入力信号のうちの少なくとも一つの信号のサン プリング周波数を変換する少なくとも一つのサンプリング周波数変換回路と、 複 数の入力信号についてサンプリング周波数変換回路でサンプリング周波数が変換 された信号と残りの入力信号との位相を調整して出力する遅延調整回路と、 遅延 調整回路の複数の出力信号から二つの信号を制御信号に従い選択して重み付け加 算する加算回路と、 遅延調整回路の複数の出力信号と加算回路の出力信号から一 つの信号を制御信号に従い選択する切替回路とを備えることによって特徴づけら れる。 Further, the switching circuit may switch the output from a timing at which the switching is instructed by the control signal at a timing in consideration of a delay time in the delay adjustment circuit. Also, the audio switching device of the present invention receives a plurality of input signals sampled at a plurality of different sampling frequencies and a control signal for designating a signal to be reproduced from the plurality of input signals, and receives a plurality of signals according to the control signal. An audio switching device for selecting and outputting one signal from input signals of at least one of a plurality of input signals. At least one sampling frequency conversion circuit for converting the pulling frequency, a delay adjustment circuit for adjusting the phase of a signal whose sampling frequency has been converted by the sampling frequency conversion circuit for a plurality of input signals, and outputting the remaining input signals, and An adder circuit that selects two signals from a plurality of output signals of the delay adjustment circuit according to a control signal and performs weighting and addition, and one signal from the plurality of output signals of the delay adjustment circuit and the output signal of the adder circuit according to the control signal. And a switching circuit for selecting.
ここで、 切替回路は、 制御信号により切替が指示されたタイミングから遅延調 整回路の遅延時間を考慮したタイミングで、 遅延調整回路からの出力信号の切替 前の信号から加算回路の出力信号に切替え、 所定間隔だけ加算回路の出力信号を 出力した後、 切替後の信号を出力するようにしてもよい。  Here, the switching circuit switches from the signal before switching the output signal from the delay adjustment circuit to the output signal of the addition circuit from the timing at which the switching is instructed by the control signal to the timing considering the delay time of the delay adjustment circuit. After outputting the output signal of the adding circuit for a predetermined interval, the signal after switching may be output.
また、 本発明の音声切替装置は、 複数種の異なるサンプリング周波数で標本化 された複数の入力信号と複数の入力信号の中から再生すべき信号を指定する制御 信号とを入力し制御信号に従い複数の入力信号から一つの信号を選択して出力す る音声切替装置であって、 複数の入力信号のサンプリング周波数をそれぞれ予め 定めた周波数に変換する複数のサンプリング周波数変換回路と、 サンプリング周 波数変換回路の出力信号間の位相を調整して出力する遅延調整回路と、 遅延調整 回路の複数の出力信号から二つの信号を制御信号に従い選択し重み付け加算する 加算回路と、 遅延調整回路の複数の出力信号と加算回路の出力信号から一つの信 号を制御信号に従い選択する切替回路とを備えることによって特徴づけられる。 ここで、 切替回路は、 制御信号により切替が指示されたタイミングから遅延調 整回路の遅延時間を考慮したタイミングで、 遅延調整回路からの出力信号の切替 前の信号から加算回路の出力信号に切替え、 所定間隔だけ加算回路の出力信号を 出力した後、 切替後の信号を出力するようにしてもよい。  Also, the audio switching device of the present invention receives a plurality of input signals sampled at a plurality of different sampling frequencies and a control signal for designating a signal to be reproduced from the plurality of input signals, and receives a plurality of signals according to the control signal. A plurality of sampling frequency conversion circuits for converting a sampling frequency of each of a plurality of input signals into a predetermined frequency, and a sampling frequency conversion circuit. A delay adjustment circuit that adjusts the phase between the output signals of the delay adjustment circuit, outputs two signals from a plurality of output signals of the delay adjustment circuit, selects and weights and adds two signals according to a control signal, and a plurality of output signals of the delay adjustment circuit And a switching circuit for selecting one signal from the output signal of the adding circuit according to the control signal. Here, the switching circuit switches from the signal before switching the output signal from the delay adjustment circuit to the output signal of the addition circuit from the timing at which the switching is instructed by the control signal to the timing considering the delay time of the delay adjustment circuit. After outputting the output signal of the adding circuit for a predetermined interval, the signal after switching may be output.
また、 以上の音声切替装置は、 一つのビットストリームから異なるサンプリン グ周波数で標本化された複数の信号を復号して複数の入力信号としてサンプリン グ周波数変換回路又は遅延調整回路に出力する音声復号回路を有し、 受信時のビ ットレートに応じて音声復号回路の複数の出力復号信号から制御信号により一つ の信号を選択して出力するようにしてもよい。 また、 以上の音声切替装置は、 複数種の異なるサンプリング周波数の信号が圧 縮された複数のビットストリームを多重化したビットストリームを入力し、 ビッ トストリームの種類に応じて複数の出力端に切替出力するビットストリーム切替 回路と、 ビットストリーム切替回路から出力されるビットストリームをそれぞれ 復号して複数の入力信号としてサンプリング周波数変換回路又は遅延調整回路に 出力する複数の音声復号回路とを有し、 複数の音声復号回路からの出力復号信号 から一つの信号を制御信号に従い選択して出力するようにしてもよい。 図面の簡単な説明 Further, the above audio switching device is an audio decoding circuit that decodes a plurality of signals sampled from one bit stream at different sampling frequencies and outputs the decoded signals as a plurality of input signals to a sampling frequency conversion circuit or a delay adjustment circuit. It may be arranged such that one signal is selected from a plurality of output decoded signals of the audio decoding circuit by a control signal in accordance with a bit rate at the time of reception and output. In addition, the above audio switching device inputs a bit stream obtained by multiplexing a plurality of bit streams obtained by compressing a plurality of types of signals having different sampling frequencies, and switches to a plurality of output terminals according to the type of the bit stream. A bit stream switching circuit for outputting, and a plurality of audio decoding circuits for respectively decoding the bit stream output from the bit stream switching circuit and outputting as a plurality of input signals to a sampling frequency conversion circuit or a delay adjustment circuit. One of the decoded signals output from the audio decoding circuit may be selected and output according to the control signal. BRIEF DESCRIPTION OF THE FIGURES
図 1は、 本発明の第 1の実施例の構成を示す図である。  FIG. 1 is a diagram showing the configuration of the first exemplary embodiment of the present invention.
図 2は、 本発明の第 2の実施例の構成を示す図である。  FIG. 2 is a diagram showing the configuration of the second exemplary embodiment of the present invention.
図 3は、 本発明の第 3の実施例の構成を示す図である。  FIG. 3 is a diagram showing the configuration of the third exemplary embodiment of the present invention.
図 4は、 本発明の第 4の実施例の構成を示す図である。  FIG. 4 is a diagram showing the configuration of the fourth exemplary embodiment of the present invention.
図 5は、 本発明の第 5の実施例の構成を示す図である。  FIG. 5 is a diagram showing a configuration of the fifth exemplary embodiment of the present invention.
図 6は、 本発明の第 6の実施例の構成を示す図である。  FIG. 6 is a diagram showing a configuration of the sixth exemplary embodiment of the present invention.
図 7は、 従来の音声切替装置の構成の一例を示す図である。 発明を実施するための最良の形態  FIG. 7 is a diagram illustrating an example of a configuration of a conventional voice switching device. BEST MODE FOR CARRYING OUT THE INVENTION
本発明の実施の形態について以下に説明する。 本発明は、 サンプリング周波数 の異なるディジタル音声信号の再生切替時に、 サンプリング周波数設定のため生 じる再生音の途切れをなくすため、 サンプリング周波数の異なる複数のディジタ ル音声信号を同一のサンプリング周波数に変換し、 それにより生ずる位相を調整 し再生するように構成したものである。  An embodiment of the present invention will be described below. The present invention converts a plurality of digital audio signals having different sampling frequencies to the same sampling frequency in order to eliminate the interruption of the reproduced sound caused by setting the sampling frequency when switching the reproduction of digital audio signals having different sampling frequencies. It is designed to adjust the phase generated thereby and reproduce.
より詳細には、 ディジタル音声信号のサンプリング周波数を変換するサンプリ ング周波数変換回路 (図 1の 1 ) と、 サンプリング周波数変換により生ずる位相 のずれを複数のディジタル音声信号間で調整する遅延調整回路 (図 1の 2 ) と、 を含む。  More specifically, a sampling frequency conversion circuit (1 in Fig. 1) that converts the sampling frequency of a digital audio signal, and a delay adjustment circuit (Figure 1) that adjusts the phase shift caused by the sampling frequency conversion between a plurality of digital audio signals. 1) 2) and.
さらに、 サンプリング周波数が同一であるが、 信号帯域幅が異なるディジタル 音声信号を連続して再生する際に生じるサンプル間の不連続をなくすため、 切替 前後のディジタル音声信号を、 一定間隔重み付け加算した後、 切替え再生する。 より詳細には、 サンプリング周波数変換回路 (図 3の 1 ) と、 遅延調整回路 (図 3の 2 ) と、 遅延調整回路の出力信号を、 予め定められた間隔、 重み付け加算す る加算回路 (図 3の 6 ) と、 制御信号に従い出力信号を切替える際に、 加算回路 の出力信号を前記間隔出力した後に切替えを行なう切替回路 (図 3の 7 ) と、 を 含む。 Furthermore, in order to eliminate discontinuities between samples that occur when playing back digital audio signals with the same sampling frequency but different signal bandwidths, switching is performed. The digital audio signals before and after are weighted and added at fixed intervals, and then switched and played. More specifically, a sampling frequency conversion circuit (1 in Fig. 3), a delay adjustment circuit (2 in Fig. 3), and an addition circuit (Fig. 3) for weighting and adding the output signal of the delay adjustment circuit to a predetermined interval. 3-6), and a switching circuit (7 in FIG. 3) that performs switching after outputting the output signal of the adder circuit at the interval when switching the output signal according to the control signal.
本発明においては、 サンプリング周波数変換回路と遅延調整回路において、 切 替え前後のディジタル信号のサンプリング周波数と位相を同一とすることにより、 DZA回路におけるサンプリング周波数設定を必要とせず、 再生音の途切れが生 じにくくなる。  In the present invention, by setting the sampling frequency conversion circuit and the delay adjustment circuit to have the same phase as the sampling frequency of the digital signal before and after the switching, the sampling frequency setting in the DZA circuit is not required, and the reproduced sound is interrupted. It becomes difficult to repel.
さらに、 本発明においては、 加算回路において、 切替え前後のディジタル信号 を重み付け加算することにより、 切替え前の音声信号の最終サンプルと前記間隔 の始端サンプルとの不連続性は、 重み付け加算しない場合に比べて少なくなる。 切替回路において、 加算回路の出力信号を予め定められた間隔出力した後に切替 えを行なうことにより、 前記間隔の始端と終端においてサンプル間の不連続が少 なくなるため、 再生音に異音が生じにくくなる。  Further, in the present invention, the addition circuit weights and adds the digital signal before and after the switching, so that the discontinuity between the last sample of the audio signal before the switching and the starting sample of the interval is compared with the case where no weighting addition is performed. Less. In the switching circuit, by performing switching after outputting the output signal of the adding circuit at a predetermined interval, discontinuity between samples at the beginning and end of the interval is reduced, so that abnormal noise is less likely to occur in reproduced sound. Become.
上記した実施の形態についてさらに詳細に説明すべく、 本発明の実施例につい て図面を参照して説明する。  Embodiments of the present invention will be described with reference to the drawings in order to describe the above embodiments in more detail.
図 1は、 本発明の第 1の実施例の構成を示すブロック図である。 図 1を参照す ると、 本発明の第 1の実施例は、 2種類の異なるサンプリング周波数 (例えば、 8 k H zと 1 6 k H z ) の音声信号 (それぞれ第 1の音声信号、 第 2の音声信号 とする) と、 2種類の音声信号のうちどちらを再生するかを指示する制御信号と を入力し、 制御信号に従い、 音声信号を切替えて再生する。  FIG. 1 is a block diagram showing a configuration of the first exemplary embodiment of the present invention. Referring to FIG. 1, a first embodiment of the present invention provides two different sampling frequencies (eg, 8 kHz and 16 kHz) of audio signals (a first audio signal and a second audio signal, respectively). 2) and a control signal for instructing which of the two types of audio signals to reproduce, and switch the audio signal according to the control signal for reproduction.
サンプリング周波数変換回路 1は、 第 1の音声信号のサンプリング周波数を第 2の音声信号のサンプリング周波数と等しくなるようサンプリング周波数変換 (例えば、 サンプリグ周波数を 8 k H Zから 1 6 k H Zに変換する) し、 遅延調 整回路 2に出力する。 ここで、 サンプリング周波数変換回路 1では、 通倍又は分 周回路、 あるいはィンタポレーシヨン又はデシメーシヨン処理を行なって周波数 変換を行なうが、 この周波数変換は公知の回路を用いられ、 その動作説明につい ては、 例えば P. P. Vaidyanathanによる 「Multirate Systems and Filter Banks J と題した文献の 4 . 1 . 1節 (Figure 4· 1-8) 等の記載が参照される。 Sampling frequency conversion circuit 1 converts the sampling frequency of the first audio signal a second equal as the sampling frequency conversion with the sampling frequency of the audio signal (e.g., a Sanpurigu frequency from 8 k H Z in 1 6 k H Z ) And outputs it to the delay adjustment circuit 2. Here, the sampling frequency conversion circuit 1 performs frequency conversion by performing a frequency multiplication or frequency division circuit, or an interpolation or decimation process, and a known circuit is used for this frequency conversion. For example, reference is made to the description in Section 4.1.1 (Figure 4-1-8) of the document entitled "Multirate Systems and Filter Banks J" by PP Vaidyanathan.
サンプリング周波数変換回路 1の処理により、 出力信号は入力信号に対して位 相遅延が生じる。 このとき発生する遅延時間を Dとする。  The processing of the sampling frequency conversion circuit 1 causes a phase delay of the output signal with respect to the input signal. Let D be the delay time that occurs at this time.
遅延調整回路 2は、 入力した第 2の音声信号を、 遅延時間 Dだけ不図示の遅延 回路で遅延させた信号と、 サンプリング周波数回路 1の出力信号とを切替回路 3 に出力する。 なお遅延回路としては、 インバータ列もしくは遅延線等任意のもの が用いられる。  The delay adjustment circuit 2 outputs to the switching circuit 3 a signal obtained by delaying the input second audio signal by a delay circuit (not shown) by a delay time D and an output signal of the sampling frequency circuit 1. As the delay circuit, an arbitrary one such as an inverter train or a delay line is used.
切替回路 3は、 遅延調整回路 2から、 サンプリング周波数変換された第 1の音 声信号と遅延調整された第 2の音声信号とを入力し、 遅延時間 Dを考慮して、 制 御信号に従い、 2種類の音声信号を切替え、 DZA変換回路 4に出力する。  The switching circuit 3 inputs the first audio signal whose sampling frequency has been converted and the second audio signal whose delay has been adjusted from the delay adjustment circuit 2, and takes the delay time D into account, and in accordance with the control signal, Switch between two types of audio signals and output to DZA conversion circuit 4.
DZ Α変換回路 4は、 入力したディジタル音声信号をアナログ信号に変換し出 力する。 前記アナログ信号は、 スピーカやヘッドホンなどを介して、 ユーザーに 提供される。  The DZΑ conversion circuit 4 converts the input digital audio signal into an analog signal and outputs it. The analog signal is provided to a user via a speaker, headphones, or the like.
図 2は、 本発明の第 2の実施例の構成を示すブロック図である。 図 2を参照す ると、 本発明の第 2の実施例は、 前記第 1の実施例と比べて、 第 2の音声信号の サンプリング周波数変換するサンプリング周波数回路 5がさらに追加されている。 サンプリング周波数変換回路 1は、 第 1の音声信号のサンプリング周波数を予め 定めたサンプリング周波数に変換し、 遅延調整回路 2に出力する。 同じく、 サン プリング周波数変換回路 5は、 第 2の音声信号のサンプリング周波数を前記予め 定めたサンプリング周波数に変換し、 遅延調整回路 2に出力する。 なお、 サンプ リング周波数変換回路 1で発生する遅延時間を D 1とし、 サンプリング周波数変 換回路 5で発生する遅延時間を D 2とする。  FIG. 2 is a block diagram showing the configuration of the second exemplary embodiment of the present invention. Referring to FIG. 2, the second embodiment of the present invention is different from the first embodiment in that a sampling frequency circuit 5 for converting a sampling frequency of a second audio signal is further added. The sampling frequency conversion circuit 1 converts the sampling frequency of the first audio signal into a predetermined sampling frequency and outputs the same to the delay adjustment circuit 2. Similarly, the sampling frequency conversion circuit 5 converts the sampling frequency of the second audio signal into the predetermined sampling frequency and outputs the same to the delay adjustment circuit 2. Note that the delay time generated by the sampling frequency conversion circuit 1 is D1, and the delay time generated by the sampling frequency conversion circuit 5 is D2.
遅延調整回路 2は、 サンプリング周波数変換された第 1の音声信号と第 2の音 声信号との位相が同じになるよう遅延調整し、 切替回路 3に出力する。  The delay adjustment circuit 2 adjusts the delay so that the phases of the first audio signal and the second audio signal that have been subjected to the sampling frequency conversion are the same, and outputs the same to the switching circuit 3.
遅延調整法として、 遅延時間 D 1と D 2のうち長い方の遅延時間を Dとし、 両 信号を同一時間、 すなわち遅延時間 Dだけ不図示の遅延回路で遅延させる。  As a delay adjustment method, the longer one of the delay times D1 and D2 is set to D, and both signals are delayed by the same time, that is, the delay time D by a delay circuit (not shown).
切替回路 3は、 遅延調整回路 2から、 サンプリング周波数変換および遅延調整 された第 1の音声信号と第 2の音声信号とを入力し、 遅延時間 Dを考慮して前記 制御信号に従い 2種類の音声信号を切替えて DZA変換回路 4に出力する。 The switching circuit 3 receives the first audio signal and the second audio signal that have been subjected to the sampling frequency conversion and the delay adjustment from the delay adjustment circuit 2, and takes the delay time D into consideration. The two types of audio signals are switched according to the control signal and output to the DZA conversion circuit 4.
D/A変換回路 4は、 入力したディジタル音声信号をアナログ信号に変換し出 力する。 前記アナログ信号は、 スピーカやヘッドホンなどを介して、 ユーザーに 提供される。  The D / A conversion circuit 4 converts the input digital audio signal into an analog signal and outputs it. The analog signal is provided to a user via a speaker, headphones, or the like.
本実施例では、 例えば、 第 1、 第 2の音声信号のサンプリング周波数が、 それ ぞれ、 8 kHz, 1 2 kHzの時、 第 1、 第 2の音声信号を、 サンプリング周波 数回路においてサンプリング周波数を 24 kH zに変換することにより、 第 1の 音声信号のみを 1 2 kHzにサンプリング周波数変換する前記第 1の実施例に比 ベて、 サンプリング周波数変換の処理量をより少なく実現できる。  In the present embodiment, for example, when the sampling frequencies of the first and second audio signals are 8 kHz and 12 kHz, respectively, the first and second audio signals are sampled by the sampling frequency circuit. Is converted to 24 kHz, so that the processing amount of the sampling frequency conversion can be reduced as compared with the first embodiment in which only the first audio signal is converted to the sampling frequency of 12 kHz.
図 3は、 本発明の第 3の実施例の構成を示すブロック図である。 図 3を参照す ると、 本発明の第 3の実施例は、 前記第 1の実施例と比べて、 加算回路 6をさら に備え、 また切替回路 7の動作が相違している。  FIG. 3 is a block diagram showing a configuration of the third exemplary embodiment of the present invention. Referring to FIG. 3, the third embodiment of the present invention further includes an adder circuit 6 and differs from the first embodiment in the operation of the switching circuit 7.
サンプリング周波数変換回路 1は、 第 1の音声信号のサンプリング周波数を第 2の音声信号のサンプリング周波数と等しくなるようサンプリング周波数変換し、 遅延調整回路 2に出力する。 なお、 サンプリング周波数変換回路 1で発生する遅 延時間を Dとする。 遅延調整回路 2は、 入力した第 2の音声信号を遅延時間 Dだ け遅延させた信号と、 サンプリング周波数回路 1の出力信号と、 を加算回路 6と 切替回路 7に出力する。  The sampling frequency conversion circuit 1 converts the sampling frequency of the first audio signal to be equal to the sampling frequency of the second audio signal, and outputs it to the delay adjustment circuit 2. The delay time generated by the sampling frequency conversion circuit 1 is D. The delay adjustment circuit 2 outputs a signal obtained by delaying the input second audio signal by the delay time D and an output signal of the sampling frequency circuit 1 to the addition circuit 6 and the switching circuit 7.
加算回路 6は、 サンプリング周波数変換された第 1の音声信号と遅延調整され た第 2の音声信号とを重み付け加算し、 切替回路 7に出力する。  The adding circuit 6 weights and adds the sampling frequency-converted first audio signal and the delay-adjusted second audio signal, and outputs the result to the switching circuit 7.
例えば、 重み付け加算の例として、 切替前後の信号を、 それぞれ、  For example, as an example of weighted addition, the signals before and after switching are
Sl(n)、 S2(n)、 n=0, 1, .. ·, T- 1とすると、 Sl (n), S2 (n), n = 0, 1, .. ·, T-1
加算回路 5の出力信号は S 3 (n) は、 The output signal of the adder circuit 5 is S 3 (n),
S3(n) = (n/(T- l))S2(n) + ((T— 1- n)/(T- l))Sl(n), S3 (n) = (n / (T-l)) S2 (n) + ((T- 1-n) / (T-l)) Sl (n),
n=0, Ι,.,.,Τ - 1, ·'·(1)  n = 0, Ι,.,., Τ-1,
となる。 ここで、 Τは、 加算回路の出力信号が使用される間隔を表すサンプル 数であり、 入力音声信号のサンプリング周波数毎に定められる。  Becomes Here, Τ is the number of samples representing the interval at which the output signal of the adder circuit is used, and is determined for each sampling frequency of the input audio signal.
また、 切替前後の信号は、 サンプリング周波数変換された第 1の音声信号と遅 延調整された第 2の音声信号とのいずれか一方が割り当てられる。 y 切替回路 7は、 サンプリング周波数変換された第 1の音声信号と遅延調整され た第 2の音声信号と加算回路 6の出力信号と制御信号とを入力し、 制御信号によ り切替が指示されたタイミングから遅延時間 Dを考慮したタイミングで、 出力す る信号を、 切替前の信号 S I ( n ) から加算回路 6の出力信号 S 3 ( n ) に切替 え、 所定の間隔だけ S 3 ( n ) を出力した後、 切替後の信号 S 1 ( n ) を D/A 変換回路に出力する。 One of a first audio signal whose sampling frequency has been converted and a second audio signal whose delay has been adjusted are assigned to the signals before and after the switching. y The switching circuit 7 receives the sampling frequency-converted first audio signal, the delay-adjusted second audio signal, the output signal of the adding circuit 6, and the control signal, and the switching signal is instructed by the control signal. The output signal is switched from the signal SI (n) before switching to the output signal S 3 (n) of the adder circuit 6 at a timing that takes the delay time D into consideration from the output timing, and S 3 (n ), And outputs the switched signal S 1 (n) to the D / A conversion circuit.
DZA変換回路 4は、 入力したディジタル音声信号をアナログ信号に変換し出 力する。 前記アナログ信号は、 スピーカやヘッドホンなどを介して、 ユーザーに 提供される。  The DZA conversion circuit 4 converts the input digital audio signal into an analog signal and outputs it. The analog signal is provided to a user via a speaker, headphones, or the like.
図 4は、 本発明の第 4の実施例の構成を示すブロック図である。 図 4を参照す ると、 本発明の第 4の実施例は、 前記第 2の実施例と比べて、 加算回路 6をさら に備え、 また切替回路 7の動作が相違している。  FIG. 4 is a block diagram showing a configuration of the fourth exemplary embodiment of the present invention. Referring to FIG. 4, the fourth embodiment of the present invention further includes an adder circuit 6 and differs from the second embodiment in the operation of the switching circuit 7.
本発明の第 4の実施例において、 加算回路 6と切替回路 7の動作は、 前記第 3 の実施例で説明したものと同じである。  In the fourth embodiment of the present invention, the operations of the adder circuit 6 and the switching circuit 7 are the same as those described in the third embodiment.
サンプリング周波数変換回路 1は、 第 1の音声信号のサンプリング周波数を予 め定めたサンプリング周波数 (例えば、 2 4 k H z ) に変換し、 遅延調整回路 2 に出力する。 同じく、 サンプリング周波数変換回路 5は、 第 2の音声信号のサン プリング周波数を予め定めたサンプリング周波数に変換し、 遅延調整回路 2に出 力する。 なお、 サンプリング周波数変換回路 1で発生する遅延時間を D 1とし、 サンプリング周波数変換回路 5で発生する遅延時間を D 2とする。 遅延調整回路 2は、 サンプリング周波数変換された第 1の音声信号と第 2の音声信号との位相 が同じになるよう遅延調整し、 加算回路 6と切替回路 7に出力する。 ここで、 遅 延調整の例として、 遅延時間 D 1 と D 2のうち長い方の遅延時間を Dとし、 両信 号を、 遅延時間 Dだけ遅延させる。  The sampling frequency conversion circuit 1 converts the sampling frequency of the first audio signal to a predetermined sampling frequency (for example, 24 kHz) and outputs the same to the delay adjustment circuit 2. Similarly, the sampling frequency conversion circuit 5 converts the sampling frequency of the second audio signal into a predetermined sampling frequency, and outputs it to the delay adjustment circuit 2. Note that the delay time generated by the sampling frequency conversion circuit 1 is D1, and the delay time generated by the sampling frequency conversion circuit 5 is D2. The delay adjustment circuit 2 adjusts the delay so that the phases of the first audio signal and the second audio signal subjected to the sampling frequency conversion become the same, and outputs the same to the addition circuit 6 and the switching circuit 7. Here, as an example of the delay adjustment, the longer one of the delay times D 1 and D 2 is set to D, and both signals are delayed by the delay time D.
加算回路 6は、 サンプリング周波数変換され遅延調整された第 1の音声信号と 第 2の音声信号とを重み付け加算し、 切替回路 7に出力する。  The adder 6 weights and adds the first audio signal and the second audio signal whose sampling frequency has been converted and the delay has been adjusted, and outputs the result to the switching circuit 7.
例えば、 重み付け加算の例として、 上記式 (1 ) を用いる。 ここで、 切替前後 の信号 S I ( n ) 、 S 2 ( n ) は、 サンプリング周波数変換および遅延調整され た第 1の音声信号と第 2の音声信号とのどちらか一方が割り当てられる。 切替回路 7は、 サンプリング周波数変換および遅延調整された第 1の音声信号 と第 2の音声信号と前記加算回路 6の出力信号と制御信号とを入力し、 制御信号 により切替が指示されたタイミングから遅延時間 Dを考慮したタイミングで、 出 力する信号を、 切替前の信号 S I ( n ) 力 ら、 加算回路 5の出力信号 S 3 ( n ) に切替え、 所定の間隔だけ、 S 3 ( n ) を出力した後、 切替後の信号 S I ( n ) を DZA変換回路に出力する。 For example, the above equation (1) is used as an example of weighted addition. Here, as the signals SI (n) and S2 (n) before and after the switching, one of the first audio signal and the second audio signal subjected to the sampling frequency conversion and the delay adjustment is assigned. The switching circuit 7 receives the first audio signal, the second audio signal, which has been subjected to the sampling frequency conversion and the delay adjustment, the output signal of the adding circuit 6, and the control signal, and starts from the timing at which the switching is instructed by the control signal. At the timing considering the delay time D, the output signal is switched from the signal SI (n) before switching to the output signal S3 (n) of the adder circuit 5, and S3 (n) for a predetermined interval. After that, the switched signal SI (n) is output to the DZA conversion circuit.
Dノ A変換回路 4は、 入力したディジタル音声信号をァナ口グ信号に変換し出 力する。 前記アナログ信号は、 スピーカやヘッ ドホンなどを介して、 ユーザーに 提供される。  The D / A conversion circuit 4 converts the input digital audio signal into an analog signal and outputs it. The analog signal is provided to a user via a speaker, a headphone, or the like.
図 5は、 本発明の第 5の実施例として、 帯域幅階層化音声符号化に基づく音声 復号回路 8と、 前記第 3の実施例の構成を組み合わせた音声切替装置の構成を示 すブロック図である。 図 5を参照すると、 本発明の第 5の実施例においては、 帯 域幅階層化音声復号回路 8は、 入力したビットストリ一ムを復号して得たディジ タル音声信号を、 サンプリング周波数変換回路 1、 遅延回路 2に、 それぞれ、 第 1のディジタル音声信号または第 2のディジタル音声信号として出力する。  FIG. 5 is a block diagram showing, as a fifth embodiment of the present invention, a configuration of a voice decoding circuit 8 based on bandwidth hierarchical voice coding and a voice switching device in which the configuration of the third embodiment is combined. It is. Referring to FIG. 5, in a fifth embodiment of the present invention, a bandwidth hierarchical audio decoding circuit 8 converts a digital audio signal obtained by decoding an input bit stream into a sampling frequency conversion circuit. 1. Output to the delay circuit 2 as a first digital audio signal or a second digital audio signal, respectively.
帯域幅階層化音声復号回路 8は、 2種類の音声信号のうちどちらを再生するか を指示する制御信号を、 加算回路 6と切替回路 7とに出力する。  Bandwidth hierarchical audio decoding circuit 8 outputs a control signal for instructing which of the two types of audio signals to reproduce, to addition circuit 6 and switching circuit 7.
ここで、 ビットストリームは、 圧縮された音声信号情報を復号に必須な基本部 分と、 音声信号の帯域幅を拡張することにより品質を向上させる拡張部分と、 に 分けて構成されている。  Here, the bit stream is divided into a basic part essential for decoding the compressed audio signal information and an extended part for improving the quality by expanding the bandwidth of the audio signal.
したがって、 帯域幅階層化音声復号回路 8では、 基本部分のみを受信している 場合には、 帯域幅は狭い音声信号 (例えば、 サンプリング周波数が 8 k H zのデ イジタル信号) を復号し、 サンプリング周波数変換回路 1に出力する。  Therefore, when only the basic part is received, the bandwidth hierarchical speech decoding circuit 8 decodes a speech signal having a narrow bandwidth (for example, a digital signal having a sampling frequency of 8 kHz) and performs sampling. Output to frequency conversion circuit 1.
さらに拡張部分も受信している場合には、 より帯域幅の広い音声信号 (例えば、 サンプリング周波数が 1 6 k H zのディジタル信号) を復号し、 遅延調整回路 2 に出力する。  If the extension is also received, it decodes an audio signal with a wider bandwidth (for example, a digital signal with a sampling frequency of 16 kHz) and outputs it to the delay adjustment circuit 2.
ここで、 帯域幅階層化音声復号回路 8の復号動作については、 例えば特開平 1 1 - 3 0 9 9 7号公報等の記載が参照される。  Here, as for the decoding operation of the bandwidth hierarchical audio decoding circuit 8, for example, the description in Japanese Patent Application Laid-Open No. 11-30997 is referred to.
帯域幅階層化音声復号回路 8は、 ビットストリームの基本部分に加えて拡張部 分も受信している場合には、 基本部分のみを用いた場合と拡張部分も用いた場合 との復号信号を複数同時に復号することもできる。 The bandwidth-layered speech decoding circuit 8 is an extension In the case where only the basic part is used and the extended part is used, a plurality of decoded signals can be simultaneously decoded.
本実施例では、 ビットス トリームの基本部分のみを用いた復号信号は、 常に復 号し、 遅延調整回路 2に出力するものとする。  In the present embodiment, it is assumed that a decoded signal using only the basic part of the bit stream is always decoded and output to the delay adjustment circuit 2.
サンプリング周波数変換回路 1 と遅延調整回路 2と加算回路 6と切替回路 7と D/ A変換回路 4の動作説明は、 前記第 2の実施例で説明したものと同様とされ ており、 その説明は省略する。  The description of the operation of the sampling frequency conversion circuit 1, the delay adjustment circuit 2, the addition circuit 6, the switching circuit 7, and the D / A conversion circuit 4 is the same as that described in the second embodiment. Omitted.
図 6は、 本発明の第 6の実施例として、 複数の音声復号回路と、 前記第 1の発 実施例を組み合わせた音声切替装置の構成を示すプロック図である。 図 6を参照 して、 本発明の第 6の実施例において、 ビットス トリーム切替回路 1 1は、 異な るサンプリング周波数の信号が圧縮された複数のビットストリームを多重化した ビットストリームを入力し、 受信したビットストリームの種類に応じて、 入力し たビットス トリームを第 1の音声復号回路 9または第 2の音声復号回路 1 0に出 力する。  FIG. 6 is a block diagram showing a configuration of a voice switching device in which a plurality of voice decoding circuits and the first embodiment are combined as a sixth embodiment of the present invention. Referring to FIG. 6, in a sixth embodiment of the present invention, bit stream switching circuit 11 receives a bit stream obtained by multiplexing a plurality of bit streams obtained by compressing signals of different sampling frequencies, and The input bit stream is output to the first audio decoding circuit 9 or the second audio decoding circuit 10 according to the type of the input bit stream.
ここで、 ビットス トリームの多重化方法は、 複数のビットス トリームを同時に 多重化してもよいし、 切替えて多重化しても良い。 前者の場合には、 2種類のビ ッ トス トリームから 2種類の音声信号が同時に復号されるが、 後者の場合には、 どちらか一方のビットストリームからのみ音声信号が復号される。 本実施例では、 複数のビットストリームを切替えて多重化したビットストリームを入力とするも のとする。  Here, as the bit stream multiplexing method, a plurality of bit streams may be multiplexed simultaneously or may be switched and multiplexed. In the former case, two types of audio signals are decoded simultaneously from the two types of bit streams, while in the latter case, the audio signal is decoded from only one of the bit streams. In this embodiment, it is assumed that a bit stream multiplexed by switching a plurality of bit streams is input.
また、 ビッ トストリーム切替回路 1 1は、 2種類の音声信号のうちどちらを再 生するかを指示する制御信号を、 切替回路 3に出力する。  Further, the bit stream switching circuit 11 outputs to the switching circuit 3 a control signal for instructing which of the two types of audio signals to reproduce.
第 1の音声復号回路 9は、 第 2の音声復号回路 1 0に比べて低レ、ビッ トレート (例えば、 8 k b i t / s ) のビットス トリームを復号して得た音声信号 (例え ば、 サンプリング周波数が 8 k H zのディジタル信号) を、 第 1のディジタル音 声信号として、 サンプリング周波数変換回路 1に出力する。  The first speech decoding circuit 9 decodes a bit stream having a lower bit rate (for example, 8 kbit / s) than the second speech decoding circuit 10 (for example, a sampling frequency Is output to the sampling frequency conversion circuit 1 as a first digital audio signal.
第 2の音声復号回路 1 0は、 第 1の音声復号回路 9に比べて高いビットレート (例えば、 1 6 k b i t / s ) のビットストリームを復号して得た音声信号 (例 えば、 サンプリング周波数が 1 6 k H zのディジタル信号) を、 第 2のディジタ ル音声信号として、 遅延調整回路 2に出力する。 The second audio decoding circuit 10 decodes a bit stream having a higher bit rate (for example, 16 kbit / s) than the first audio decoding circuit 9 (for example, if the sampling frequency is 16 kHz digital signal) to the second digital It is output to the delay adjustment circuit 2 as an audio signal.
ここで、 第 1の音声復号回路 9と第 2の音声復号回路 1 0については、 例えば、 特開平 1 0— 2 0 7 4 9 6号公報等の記載が参照される。  Here, as for the first speech decoding circuit 9 and the second speech decoding circuit 10, reference is made to, for example, the description of Japanese Patent Application Laid-Open No. H10-2007496.
また、 サンプリング周波数変換回路 1と遅延調整回路 2と切替回路 3と DZA 変換回路 4の動作は、 前記第 1の実施例のものと同様とされており、 その説明は 省略する。  The operations of the sampling frequency conversion circuit 1, the delay adjustment circuit 2, the switching circuit 3, and the DZA conversion circuit 4 are the same as those of the first embodiment, and the description thereof will be omitted.
なお、 図 5には帯域幅階層化音声復号回路と前記第 3の実施例の構成とを組み 合わせたものを示し、 図 6には複数の音声復号回路と前記第 1の実施例の構成と の組合せたものを示したが、 前記した各実施例の任意の組合わとしてもよいこと は勿論である。  FIG. 5 shows a combination of the bandwidth hierarchical speech decoding circuit and the configuration of the third embodiment. FIG. 6 shows a plurality of speech decoding circuits and the configuration of the first embodiment. Is shown, but it goes without saying that any combination of the above embodiments may be used.
ただし、 前記第 3、 第 4の実施例では、 加算回路において、 複数の信号を同時 に必要とするため、 第 1の音声信号と第 2の音声信号との切替時に両信号がォー バーラップしている必要がある。  However, in the third and fourth embodiments, since a plurality of signals are required at the same time in the adder circuit, both signals overlap when switching between the first audio signal and the second audio signal. Need to be.
したがって、 音声復号回路と組合わせる前記第 3、 第 4の実施例では、 帯域幅 階層化音声復号回路と組合わせるか、 あるいは、 複数の音声復号回路を用いる場 合には、 入力ビットストリームが複数のビットストリームを同時に多重化したも のである必要がある。  Therefore, in the third and fourth embodiments to be combined with the audio decoding circuit, the combination with the bandwidth hierarchical audio decoding circuit, or when a plurality of audio decoding circuits are used, a plurality of input bit streams are required. Must be multiplexed simultaneously.
また、 前記各実施例では、 入力音声信号が 2種類の場合を説明したが、 入力音 声信号を 3種類以上の構成とする場合には、 サンプリング周波数変換回路とこれ に接続する入出力線とを、 必要な数だけ追加することで実現される。  In each of the above embodiments, the case where there are two types of input audio signals has been described. However, when the input audio signal has three or more types, a sampling frequency conversion circuit and input / output lines connected to the sampling frequency conversion circuit are required. Is realized by adding as many as necessary.
以上説明したように、 本発明によれば、 複数の異なる音声信号の再生切替時に おける異音を低減することができる、 という効果を奏する。  As described above, according to the present invention, it is possible to reduce an abnormal sound at the time of switching the reproduction of a plurality of different audio signals.
その理由は、 本発明においては、 複数の音声信号の切替え前後の信号のサンプ リング周波数と位相を同一とすることにより、 サンプリング周波数設定の変更処 理を必要としないためである。  The reason is that, in the present invention, by changing the sampling frequency and the phase of the signals before and after switching of a plurality of audio signals to be the same, it is not necessary to change the sampling frequency setting.
また、 切替え前後の音声信号を予め定めた間隔重み付け加算することにより、 前記間隔の始端と終端において、 サンプル間の不連続を少なくすることができる とレヽぅ効果を奏する。  Also, by adding a predetermined interval weight to the audio signals before and after the switching, it is possible to reduce the discontinuity between samples at the beginning and end of the interval, thereby producing a reed effect.

Claims

請 求 の 範 囲 The scope of the claims
1 . 複数種の異なるサンプリング周波数で標本化された複数の入力信号と、 前記 複数の入力信号の中から再生すべき信号を指定する制御信号とを入力し、 前記制 御信号に従い前記複数の入力信号から一つの信号を選択して出力する音声切替装 置であって、 1. A plurality of input signals sampled at a plurality of different sampling frequencies, and a control signal specifying a signal to be reproduced from the plurality of input signals are input, and the plurality of input signals are input according to the control signal. An audio switching device for selecting and outputting one signal from signals,
前記複数の入力信号のうちの少なくとも一つの入力信号のサンプリング周波数 を変換する少なくとも一つのサンプリング周波数変換回路と、  At least one sampling frequency conversion circuit for converting a sampling frequency of at least one input signal of the plurality of input signals;
前記複数の入力信号について、 前記サンプリング周波数変換回路でサンプリン グ周波数が変換された信号と、 残りの入力信号との位相を調整して出力する遅延 調整回路と、  A delay adjustment circuit that adjusts the phase of a signal whose sampling frequency is converted by the sampling frequency conversion circuit with respect to the plurality of input signals, and outputs the remaining input signals;
前記遅延調整回路の複数の出力信号から一つの信号を前記制御信号に従い選択 する切替回路とを備えたことを特徴とする音声切替装置。  A switching circuit for selecting one signal from a plurality of output signals of the delay adjustment circuit in accordance with the control signal.
2 . 請求の範囲第 1項記載の音声切替装置において、  2. In the audio switching device according to claim 1,
前記遅延調整回路は、 前記サンプリング周波数が変換された信号の位相と、 前 記残りの入力信号の位相とが同じになるように調整することを特徴とする音声切  The delay adjusting circuit adjusts the phase of the signal obtained by converting the sampling frequency so that the phase of the remaining input signal is the same as the phase of the signal.
3 . 請求の範囲第 1項記載の音声切替装置において、 3. The voice switching device according to claim 1,
前記切替回路は、 前記制御信号により切替が指示されたタイミングから前記遅 延調整回路での遅延時間を考慮したタイミングで出力を切り替えることを特徴と する音声切替装置。  The audio switching device, wherein the switching circuit switches an output from a timing at which the switching is instructed by the control signal, at a timing considering a delay time in the delay adjustment circuit.
4 . 複数種の異なるサンプリング周波数で標本化された複数の入力信号と、 前記 複数の入力信号の中から再生すべき信号を指定する制御信号とを入力し、 前記制 御信号に従い前記複数の入力信号から一つの信号を選択して出力する音声切替装 置であって、  4. Inputting a plurality of input signals sampled at a plurality of different sampling frequencies and a control signal designating a signal to be reproduced from the plurality of input signals, and inputting the plurality of input signals in accordance with the control signal An audio switching device for selecting and outputting one signal from signals,
前記複数の入力信号のサンプリング周波数をそれぞれ予め定めた周波数に変換 する複数のサンプリング周波数変換回路と、  A plurality of sampling frequency conversion circuits for respectively converting the sampling frequencies of the plurality of input signals into predetermined frequencies;
前記複数のサンプリング周波数変換回路の出力信号間の位相を調整して出力す る遅延調整回路と、 Adjusting and outputting the phase between the output signals of the plurality of sampling frequency conversion circuits; Delay adjustment circuit,
前記遅延調整回路の複数の出力信号から一つの信号を前記制御信号に従い選択 する切替回路とを備えたことを特徴とする音声切替装置。  A switching circuit for selecting one signal from a plurality of output signals of the delay adjustment circuit in accordance with the control signal.
5 . 請求の範囲第 4項記載の音声切替装置において、  5. The voice switching device according to claim 4,
前記遅延調整回路は、 前記サンプリング周波数が変換された信号の位相と、 前 記残りの入力信号の位相とが同じになるように調整することを特徴とする音声切  The delay adjusting circuit adjusts the phase of the signal obtained by converting the sampling frequency so that the phase of the remaining input signal is the same as the phase of the signal.
6 . 請求の範囲第 4項記載の音声切替装置において、 6. The voice switching device according to claim 4,
前記切替回路は、 前記制御信号により切替が指示されたタイミングから前記遅 延調整回路での遅延時間を考慮したタイミングで出力を切り替えることを特徴と する音声切替装置。  The audio switching device, wherein the switching circuit switches an output from a timing at which the switching is instructed by the control signal, at a timing considering a delay time in the delay adjustment circuit.
7 . 複数種の異なるサンプリング周波数で標本化された複数の入力信号と、 前記 複数の入力信号の中から再生すべき信号を指定する制御信号とを入力し、 前記制 御信号に従い前記複数の入力信号から一つの信号を選択して出力する音声切替装 置であって、  7. A plurality of input signals sampled at a plurality of different sampling frequencies, and a control signal specifying a signal to be reproduced from the plurality of input signals are input, and the plurality of input signals are input according to the control signal. An audio switching device for selecting and outputting one signal from signals,
前記複数の入力信号のうちの少なくとも一つの信号のサンプリング周波数を変 換する少なくとも一つのサンプリング周波数変換回路と、  At least one sampling frequency conversion circuit for converting a sampling frequency of at least one signal of the plurality of input signals;
前記複数の入力信号について、 前記サンプリング周波数変換回路でサンプリン グ周波数が変換された信号と、 残りの入力信号との位相を調整して出力する遅延 調整回路と、  A delay adjustment circuit that adjusts the phase of a signal whose sampling frequency is converted by the sampling frequency conversion circuit with respect to the plurality of input signals, and outputs the remaining input signals;
前記遅延調整回路の複数の出力信号から二つの信号を前記制御信号に従い選択 して重み付け加算する加算回路と、  An addition circuit that selects two signals from a plurality of output signals of the delay adjustment circuit according to the control signal and performs weighted addition;
前記遅延調整回路の複数の出力信号と前記加算回路の出力信号から一つの信号 を前記制御信号に従い選択する切替回路とを備えたことを特徴とする音声切替装 置。  An audio switching device, comprising: a switching circuit that selects one signal from a plurality of output signals of the delay adjustment circuit and an output signal of the addition circuit according to the control signal.
8 . 請求の範囲第 7項記載の音声切替装置において、  8. The voice switching device according to claim 7,
前記切替回路は、 前記制御信号により切替が指示されたタイミングから前記遅 延調整回路の遅延時間を考慮したタイミングで、 前記遅延調整回路からの出力信 号の切替前の信号から前記加算回路の出力信号に切替え、 所定間隔だけ前記加算 回路の出力信号を出力した後、 切替後の信号を出力することを特徴とする音声切 The switching circuit outputs the output signal of the addition circuit from the signal before switching of the output signal from the delay adjustment circuit at a timing in consideration of the delay time of the delay adjustment circuit from the timing when the switching is instructed by the control signal. Switch to signal and add the above for a predetermined interval A voice cut-off characterized by outputting a signal after switching after outputting an output signal of a circuit.
9 . 複数種の異なるサンプリング周波数で標本化された複数の入力信号と、 前記 複数の入力信号の中から再生すべき信号を指定する制御信号とを入力し、 前記制 御信号に従い前記複数の入力信号から一つの信号を選択して出力する音声切替装 置であって、 9. A plurality of input signals sampled at a plurality of different sampling frequencies, and a control signal specifying a signal to be reproduced from the plurality of input signals are input, and the plurality of input signals are input according to the control signal. An audio switching device for selecting and outputting one signal from signals,
前記複数の入力信号のサンプリング周波数をそれぞれ予め定めた周波数に変換 する複数のサンプリング周波数変換回路と、  A plurality of sampling frequency conversion circuits for respectively converting the sampling frequencies of the plurality of input signals into predetermined frequencies;
前記サンプリング周波数変換回路の出力信号間の位相を調整して出力する遅延 調整回路と、  A delay adjustment circuit that adjusts and outputs the phase between the output signals of the sampling frequency conversion circuit,
前記遅延調整回路の複数の出力信号から二つの信号を前記制御信号に従い選択 し重み付け加算する加算回路と、  An addition circuit that selects two signals from a plurality of output signals of the delay adjustment circuit according to the control signal and weights and adds;
前記遅延調整回路の複数の出力信号と前記加算回路の出力信号から一つの信号 を前記制御信号に従い選択する切替回路とを備えたことを特徴とする音声切替装 置。  An audio switching device, comprising: a switching circuit that selects one signal from a plurality of output signals of the delay adjustment circuit and an output signal of the addition circuit according to the control signal.
1 0 . 請求の範囲第 9項記載の音声切替装置において、  10. The audio switching device according to claim 9, wherein
前記切替回路は、 前記制御信号により切替が指示されたタイミングから前記遅 延調整回路の遅延時間を考慮したタイミングで、 前記遅延調整回路からの出力信 号の切替前の信号から前記加算回路の出力信号に切替え、 所定間隔だけ前記加算 回路の出力信号を出力した後、 切替後の信号を出力することを特徴とする音声切  The switching circuit outputs the output signal of the addition circuit from the signal before switching of the output signal from the delay adjustment circuit at a timing in consideration of the delay time of the delay adjustment circuit from the timing when the switching is instructed by the control signal. Switching to a signal, outputting an output signal of the adding circuit for a predetermined interval, and then outputting a signal after the switching.
1 1 . 請求の範囲第 1項記載の音声切替装置において、 1 1. The audio switching device according to claim 1,
一つのビットストリームから異なるサンプリング周波数で標本化された複数の 信号を復号して、 前記複数の入力信号として前記サンプリング周波数変換回路又 は前記遅延調整回路に出力する音声復号回路を有し、  An audio decoding circuit that decodes a plurality of signals sampled at different sampling frequencies from one bit stream and outputs the plurality of signals as the plurality of input signals to the sampling frequency conversion circuit or the delay adjustment circuit;
受信時のビットレートに応じて前記音声復号回路の複数の出力復号信号から前 記制御信号により一つの信号を選択して出力することを特徴とする音声切替装置。 An audio switching device, wherein one signal is selected from the plurality of output decoded signals of the audio decoding circuit according to the control signal in accordance with a bit rate at the time of reception and is output.
1 2 . 請求の範囲第 4項記載の音声切替装置において、 1 2. In the voice switching device according to claim 4,
一つのビットストリームから異なるサンプリング周波数で標本化された複数の 信号を復号して、 前記複数の入力信号として前記複数のサンプリング周波数変換 回路に出力する音声復号回路を有し、 Multiple samples sampled at different sampling frequencies from a single bitstream An audio decoding circuit that decodes a signal and outputs the plurality of input signals to the plurality of sampling frequency conversion circuits,
受信時のビットレートに応じて前記音声復号回路の複数の出力復号信号から前 記制御信号により一つの信号を選択して出力することを特徴とする音声切替装置。 An audio switching device, wherein one signal is selected from the plurality of output decoded signals of the audio decoding circuit according to the control signal in accordance with a bit rate at the time of reception and is output.
1 3 . 請求の範囲第 1項記載の音声切替装置において、 1 3. The audio switching device according to claim 1,
複数種の異なるサンプリング周波数の信号が圧縮された複数のビットストリー ムを多重化したビットストリームを入力し、 ビットストリームの種類に応じて、 複数の出力端に切替出力するビットス トリーム切替回路と、  A bit stream switching circuit that inputs a bit stream obtained by multiplexing a plurality of bit streams obtained by compressing a plurality of types of signals having different sampling frequencies, and switches and outputs the output to a plurality of output terminals according to the type of the bit stream;
前記ビッ トス トリーム切替回路から出力される前記ビッ トス トリームをそれぞ れ復号して、 前記複数の入力信号として前記サンプリング周波数変換回路又は前 記遅延調整回路に出力する複数の音声復号回路とを有し、  And a plurality of audio decoding circuits for decoding the bit stream output from the bit stream switching circuit and outputting the decoded signal as the plurality of input signals to the sampling frequency conversion circuit or the delay adjustment circuit. And
前記複数の音声復号回路からの出力復号信号から一つの信号を前記制御信号に 従い選択して出力することを特徴とする音声切替装置。  An audio switching device, wherein one of the decoded signals output from the plurality of audio decoding circuits is selected and output according to the control signal.
1 4 . 請求の範囲第 4項記載の音声切替装置において、  14. The voice switching device according to claim 4,
複数種の異なるサンプリング周波数の信号が圧縮された複数のビットストリー ムを多重化したビットストリームを入力し、 ビットストリームの種類に応じて、 複数の出力端に切替出力するビットス トリーム切替回路と、  A bit stream switching circuit that inputs a bit stream obtained by multiplexing a plurality of bit streams obtained by compressing a plurality of types of signals having different sampling frequencies, and switches and outputs the output to a plurality of output terminals according to the type of the bit stream;
前記ビッ トス ト リーム切替回路から出力される前記ビッ トス トリームをそれぞ れ復号して、 前記複数の入力信号として前記複数のサンプリング周波数変換回路 に出力する複数の音声復号回路とを有し、  A plurality of audio decoding circuits for decoding the bit streams output from the bit stream switching circuit, respectively, and outputting the decoded signals as the plurality of input signals to the plurality of sampling frequency conversion circuits;
前記複数の音声復号回路からの出力復号信号から一つの信号を前記制御信号に 従レ、選択して出力することを特徴とする音声切替装置。  An audio switching device, wherein one of the decoded signals output from the plurality of audio decoding circuits is selected and output in accordance with the control signal.
PCT/JP2000/003230 1999-06-11 2000-05-19 Sound switching device WO2000077775A1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CA002376816A CA2376816A1 (en) 1999-06-11 2000-05-19 Speech switching apparatus
AU47789/00A AU773996B2 (en) 1999-06-11 2000-05-19 Sound switching device
EP00929812A EP1204095A4 (en) 1999-06-11 2000-05-19 Sound switching device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP11/164665 1999-06-11
JP11164665A JP2000352999A (en) 1999-06-11 1999-06-11 Audio switching device

Publications (1)

Publication Number Publication Date
WO2000077775A1 true WO2000077775A1 (en) 2000-12-21

Family

ID=15797504

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2000/003230 WO2000077775A1 (en) 1999-06-11 2000-05-19 Sound switching device

Country Status (5)

Country Link
EP (1) EP1204095A4 (en)
JP (1) JP2000352999A (en)
AU (1) AU773996B2 (en)
CA (1) CA2376816A1 (en)
WO (1) WO2000077775A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU773996B2 (en) * 1999-06-11 2004-06-10 Nec Corporation Sound switching device

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4733939B2 (en) 2004-01-08 2011-07-27 パナソニック株式会社 Signal decoding apparatus and signal decoding method
CN102592604A (en) 2005-01-14 2012-07-18 松下电器产业株式会社 Scalable decoding apparatus and method
JP5100380B2 (en) 2005-06-29 2012-12-19 パナソニック株式会社 Scalable decoding apparatus and lost data interpolation method
JP4560015B2 (en) * 2005-07-29 2010-10-13 パナソニック株式会社 Decryption device
US7761289B2 (en) 2005-10-24 2010-07-20 Lg Electronics Inc. Removing time delays in signal paths
JP2008244775A (en) * 2007-03-27 2008-10-09 Rohm Co Ltd Audio circuit, and electronic apparatus having the same
EP2625688B1 (en) * 2010-10-06 2014-12-03 Fraunhofer Gesellschaft zur Förderung der angewandten Forschung e.V. Apparatus and method for processing an audio signal and for providing a higher temporal granularity for a combined unified speech and audio codec (usac)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6386932A (en) * 1986-09-30 1988-04-18 Toshiba Corp Sample rate converting circuit
JPH01175311A (en) * 1987-12-29 1989-07-11 Sony Corp Sampling frequency converting circuit
JPH0675586A (en) * 1992-07-08 1994-03-18 Seikosha Co Ltd Acoustic signal generating circuit
JPH0758709A (en) * 1993-08-09 1995-03-03 Canon Inc Sound communication equipment
JPH1130997A (en) * 1997-07-11 1999-02-02 Nec Corp Voice coding and decoding device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000352999A (en) * 1999-06-11 2000-12-19 Nec Corp Audio switching device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6386932A (en) * 1986-09-30 1988-04-18 Toshiba Corp Sample rate converting circuit
JPH01175311A (en) * 1987-12-29 1989-07-11 Sony Corp Sampling frequency converting circuit
JPH0675586A (en) * 1992-07-08 1994-03-18 Seikosha Co Ltd Acoustic signal generating circuit
JPH0758709A (en) * 1993-08-09 1995-03-03 Canon Inc Sound communication equipment
JPH1130997A (en) * 1997-07-11 1999-02-02 Nec Corp Voice coding and decoding device

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP1204095A4 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU773996B2 (en) * 1999-06-11 2004-06-10 Nec Corporation Sound switching device

Also Published As

Publication number Publication date
EP1204095A1 (en) 2002-05-08
JP2000352999A (en) 2000-12-19
AU773996B2 (en) 2004-06-10
CA2376816A1 (en) 2000-12-21
AU4778900A (en) 2001-01-02
EP1204095A4 (en) 2005-08-17

Similar Documents

Publication Publication Date Title
US10902859B2 (en) Efficient and scalable parametric stereo coding for low bitrate audio coding applications
EP2015292B1 (en) Efficient and scalable parametric stereo coding for low bitrate audio coding applications
JP2976860B2 (en) Playback device
JPWO2006137425A1 (en) Audio encoding apparatus, audio decoding apparatus, and audio encoded information transmission apparatus
US6009386A (en) Speech playback speed change using wavelet coding, preferably sub-band coding
WO2000077775A1 (en) Sound switching device
KR100636145B1 (en) Exednded high resolution audio signal encoder and decoder thereof
JPH09261070A (en) Digital audio signal processing unit
JPH0588697A (en) Absent speech interpolation system
JP4125520B2 (en) Decoding method for transform-coded data and decoding device for transform-coded data
US20050238185A1 (en) Apparatus for reproduction of compressed audio data
JP6763194B2 (en) Encoding device, decoding device, communication system
JPH08237135A (en) Coding data decodr and video audio multiplex data decoder using the decoder
JP4148203B2 (en) Audio signal transmission method and audio decoding method
JPH08305393A (en) Reproducing device
JPH06348295A (en) Voice band dividing and decoding device
JPH10334604A (en) Compressed data reproducing apparatus
JPH09198796A (en) Acoustic signal recording and reproducing device and video camera using the same
JP2000214875A (en) Digital audio signal reproducing apparatus
JPH11220401A (en) Information decoder and its method, and served medium

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AU CA US

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 10009244

Country of ref document: US

ENP Entry into the national phase

Ref document number: 2376816

Country of ref document: CA

Ref country code: CA

Ref document number: 2376816

Kind code of ref document: A

Format of ref document f/p: F

WWE Wipo information: entry into national phase

Ref document number: 2000929812

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 47789/00

Country of ref document: AU

WWP Wipo information: published in national office

Ref document number: 2000929812

Country of ref document: EP

WWG Wipo information: grant in national office

Ref document number: 47789/00

Country of ref document: AU

WWW Wipo information: withdrawn in national office

Ref document number: 2000929812

Country of ref document: EP