WO1999059047A3 - Procede et appareil pour recuperation a faible instabilite du signal de synchronisation - Google Patents

Procede et appareil pour recuperation a faible instabilite du signal de synchronisation Download PDF

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Publication number
WO1999059047A3
WO1999059047A3 PCT/US1999/010226 US9910226W WO9959047A3 WO 1999059047 A3 WO1999059047 A3 WO 1999059047A3 US 9910226 W US9910226 W US 9910226W WO 9959047 A3 WO9959047 A3 WO 9959047A3
Authority
WO
WIPO (PCT)
Prior art keywords
cycle
jitter
reduced
noise
phy
Prior art date
Application number
PCT/US1999/010226
Other languages
English (en)
Other versions
WO1999059047A2 (fr
Inventor
Robert W Moses
Allen R Goldstein
Original Assignee
Digital Harmony Technologies L
Robert W Moses
Allen R Goldstein
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Harmony Technologies L, Robert W Moses, Allen R Goldstein filed Critical Digital Harmony Technologies L
Priority to AU38946/99A priority Critical patent/AU3894699A/en
Priority to CA002330970A priority patent/CA2330970A1/fr
Priority to JP2000548791A priority patent/JP2002514876A/ja
Priority to EP99921837A priority patent/EP1076846A2/fr
Publication of WO1999059047A2 publication Critical patent/WO1999059047A2/fr
Publication of WO1999059047A3 publication Critical patent/WO1999059047A3/fr

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40052—High-speed IEEE 1394 serial bus
    • H04L12/40058—Isochronous transmission
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/24—Loading of the microprogram
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0632—Synchronisation of packets and cells, e.g. transmission of voice via a packet network, circuit emulation service [CES]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40052—High-speed IEEE 1394 serial bus
    • H04L12/40117—Interconnection of audio or video/imaging devices
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/436—Interfacing a local distribution network, e.g. communicating with another STB or one or more peripheral devices inside the home
    • H04N21/4363—Adapting the video stream to a specific local network, e.g. a Bluetooth® network
    • H04N21/43632—Adapting the video stream to a specific local network, e.g. a Bluetooth® network involving a wired protocol, e.g. IEEE 1394

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Software Systems (AREA)
  • Multimedia (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Stored Programmes (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Picture Signal Circuits (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)
  • Digital Computer Display Output (AREA)

Abstract

L'invention concerne un procédé et un appareil permettant de réduire l'instabilité affectant la synchronisation de l'échantillonnage des données récupérée à partir des trains isochrones de paquets de données auxquels sont associés des valeurs d'horodatage, comme par exemple dans un système interconnecté à bus IEEE 1394. On réduit l'instabilité associée à des variations dans les horloges PHY à quartz en mode libre en asservissant les horloges PHY locales au moyen d'un circuit de PLL connecté à la borne LCO (Link cycle-out), lequel PLL bascule lorsque le champ de déphasage du registre de temps de cycle reboucle et que le champ de nombre de cycles fait +1. Etant donné que la COP bascule à une fréquence proportionnelle à la cadence de l'horloge maîtresse PHY du cycle, l'instabilité associée aux variations dans les horloges PHY locales est diminuée. Pour réduire l'instabilité associée au bruit de quantification issu de la génération d'horodatage à longueur finie, on réalise une activation et on filtre la structure de bruit des horodatages classiques. On arrive ainsi à dissocier l'instabilité et à faire sortir le bruit associé hors de la bande de fréquence attendue du signal de synchronisation à récupérer.
PCT/US1999/010226 1998-05-11 1999-05-11 Procede et appareil pour recuperation a faible instabilite du signal de synchronisation WO1999059047A2 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
AU38946/99A AU3894699A (en) 1998-05-11 1999-05-11 Method and apparatus for low jitter clock recovery
CA002330970A CA2330970A1 (fr) 1998-05-11 1999-05-11 Procede et appareil pour recuperation a faible instabilite du signal de synchronisation
JP2000548791A JP2002514876A (ja) 1998-05-11 1999-05-11 低ジッタクロック回復の方法および装置
EP99921837A EP1076846A2 (fr) 1998-05-11 1999-05-11 Procede et appareil pour recuperation a faible instabilite du signal de synchronisation

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US8502198P 1998-05-11 1998-05-11
US60/085,021 1998-05-11

Publications (2)

Publication Number Publication Date
WO1999059047A2 WO1999059047A2 (fr) 1999-11-18
WO1999059047A3 true WO1999059047A3 (fr) 2000-04-06

Family

ID=22188925

Family Applications (4)

Application Number Title Priority Date Filing Date
PCT/US1999/010255 WO1999059060A2 (fr) 1998-05-11 1999-05-10 Procede et systeme de distribution d'instructions de traitement de donnees
PCT/US1999/010226 WO1999059047A2 (fr) 1998-05-11 1999-05-11 Procede et appareil pour recuperation a faible instabilite du signal de synchronisation
PCT/US1999/010225 WO1999059391A2 (fr) 1998-05-11 1999-05-11 Procede et appareil de recuperation d'horloge d'echantillons de donnees
PCT/US1999/010224 WO1999059073A2 (fr) 1998-05-11 1999-05-11 Procede et systeme permettant de fournir un interface d'utilisateur pour un appareil

Family Applications Before (1)

Application Number Title Priority Date Filing Date
PCT/US1999/010255 WO1999059060A2 (fr) 1998-05-11 1999-05-10 Procede et systeme de distribution d'instructions de traitement de donnees

Family Applications After (2)

Application Number Title Priority Date Filing Date
PCT/US1999/010225 WO1999059391A2 (fr) 1998-05-11 1999-05-11 Procede et appareil de recuperation d'horloge d'echantillons de donnees
PCT/US1999/010224 WO1999059073A2 (fr) 1998-05-11 1999-05-11 Procede et systeme permettant de fournir un interface d'utilisateur pour un appareil

Country Status (5)

Country Link
EP (4) EP1076850A2 (fr)
JP (4) JP2002514810A (fr)
AU (4) AU3897099A (fr)
CA (4) CA2330739A1 (fr)
WO (4) WO1999059060A2 (fr)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3424620B2 (ja) * 1999-09-24 2003-07-07 日本電気株式会社 アイソクロナスパケット転送方法，該転送用制御プログラムの記録媒体，ブリッジ及びパケット転送制御ｌｓｉ
US6895009B1 (en) 2000-04-07 2005-05-17 Omneon Video Networks Method of generating timestamps for isochronous data
EP1198085B1 (fr) 2000-10-10 2011-06-08 Sony Deutschland GmbH Synchronisation de cycle entre des sous-réseaux interconnectés entre eux
DE10104876A1 (de) * 2001-02-03 2002-08-08 Bosch Gmbh Robert Schaltungsanordnung und Verfahren zum synchronisierten Übertragen von Audiodatenströmen in einem Bussystem
DE10229372A1 (de) * 2002-06-29 2004-01-15 Deutsche Thomson-Brandt Gmbh Datenübertragungsgerät
TWI347092B (en) 2006-04-11 2011-08-11 Realtek Semiconductor Corp Methods for adjusting sampling clock of sampling circuit and related apparatuses
GB2449932A (en) * 2007-06-08 2008-12-10 Tandberg Television Asa Timestamp conversion using samples
US7936794B2 (en) * 2007-08-07 2011-05-03 Avaya Inc. Clock management between two end points
GB2514572B (en) * 2013-05-29 2020-05-27 Grass Valley Ltd Re-timing sampled data
CN106933212B (zh) * 2017-04-21 2019-12-10 华南理工大学 一种分布式制造环境下的可重构工业机器人编程控制方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0695063A2 (fr) * 1994-07-25 1996-01-31 Sony Corporation Système de transmission par paquets
US5526362A (en) * 1994-03-31 1996-06-11 Telco Systems, Inc. Control of receiver station timing for time-stamped data
EP0838926A2 (fr) * 1996-10-22 1998-04-29 Sony Corporation Dispositif et procédé de transmission et de réception de données isochrones

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2645989A1 (fr) * 1989-04-17 1990-10-19 Bull Sa Coupleur multifonctions entre une unite centrale d'ordinateur et les differents organes peripheriques de ce dernier
EP0489204B1 (fr) * 1990-12-04 1995-08-16 Hewlett-Packard Limited Support de données reprogrammable
JP2937529B2 (ja) * 1991-03-27 1999-08-23 日本電気株式会社 クロック再生回路
US5635979A (en) * 1994-05-27 1997-06-03 Bell Atlantic Dynamically programmable digital entertainment terminal using downloaded software to control broadband data operations
US5901149A (en) * 1994-11-09 1999-05-04 Sony Corporation Decode and encode system
US6067500A (en) * 1995-08-14 2000-05-23 Aisin Aw Co., Ltd. Navigation system
AU2651497A (en) * 1996-05-07 1997-11-26 Yamaha Corporation Method and system for transmitting data
US5922050A (en) * 1996-07-02 1999-07-13 Sun Microsystems, Inc. Method and apparatus for controlling a device on a network

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5526362A (en) * 1994-03-31 1996-06-11 Telco Systems, Inc. Control of receiver station timing for time-stamped data
EP0695063A2 (fr) * 1994-07-25 1996-01-31 Sony Corporation Système de transmission par paquets
EP0838926A2 (fr) * 1996-10-22 1998-04-29 Sony Corporation Dispositif et procédé de transmission et de réception de données isochrones

Also Published As

Publication number Publication date
WO1999059073A3 (fr) 1999-12-29
WO1999059391A2 (fr) 1999-11-18
CA2330970A1 (fr) 1999-11-18
WO1999059073A9 (fr) 2001-05-31
WO1999059073A2 (fr) 1999-11-18
WO1999059047A2 (fr) 1999-11-18
AU3792199A (en) 1999-11-29
JP2002515718A (ja) 2002-05-28
CA2330676A1 (fr) 1999-11-18
EP1076850A2 (fr) 2001-02-21
AU3792299A (en) 1999-11-29
WO1999059060A3 (fr) 1999-12-29
EP1076846A2 (fr) 2001-02-21
CA2330740A1 (fr) 1999-11-18
JP2002514810A (ja) 2002-05-21
JP2002514820A (ja) 2002-05-21
AU3894699A (en) 1999-11-29
WO1999059060A2 (fr) 1999-11-18
CA2330739A1 (fr) 1999-11-18
AU3897099A (en) 1999-11-29
WO1999059391A3 (fr) 2001-03-22
JP2002514876A (ja) 2002-05-21
EP1101303A2 (fr) 2001-05-23
EP1076858A2 (fr) 2001-02-21

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