WO1999042988A1 - Dispositif d'affichage et procede pour representer des signaux d'images analogiques de maniere synchrone avec les pixels - Google Patents

Dispositif d'affichage et procede pour representer des signaux d'images analogiques de maniere synchrone avec les pixels Download PDF

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Publication number
WO1999042988A1
WO1999042988A1 PCT/DE1999/000442 DE9900442W WO9942988A1 WO 1999042988 A1 WO1999042988 A1 WO 1999042988A1 DE 9900442 W DE9900442 W DE 9900442W WO 9942988 A1 WO9942988 A1 WO 9942988A1
Authority
WO
WIPO (PCT)
Prior art keywords
display
image
pixel matrix
display device
pixel
Prior art date
Application number
PCT/DE1999/000442
Other languages
German (de)
English (en)
Inventor
Ulrich Leierseder
Gerhard Martin
Robert Wittmann
Original Assignee
Siemens Aktiengesellschaft
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Aktiengesellschaft filed Critical Siemens Aktiengesellschaft
Publication of WO1999042988A1 publication Critical patent/WO1999042988A1/fr

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Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/005Adapting incoming signals to the display format of the display terminal
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3648Control of matrices with row and column drivers using an active matrix
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006Details of the interface to the display terminal
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/18Timing circuits for raster scan displays

Definitions

  • the invention relates to a display device for displaying analog image signals according to the preamble of claim 1 and a method for displaying analog image signals.
  • Such a display device is known from Offenlegungssch ⁇ ft DE 196 25 898 AI.
  • the system clock of a display system is fed to an image signal source.
  • the image signals of the image signal source are therefore output in synchronism with the system clock of the display system.
  • the image signal source must be arranged directly on the display system. Otherwise, electromagnetic compatibility problems will arise.
  • the distance between the output of the image signal source and the input of the display system must be precisely defined in order to be able to take into account the transit time of the image signal. In practice, this creates considerable difficulties.
  • a pixel-synchronous representation of the image signals should not only be possible for image signal sources arranged directly on the pixel matrix display, but also for external image signal sources.
  • the phase relationship between the system clock of the pixel matrix display and the synchronization signal of the image signal source can be controlled by inserting an adjustable timer between the image signal source and the display unit.
  • the synchronization signal of the image signal source is delayed to such an extent that the synchronization signal is present in the image control unit in phase with the system clock of the pixel matrix display.
  • the advantages of the invention become particularly clear when image signals from several different image signal sources are to be displayed simultaneously on a pixel matrix display.
  • a preferred field of application of the invention is active (TFT) color displays which have an external input for RGB image signals.
  • sampling of analog image signals (R, G, B, SYNC) with a very high frequency (oversampling) can be dispensed with. This means that a high level of circuitry and errors due to digitization are avoided.
  • the system according to the invention is simple to implement in terms of circuitry and is insensitive to temperature influences and varying cable lengths (different delay times) between an image signal source and the image control unit of the display device.
  • the clock of the pixel representation of the pixel matrix display is used to control the synchronization signal of the image signal source.
  • a display unit 1 has a pixel matrix display 12, which is designed as a TFT liquid crystal color display, and a display controller 11.
  • the display controller 11 outputs a system clock 111 to an image control unit 2 and is controlled by the latter.
  • the image control unit 2 has a timing element 22, a phase comparator 23 and an up / down counter 21.
  • the image control unit 2 is connected to an external image signal source 3, which outputs analog image signals RGB.
  • the image signal source provides a synchronization output 31, at which a synchronization signal CSYNC is present.
  • the first image pixel is output 12 ⁇ s after the falling edge of the CSYNC signal, and more precisely the HSYNC signal contained therein.
  • the phase comparator 23 compares the system clock 111, which is the pixel clock of the display controller 11, and the synchronization signal CSYNC in their phase relationship to one another.
  • the phase comparator is connected to the synchronization signal of the image signal source 3, which is not influenced by the timing element 22.
  • the system clock is 3 MHz.
  • the synchronization signal is clocked at 15.7 kHz.
  • Either the rising or the falling edge of the CSYNC signal can be synchronized to a rising or falling edge of the system clock 211.
  • the timing of the reproduction of the first pixel or pixel of a line is exactly defined by the edges of the CSYNC signal.
  • a signal is output to the counter 21 which is the counter 5 causes to pay upwards. With the upward numbers, a longer delay time is simultaneously set on the timing element 22. If, on the other hand, the system clock 111 is at a high level before the synchronization signal, the phase comparator 22 causes the counter 21 to pay downwards and to shorten the delay time of the timing element 22.
  • the pulse duration of a pixel is 158 ns.
  • a suitable default setting for the timer is the pulse duration of one
  • Pixel here about 150 ns.
  • the payer 21 effects a time shift of the CSYNC signal fed to the display control 11 by 5 ns in each case.
  • the phase comparator outputs a signal for counting up or down until both a rising or falling edge of the system clock 111 and a rising or falling edge of the synchronization signal are detected.
  • System clock 111 exactly one output to the timing element 22, or multiple outputs can take place.
  • the counter 21 is outputted to the timer 22 per image change.
  • a new payment signal is only output to the timer 22 again when the
  • the aim of the control is to bring the synchronization signal into a rigid phase relationship with the system clock.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

L'invention concerne un dispositif d'affichage comprenant une unité d'affichage (1) avec une commande d'affichage (11) et un affichage matriciel par points (12). On parvient à représenter sur ce dispositif de manière synchrone en termes de points, les signaux d'images analogiques d'une source de signaux d'image, du fait qu'un élément de temporisation (22) est commuté entre la source de signaux d'images (3) et l'unité affichage (1). L'élément de temporisation est ajusté en fonction d'un décalage de phases entre une horloge système (111) de la commande affichage (11) et un signal de synchronisation de la source de signaux d'images (3).
PCT/DE1999/000442 1998-02-20 1999-02-17 Dispositif d'affichage et procede pour representer des signaux d'images analogiques de maniere synchrone avec les pixels WO1999042988A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19807257.0 1998-02-20
DE1998107257 DE19807257C2 (de) 1998-02-20 1998-02-20 Anzeigevorrichtung und Verfahren zur Darstellung von analogen Bildsignalen

Publications (1)

Publication Number Publication Date
WO1999042988A1 true WO1999042988A1 (fr) 1999-08-26

Family

ID=7858466

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE1999/000442 WO1999042988A1 (fr) 1998-02-20 1999-02-17 Dispositif d'affichage et procede pour representer des signaux d'images analogiques de maniere synchrone avec les pixels

Country Status (2)

Country Link
DE (1) DE19807257C2 (fr)
WO (1) WO1999042988A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6738056B2 (en) 2001-07-25 2004-05-18 Brillian Corporation System and method for handling the input video stream for a display

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05297839A (ja) * 1992-04-23 1993-11-12 Nec Home Electron Ltd 表示装置
US5517612A (en) * 1993-11-12 1996-05-14 International Business Machines Corporation Device for scaling real-time image frames in multi-media workstations
WO1997005740A1 (fr) * 1995-07-28 1997-02-13 Litton Systems Canada Limited Procede et appareil de numerisation de signaux video, notamment pour des ecrans d'affichage plats a cristaux liquides
US5610667A (en) * 1995-08-24 1997-03-11 Micron Display Technology, Inc. Apparatus and method for maintaining synchronism between a picture signal and a matrix scanned array
EP0791913A2 (fr) * 1996-02-22 1997-08-27 Seiko Epson Corporation Méthode et appareil pour ajuster un signal d'horloge de point
EP0805430A1 (fr) * 1996-04-26 1997-11-05 Matsushita Electric Industrial Co., Ltd. Adaptateur vidéo et appareil d'affichage d'image numérique
DE19625898A1 (de) * 1996-06-27 1998-01-08 Siemens Ag Anzeigesystem und Verfahren zur Versorgung eines Anzeigesystems mit einem Bildsignal

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3218567B2 (ja) * 1990-09-28 2001-10-15 クロームアロイ・ガス・タービン・コーポレイション 高強力ニッケル基超合金類の溶接

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05297839A (ja) * 1992-04-23 1993-11-12 Nec Home Electron Ltd 表示装置
US5517612A (en) * 1993-11-12 1996-05-14 International Business Machines Corporation Device for scaling real-time image frames in multi-media workstations
WO1997005740A1 (fr) * 1995-07-28 1997-02-13 Litton Systems Canada Limited Procede et appareil de numerisation de signaux video, notamment pour des ecrans d'affichage plats a cristaux liquides
US5610667A (en) * 1995-08-24 1997-03-11 Micron Display Technology, Inc. Apparatus and method for maintaining synchronism between a picture signal and a matrix scanned array
EP0791913A2 (fr) * 1996-02-22 1997-08-27 Seiko Epson Corporation Méthode et appareil pour ajuster un signal d'horloge de point
EP0805430A1 (fr) * 1996-04-26 1997-11-05 Matsushita Electric Industrial Co., Ltd. Adaptateur vidéo et appareil d'affichage d'image numérique
DE19625898A1 (de) * 1996-06-27 1998-01-08 Siemens Ag Anzeigesystem und Verfahren zur Versorgung eines Anzeigesystems mit einem Bildsignal

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 18, no. 100 (P - 1695) 17 February 1994 (1994-02-17) *

Also Published As

Publication number Publication date
DE19807257C2 (de) 2000-05-11
DE19807257A1 (de) 1999-09-09

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