Classifications

• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
  • H04N21/20—Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
  • H04N21/23—Processing of content or additional data; Elementary server operations; Server middleware
  • H04N21/236—Assembling of a multiplex stream, e.g. transport stream, by combining a video stream with other content or additional data, e.g. inserting a URL [Uniform Resource Locator] into a video stream, multiplexing software data into a video stream; Remultiplexing of multiplex streams; Insertion of stuffing bits into the multiplex stream, e.g. to obtain a constant bit-rate; Assembling of a packetised elementary stream
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N7/00—Television systems
  • H04N7/24—Systems for the transmission of television signals using pulse code modulation
  • H04N7/52—Systems for transmission of a pulse code modulated video signal with one or more other pulse code modulated signals, e.g. an audio signal or a synchronizing signal

Definitions

• the present invention relates to an apparatus and a method for multiplexing video data, audio data and additional data such as subtitles and generating a transport stream for transmission, wherein the video data and audio data may be compressed and encoded according to a MPEG standard or the like.
• audio data and video data may be processed for particular applications such as movies or music promotions. More specifically, in such digital television broadcasting systems, data may be processed into data suitable for a so-called surround system, audio data may be processed so as to presented in several languages, or audio data, video data and additional data may be multiplexed so as to generate a transport stream wherein a dialogue may be superimposed in a number of languages, and broadcasted to viewers.
• An object of the present invention is to provide a data multiplexer and a method thereof for enabling audio data, video data and additional data to be multiplexed in a digital television broadcasting system or the like.
• a data multiplexing apparatus which comprises a data size detecting device for detecting data sizes of input video data and audio data, a buffer device for buffering the input video data and audio data, a device for formulating a multiplexing plan for the input video data and audio data in response to the detected data sizes and for controlling the multiplexing of the video data and audio data in response to the multiplexing plan so as to obtain a multiplexed data stream, a bus for connecting the data size detecting means and the controlling device, a data supply line for supplying the input video data and audio data to the buffer device, and a data output line for outputting the multiplexed data stream to an external apparatus.
• the bus is separate from the data supply line means and the data output line means so that the
• the controlling device may include a computer
• the bus may include a computer bus connected to the computer.
• the present data multiplexer may also include an encoding device(s) for encoding the video data, the audio data and first additional data and for supplying the encoded data to the data size detecting device and the buffer device.
• the present data multiplexer may also include a data receiving device for receiving second additional data from outside for supply to a data selecting device.
• the present data multiplexer may multiplex video data, audio data and first additional data such as subtitles for use in a digital television broadcasting system and may further multiplex second additional data (private data) such as superimposed dialogue into multiplexed data so as to generate a transport data stream.
• a multiplexing system for directly multiplexing video data and other data (such as audio data and so forth) and a control system, separate from the multiplexing system, for controlling the multiplexing may be provided and arranged such that the video and other data to be multiplexed and data associated with multiplexing control may be respectively processed in the corresponding system.
• the data size determining or counting device may be arranged within the control system and may count video data, audio data and first additional data after such data has been compressed and encoded according to a MPEG standard or the like so as to obtain data size information thereof.
• the buffer device may be arranged within the multiplexing system and may include FIFO (first in first out) memories or the like for buffering the video data, the audio data, and the first additional data.
• First and second data multiplexing portions may be included within the multiplexing system, wherein the first data multiplexing portion may select and multiplex the buffered video data, audio data, and/or first additional data, and the second data multiplexing portion may select any of the video data, the audio data and the first additional data which are selected and multiplexed by the first data multiplexing portion or may select the second additional data such as superimposed dialogue data under the control of the control system and may multiplex any of the video data, the audio data and the first additional data which are multiplexed and the second additional data.
• the controlling device may be arranged within the control system and may formulate a plan for multiplexing the video data, the audio data, the first additional data and the second additional data, timing adjustment, scheduling or the like based on the data size of the video data, the audio data and the additional data as determined or counted by the data size counting device.
• the controlling device may also control the selection by the first and second data multiplexing portions based on the multiplexing plan so as to control the multiplexing of the data in the first and second data multiplexing portions.
• a data multiplexing method which comprises the steps of receiving video data, audio data, first additional data, and second additional data; obtaining data sizes of the received video data, audio data and first additional data; buffering the received video data, audio data and first additional data; selecting the buffered video data, audio data or first additional data; selecting the received second additional data or the selected one of the buffered video data, audio data, and first additional data; formulating a plan for multiplexing the video data, the audio data, the first additional data, and the second additional data based on the data size of the video data, the audio data and the additional data; and controlling the selection of the buffered video data, audio data or first additional data and the selection of the second additional data or the selected one of the buffered video data, audio data, and first additional data based on the multiplexing plan so as to multiplex the video data, the audio data, the first additional data, and the second additional data.
• FIG. 1 is a diagram of a data multiplexer according to an embodiment of the present invention
• Fig. 2 is a diagram of the data multiplexer according to an embodiment of the present invention
• Fig. 3 is a diagram of a video encoder in the data multiplexer of Fig. 2;
• Fig. 4 is a diagram of an audio encoder in the data multiplexer of Fig. 2;
• Fig. 5 is a flowchart to which reference will be made in explaining the processing performed by a CPU in the data multiplexer of Fig. 2. DESCRIPTION OF THE PREFERRED EMBODIMENTS
• Fig. 1 illustrates a data multiplexer 1.
• data multiplexer may include a video encoder 20, an audio encoder 24, a subtitle encoder 28, and a multiplexer 10 having a buffer memory 100 and a transport stream maker 102.
• the data multiplexer 1 may receive and encode a video stream, an audio stream, and a subtitle stream (for movie or music promotion) and may multiplex the same into one stream so as to generate a transport stream, as hereinbelow more fully described.
• the video encoder 20 may receive video data from an external device (not shown) such as an editing device and so forth and may compress and encode the received video data according to a predetermined standard (such as an MPEG2 standard or the like) and output the obtained data as a video stream to the buffer memory 100.
• the audio encoder 24 may receive audio data from an external device (not shown) and may compress and encode the received audio data according to a predetermined standard (such as an MPEG2 standard or the like) and output the obtained data as an audio stream to the buffer memory 100.
• the subtitle encoder 28 may receive subtitle data from an external generating subtitle data device (not shown) and may encode the received subtitle data by a predetermined process (such as a linear quantization process and a fixed-length encoding process) and output the obtained result as a subtitle stream to the buffer memory 100.
• a predetermined process such as a linear quantization process and a fixed-length encoding process
• the buffer memory 100 buffers the video stream, the audio stream and the subtitle stream respectively supplied from the video encoder 20, the audio encoder 24 and the subtitle encoder 28, and supplies an output to the transport stream maker 102.
• the transport stream maker 102 which may include a high-speed computer having a microprocessor (CPU) or the like, may obtain or read out the video stream, the audio stream, and the subtitle stream (each of which may be referred to as an elementary stream) from the buffer memory 100, may perform scheduling, and may add a header or the like in accordance with a transmission format so as to generate a transport stream for output therefrom.
• the buffer memory 100 temporarily stores all the elementary streams therein and the CPU of the transport stream maker 102 performs processing such as scheduling and addition of a header to generate a transport stream.
• the CPU may access each word (byte) in the elementary streams through a data bus in such a manner that a so-called bus neck or the like may be generated in the data bus of the transport stream maker 102 which may hinder or prevent high-speed processing. Accordingly, such processing manner may not be acceptable for forming a transport stream.
• a data multiplexer 2 will now be described with reference to Figs. 2-5 which may overcome the above- described problems of the data multiplexer 1. In such multiplexer 2, by separating a control system for performing scheduling for multiplexing the elementary streams from a multiplexing system for directly multiplexing the elementary streams, high-speed production of a transport stream may be obtained, as hereinbelow more fully described.
• the data multiplexer 2 generally includes the video encoder 20, the audio encoder 24, the subtitle encoder 28, a multiplexing system 12, and a control system 42.
• the multiplexing system 12 may include FIFO memories 32a, 32b, and 32c, a RAM 430, a first switch circuit 34, a second switch circuit 36, a FIFO memory 38, and a SCSI (small computer system interface) circuit 40, which may be connected as shown in Fig. 2.
• the control system 42 may include data size counting interface circuits 30a, 30b, and 30c, an ethernet interface (ENIF) circuit 420, a serial interface (SIF) circuit 422, a CPU 424, a processing RAM 426, and a control data RAM 428, which may be coupled together through a CPU bus as shown in Fig. 2.
• the video encoder 20 may include adding circuits 202 and 212, a discrete cosine transform (DCT) circuit 204, a quantizing circuit 206, an inverse quantizing circuit 208, an inverse DCT circuit 210, a frame memory circuit 216, a variable-length encoding
• VLC variable-length encoding circuit 218, a bit rate control circuit 220, and a variable-length encoding (VLC) buffer 222, which may be arranged as shown in Fig. 3.
• the video encoder 20 is adapted to receive an input video data (Video IN) from an external device and to compress and encode the same according to a predetermined standard, such as a MPEG2 standard or the like, and to generate a video stream (MPEG Video stream) for supply to the data size IF 30a and the FIFO memory 32a (Fig. 2) .
• a predetermined standard such as a MPEG2 standard or the like
• the audio encoder 24 may include a sub-band analyzing filter bank (SAFB) 240, a linear quantizing circuit 242, a bit compression circuit 244, a fast fourier transfer (FFT) circuit 246, a psychological auditory model 248, a dynamic bit assignment circuit 250, a scale factor selection information storing circuit 252, a scale factor extracting circuit 254, a side information encoding circuit 256, and a bit stream generating circuit 258, as shown in Fig. 4.
• SAFB sub-band analyzing filter bank
• FFT fast fourier transfer
• the audio encoder 24 is adapted to receive audio data (Audio Input) from an external device and to compress and encode the same according to a predetermined standard, such as a MPEG2 standard or the like, and to generate an audio stream (MPEG Audio stream) for supply to the data size IF 30b and the FIFO memory 32b (Fig. 2) .
• a predetermined standard such as a MPEG2 standard or the like
• MPEG Audio stream MPEG Audio stream
• a further description of such audio encoder may be obtained from an article entitled "ISO- MPEG-l Audio: A Generic Standard for Coding of High- Quality Digital Audio", by K. Brandenburg et al., J. Audio Eng. Soc, Vol. 42, No. 10, October 1994, pages 780-792, which is hereby incorporated by reference.
• the subtitle encoder 28 is adapted to receive additional data such as subtitle data from an external device and to encode the same, in a manner similar to that previously described, and to generate a subtitle stream for supply to the data size IF 30c and the FIFO memory 32c (Fig. 2) .
• encoded data may be supplied from an external device.
• encoded subtitle data may be supplied through a LAN (local area network) such as the Ethernet to the ENIF circuit 420 or encoded subtitle data may be supplied through a serial line to the serial interface 422, and such received encoded subtitle data may be supplied through the CPU bus to the RAM 430 for storage therein. Since the amount of encoded subtitle data is relatively small, as compared to the amount of encoded video data and/or encoded audio data, supplying the encoded subtitle data on the CPU bus may not adversely affect the CPU bus traffic. In this situation, the ENIF circuit 420 or the serial interface 422 may detect information such as the header and/or size information (which may be written in the header) in the encoded subtitle data, and the detected information may be supplied through the CPU bus to the CPU 424.
• the FIFO memories 32a, 32b and 32c respectively buffer the video stream, the audio stream and the subtitle stream received from the video encoder 20, the audio encoder 24 and the subtitle encoder 28 and supply output streams to input terminals a, b and c of the switch circuit 34. Additionally, the encoded subtitle data stored in the RAM 430 may be supplied to an input terminal d of the switching circuit 34 under the control of the CPU 424.
• the switch circuit 34 selects any of the input terminals a, b, c and d and supplies the respective elementary stream supplied to the selected input terminal to an input terminal b of the switch circuit 36. As a result, a multiplexed signal or stream may be formed and supplied to the input terminal b of the switch circuit 36.
• the switch circuit 34 may select none of the input terminals a, b, c and d and, as such, output a predetermined amount of blank data (for example, consecutive logic values of 1 or 0) when no elementary stream is supplied to any of the input terminals or when a so-called stuffing process is being performed.
• the RAM 26 may supply a signal or additional data stream, which may be representative of a header, to an input terminal a of the switch circuit 36.
• the switch circuit 36 may select any of the input terminals a and b so as to multiplex the elementary streams supplied from the switch circuit 34 to the input terminal b of the switch circuit 36 and the additional data stream (header information) supplied from the processing RAM 426 to the input terminal a of the switch circuit 36.
• a multiplexed or selected data stream is supplied from the switch circuit 36 to the FIFO memory 38 and the SCSIIF circuit 40.
• the FIFO memory 38 buffers the multiplexed data stream received from the switch circuit 36 and supplies an output or a transport stream to an external device (not shown) such as a communication line and so forth.
• the SCSIIF circuit 40 receives the multiplexed data stream from the switch circuit 36 and supplies the same to a storage device (not shown) such as a hard disk drive (HDD) or a magnetic optical disk drive (MOD) wherein the data stream is stored.
• a storage device not shown
• HDD hard disk drive
• MOD magnetic optical disk drive
• the data size IFs 30a, 30b, and 30 ⁇ may count the data size for each frame of the video stream, the audio stream, and the subtitle stream respectively supplied from the video encoder 20, the audio encoder 24, and the subtitle encoder 28 and may supply the obtained result to the CPU 42 by way of the CPU bus. Such counting of data sizes may be achieved by use of counters which may be included in the data size IFs 30a, 30b, and 30c. Alternatively, data size information may be determined by the respective encoder and supplied as an output signal therefrom, whereupon such data size information signal may be detected and supplied to the CPU 424.
• the ENIF circuit 420 may receive private data through a LAN (not shown) such as Ethernet and may output data to the CPU 424 through the CPU bus.
• the SIF circuit 422 may receive private data having a serial format from, for example, a computer or the like, and may output data to the CPU 424. Such so-called private data may include encoded subtitle data, closed caption data, user data, and so forth.
• the CPU 424 may include a microprocessor and a ROM for storing programs. Such CPU is adapted to receive and store the data sizes from the data size IFs 30a, 30b and 30c, and data from the ENIF circuit 420 and the SIF circuit 422. The CPU is further adapted to formulate a multiplexing plan or to control the multiplexing operation of the present data multiplexer. That is, the CPU 424 may control the multiplexing of the elementary streams, timing adjustment and scheduling for multiplexing based on the data sizes stored in the processing RAM 426, and the switching or multiplexing operation of the switch circuits 34 and 36 according to the multiplexing plan by way of the CPU bus.
• Control data for processing the CPU 424 may be stored in the control data RAM 428. Additionally, the CPU may control or utilize the processing RAM 426 for processing, storing, and/or supplying data. For example, the CPU 424 may use the processing RAM 426 to generate header information, store such header information, and output the same to the input terminal a of the switch circuit 36 on the basis of a scheduling procedure or the like in accordance with control data stored in the control data RAM 428. Alternatively, the header information or a portion thereof may be generated on the basis of private data (such as user data) supplied from the ENIF circuit 420 or the SIF circuit 422 and stored in the RAM 426.
• private data such as user data
• Video data, audio data, and subtitle data are respectively supplied to the video encoder 20, the audio encoder 24, and the subtitle encoder 28 and encoded thereat.
• the data size of the encoded video stream, audio stream and subtitle stream are determined by counting the data in the data size IFs 30a, 30b and 30c and the obtained counted data sizes are supplied to the CPU 424.
• the ENIF circuit 420 or the serial interface 422 may detect the data size, whereupon the detected data size is supplied to the CPU 424 through the CPU bus.
• the encoded sub-code data may be supplied to the RAM 430 and outputted therefrom to the input terminal d of the switching circuit 34 under the control of the CPU 424.
• Data may be switched or multiplexed by use of switch circuits 34 and 36 in accordance with control signals from the CPU 424.
• An output from the switch circuit 36 is supplied to the FIFO 38 and the SCSIIF circuit 40.
• the FIFO 38 buffers the received data and outputs a transport stream which may be supplied over a communication line or the like.
• the SCSIIF circuit 40 transmits the received data to a hard disc drive or the like so as to record the same.
• the CPU 424 receives the data sizes of a frame(s) for a video stream, an audio stream and a subtitle stream from the data size IF 30a, 30b and 30c and stores the received data sizes in the processing RAM 426.
• the CPU 424 may receive data sizes from the ENIF circuit 420 and the SIF circuit 422, whereupon the CPU 424 stores such data sizes. Processing then proceeds to step S103 wherein the parameters may be initialized by the CPU 424. Processing then proceeds to step SI04.
• step S104 the CPU 424 formulates a multiplexing plan. That is, a loop iteration number N is determined.
• Such loop iteration number N may indicate the number of packets which may be inserted into one video frame or a duration thereof, in which the size of a packet may have a fixed predetermined value such as 188 bytes. Accordingly, the loop iteration number N may be determined on the basis of the data rate of the transport stream. For example, the loop iteration number N may be defined as the data rate (bytes) of the transport steam/30 frames per second (when a NTSC system is utilized)/188 (bytes). The scheduling of the multiplexing is determined on the basis of the loop iteration number N and the received respective data sizes.
• step S106 a determination is made by the CPU 424 as to whether the multiplexing plan indicates that a video stream is to be outputted. If such determination is affirmative, processing proceeds to step S107.
• the CPU 424 controls the switch circuit 36 such that header information is selected from input terminal a which, in turn, may be supplied from the RAM 426.
• step S108 the CPU 424 controls the switch circuit 34 to select the video stream (which may be obtained from terminal a of switch circuit 34) and controls the switch circuit 36 to select the data stream from the switch circuit 34 (which may be obtained from terminal b of switch circuit 36) so that the video stream is multiplexed to the transport stream. Processing then proceeds to step SllO.
• step S106 determines whether the multiplexing plan indicates that an audio stream is to be outputted. If such determination is affirmative, processing proceeds to step Sill.
• step Sill the CPU 424 controls the switch circuit 36 such that header information is selected from input terminal a which, in turn, may be supplied from the RAM 426.
• step S112 wherein the CPU 424 controls the switch circuit 34 to select the audio stream (which may be obtained from terminal b of switch circuit 34) and controls the switch circuit 36 to select the data stream from the switch circuit 34 (which may be obtained from terminal b of switch circuit 36) so that the audio stream is multiplexed to the transport stream.
• step S114 a determination is made by the CPU 424 as to whether the multiplexing plan (procedure) indicates that a subtitle stream is to be outputted from the subtitle encoder. If such determination is affirmative, processing proceeds to step 115.
• the CPU 424 controls the switch circuit 36 such that header information is selected from input terminal a which, in turn, may be supplied from the RAM 426.
• step S116 wherein the CPU 424 controls the switch circuit 34 to select the subtitle stream (which may be obtained from terminal c of switch circuit 34) and controls the switch circuit 36 to select the data stream from the switch circuit 34 (which may be obtained from terminal b of switch circuit 36) so that the subtitle stream is multiplexed to the transport stream. Processing then proceeds to step S118. If, on the other hand, the determination in step S114 is negative, processing proceeds to step Si18.
• step S118 a determination is made by the CPU 424 as to whether the multiplexing plan indicates that an additional or private data stream (header information) is to be outputted. If such determination is affirmative, processing proceeds to step S119.
• the CPU 424 controls the switch circuit 36 to select the additional data stream in order to multiplex the additional data stream (header information) to the transport stream. Processing then proceeds to step S120, wherein the CPU 424 controls the switch circuit 34, the switch circuit 36 and the RAM 430 to output the private data from the RAM 430, resulting in the multiplexing of the same to the transport stream. Thereafter, processing then proceeds to step S122.
• step S118 If, on the other hand, the determination in step S118 is negative, processing proceeds to step S122.
• information indicative of the size of the video data, audio data and/or additional data may be supplied to the CPU by way of a CPU or data bus; whereas the video data, audio data and/or additional data or elementary stream(s) thereof which may have a relatively large amount of data may not transported to the CPU over the CPU bus.
• the video data, audio data and/or additional data may be supplied through a number of switch circuits so as to form a transport or multiplexed stream.
• the likelihood of a bottleneck or bus neck occurring on the CPU bus is greatly reduced so that high-speed multiplexing of the elementary stream to a transport stream may be achieved.
• subtitle encoder 28 and the private data lines may both be utilized to supply information.
• subtitle information may be supplied through the subtitle encoder 28 and closed captioned may be supplied through the private data lines.
• subtitle information may be supplied through the private data lines and other information may be supplied through the subtitle encoder 28.
• either of the private data lines or the encoder 28 may be omitted depending upon the desired application or use.
• the prevent invention enables the type or number of additional data stream (header information) to be added to be readily changed as compared to the arrangement wherein an elementary stream is multiplexed to the transport stream using hardware.
• the data multiplexer of Fig. 2 was described has having a certain number of each type of elements, the present data multiplexer is not so limited and may have other numbers of such elements. For example, none or more than one ENIF circuit 420 or SIF circuit 422 may be utilized. Further, any number of elementary streams may be multiplexed to obtain a transport stream.
• the data multiplexer 2 may be modified so as to obtain a transport stream which may be desired for a particular application.
• the data multiplexer 2 may be modified so that a data stream associated with an editing process or a broadcasting process is multiplexed in place of the subtitle stream to obtain the transport stream.
• the present data multiplexer may enable audio data, video data and additional data to be multiplexed in a digital television broadcasting system or the like at a relatively high speed and may enable changes in the kind of additional data and in processing to be readily incorporated.

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• Engineering & Computer Science (AREA)
• Multimedia (AREA)
• Signal Processing (AREA)
• Television Systems (AREA)
• Compression Or Coding Systems Of Tv Signals (AREA)

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• 1997
  • 1997-03-18 KR KR1019970708305A patent/KR19990021831A/ko not_active Application Discontinuation
  • 1997-03-18 EP EP97918299A patent/EP0826289B1/en not_active Expired - Lifetime
  • 1997-03-18 WO PCT/IB1997/000543 patent/WO1997035435A1/en not_active Application Discontinuation
  • 1997-03-18 DE DE69716365T patent/DE69716365T2/de not_active Expired - Lifetime
  • 1997-10-07 US US08/954,881 patent/US6185229B1/en not_active Expired - Lifetime

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