Classifications

• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04J—MULTIPLEX COMMUNICATION
  • H04J3/00—Time-division multiplex systems
  • H04J3/02—Details
  • H04J3/14—Monitoring arrangements
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04J—MULTIPLEX COMMUNICATION
  • H04J3/00—Time-division multiplex systems
  • H04J3/02—Details
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03K—PULSE TECHNIQUE
  • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
  • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
  • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
  • H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
  • H03K17/62—Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors
  • H03K17/6257—Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors with several inputs only combined with selecting means
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04J—MULTIPLEX COMMUNICATION
  • H04J3/00—Time-division multiplex systems
  • H04J3/02—Details
  • H04J3/04—Distributors combined with modulators or demodulators
  • H04J3/047—Distributors with transistors or integrated circuits
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04J—MULTIPLEX COMMUNICATION
  • H04J3/00—Time-division multiplex systems
  • H04J3/02—Details
  • H04J3/10—Arrangements for reducing cross-talk between channels

Definitions

• the present invention relates to a multiplexer, a protection switch unit which includes one such multiplexer, a telecommunications network which includes one such protec ⁇ tion switch unit, and a multiplexing related method. More specifically, the invention relates to the aforesaid devices and method in respect of single or differential multiplexing signals and preferably of the CMI type, at transmission speeds above about 100 Mbit/s and preferably in the range of about 140-155 Mb/s.
• the pulse shape of the output signal is often required to be the same as the pulse form of the input signal and the level of the output signal required to be the same as it would have been if the signal had not passed through the multiplexer. Problems with mismatching between components and conductors can easily occur in such multiplexers at such high transmission speeds, therewith greatly impairing signal quality.
• US-A 5,146,113 describes an integrated circuit having several narrow, circuit-board mounted elongated resistance strips to provide a board-mounted circuit with a predetermined input and/or output impedance.
• US-A 5,281,934 describes a microwave multiplexer which is entirely of microstrip construction.
• Still another object of the present invention is to provide a multiplexer, a protection switch unit including one such multiplexer, and a telecommunications network which includes one such protection switch unit, where good signal quality is obtained in a simple and inexpensive manner when selecting an output signal from a plurality of input signals.
• Yet a further object of the invention is to provide a multiplexer, a protection switch unit which includes one such multiplexer, and a telecommunications network which includes one such protection switch unit wherein distortion in output signals from the multiplexer can be readily reduced in later stages.
• Fig. 1 is a block schematic of an inventive telecommunications system
• Fig. 2 is a circuit diagram of an inventive multiplexer
• Fig. 2 illustrates an embodiment of an inventive multiplexer, wherein only two inputs are shown for the sake of simplicity, although it will be understood that the multiplexer will normally have sixteen inputs.
• a first of the inputs has a first and a second connection point IN1+ and IN1-.
• the first connection point IN1+ of the first input is connected to a first signal forwarding conductor device Q2 via a resistor R2, said device Q2 being an RF transistor in the illustrated case.
• the resistor R2 is connected to the emitter of the transistor Q2 in the illustrated case.
• the base of the transistor Q2 is connected via a resistor R9 to a voltage source VBB which has an internal impedance such that the base is earthed with respect to the signal delivered to the connection point IN1+.
• the collector of the transistor Q2 is connected via a resistor R41 to a transmission line or conductor TLINE_1 provided in a multiplexer circuit board.
• the transmission line TLINE_1 is terminated at both ends with a respective resistor R12 and R44, which in turn are connected to a voltage source VCC.
• the voltage source VCC may have the same voltage as the voltage source VBB.
• Q4 are connected to the voltage source VBB via a respective resistor R8 and R10.
• Respective emitters of the transistors Q1 and Q4 are connected to a second externally controlled switch S1 via respective resistors R30 and R32 in exactly the same way as with the first input, said switch S1 also being connected to earth similar to the switch
• the transistors 0.1, Q2, Q3 and Q4 and associated components are so placed along the transmission lines TLINE_1 and TLINE_2 that mismatches and reflections will be minimal. In reality, further inputs are correspondingly placed along said transmission lines TLINE_1 and, TLINE_2.
• each of the transmission lines TLINE_1 and TLINE_2 has the form of a microstrip included in the board circuitry and to which the transistors are connected.
• These microstrips are preferably rectilinear, have identical lengths and are essentially of unitary width.
• An important feature of this embodiment, however, is that the two transistors at each input have equally long paths to the connection points +1 and -I in the input of the amplifier D_AMP.
• the transmission lines TLINE_1 and TLINE_2 may optionally be slightly narrower at those points where the transistors are connected, so as to match the impedance of a microstrip to the additional capacitance that is supplied by a passive transistor.
• the multiplexer illustrated in Fig. 2 functions with differential signals, which results in less distortion in the signals leaving the multiplexer.
• the multiplexer operates as follows: Two input signals are received on a respective input IN1+, IN1- and IN2+ IN2- (only two inputs are shown for the first circuit, although in reality sixteen input signals are normally received via sixteen inputs. Other numbers of signals may be received however, such as four or eight for instance.)
• One of the inputs is activated by the first externally controlled switch S2, which activates the transistors Q2 and Q3 connected to the input when said input is closed.
• the second input is passive, i.e. the second switch S1 is off.
• the switches may comprise any one of a number of different designs known to the person skilled in this art, and may have the form of transistors for instance.
• the switches S1 and S2 are controlled by a control circuit arranged in the protection switch unit and functioning to close a switch depending on which of the aforesaid terminal access units is inoperative. This switching function may also be accomplished directly from the aforesaid exchange.
• the transistors Q2 and Q3 are biassed and the input signal is forwarded through the transistors Q2 and Q3 to the transmission lines TLINE_1 and TLINE_2.
• the signal propagates in both directions on the transmission lines TLINE_1 and TLINE_2 and one half of the signal, which has essentially one half of the amplitude of the input signal, is received in the amplifier D_AMP.
• this amplifier could equally as well be placed in the other end of the transmission lines TLINE_1 and TLINE_2. Because of the terminating resistors R7, R12, R44 and R55, mismatching at the active input connection points to the transmission lines TLINE_1 and TLINE_2 will not result in reflections.
• the amplifier D_AMP then amplifies the signal such that the output signal will obtain the same signal level as the input signal. Amplification of the amplifier D_AMP can also be adapted to take into account losses in cables and electrical contacts.
• the earthed base stages in the transistors Q2 and Q3 in the active input give a precise terminating impedance, since this is determined in the most part by the emitter series resistance when the biassing current is sufficiently high. This gives good termination of incoming signals and therewith prevents reflections.
• the collector output impedance will be high in relation to the load to be driven, in other words the transmission line. Any variation that may occur in the collector impedance will have very little affect on signal quality and the level of the output signal.
• each connection point in each input is connected to a respective base via a respective resistor and to the voltage source VBB via a respec ⁇ tive resistor.
• the emitters of the transistors at respective inputs must be mutually connected by further resistors.
• the transistors are replaced with PIN- diodes D2, D1, D4 and D3, each of which has its cathode connected to a respective connection point IN1+, IN2+, IN1- and IN2- in the input via a respective resistor R2, R1 , R4 and R3, while the anodes of said diodes are connected directly to a respective transmission line TLINE_1 and TLINE_2.
• This circuit lacks the voltage source VBB and the resistors connected between said voltage source and respective transistor bases in the Fig. 2 embodiment.
• resistors R31, R30, R33 and R32 connected between the switches S1 , S2 and the connection points are replaced with impedances Z31 , Z30, Z33 and Z32.
• the terminating impedance is determined in an active input, for instance the first input of the series resistors R2 and R4, the impedances Z31, Z33 and the series resistance in the diodes D2 and D4 and all following transmission lines with terminations.
• the impedances may be in the form of just a resistor or as a resistor in series with an inductor. Resistors in series with an inductor give a high impedance, which means that all current to the diodes D1, D2, D3 and D4 will also go out to the transmission lines TLINE_1 and TLINE_2.

Landscapes

• Engineering & Computer Science (AREA)
• Computer Networks & Wireless Communication (AREA)
• Signal Processing (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
• Time-Division Multiplex Systems (AREA)
• Amplifiers (AREA)
• Electronic Switches (AREA)

Priority Applications (3)

Applications Claiming Priority (2)

Publications (1)

Family

ID=20398485

Family Applications (1)

Country Status (8)

Citations (5)

• 1995
  • 1995-06-01 SE SE9502011A patent/SE504521C2/sv not_active IP Right Cessation
• 1996
  • 1996-05-22 JP JP8535992A patent/JPH11507479A/ja active Pending
  • 1996-05-22 EP EP96917756A patent/EP0872055A1/en not_active Withdrawn
  • 1996-05-22 WO PCT/SE1996/000658 patent/WO1996038939A1/en not_active Application Discontinuation
  • 1996-05-22 AU AU60194/96A patent/AU705474B2/en not_active Ceased
  • 1996-05-22 CN CN96194247A patent/CN1185877A/zh active Pending
  • 1996-05-22 CA CA002220966A patent/CA2220966A1/en not_active Abandoned
  • 1996-05-22 KR KR1019970708504A patent/KR19990022025A/ko not_active Application Discontinuation

Patent Citations (5)

Non-Patent Citations (1)

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