WO1996021188A1 - Bus arrangement related to a magazine - Google Patents

Bus arrangement related to a magazine Download PDF

Info

Publication number
WO1996021188A1
WO1996021188A1 PCT/SE1995/001499 SE9501499W WO9621188A1 WO 1996021188 A1 WO1996021188 A1 WO 1996021188A1 SE 9501499 W SE9501499 W SE 9501499W WO 9621188 A1 WO9621188 A1 WO 9621188A1
Authority
WO
WIPO (PCT)
Prior art keywords
bus
conductors
error
circuit
arrangement according
Prior art date
Application number
PCT/SE1995/001499
Other languages
English (en)
French (fr)
Inventor
Krzysztof Kaminski
Original Assignee
Telefonaktiebolaget Lm Ericsson (Publ)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget Lm Ericsson (Publ) filed Critical Telefonaktiebolaget Lm Ericsson (Publ)
Priority to EP95942334A priority Critical patent/EP0800675B1/en
Priority to AU43584/96A priority patent/AU4358496A/en
Priority to KR1019970704457A priority patent/KR100295504B1/ko
Priority to US08/849,754 priority patent/US6006341A/en
Priority to JP8520890A priority patent/JPH10510077A/ja
Priority to DE69530794T priority patent/DE69530794D1/de
Publication of WO1996021188A1 publication Critical patent/WO1996021188A1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2007—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/409—Mechanical coupling
PCT/SE1995/001499 1994-12-29 1995-12-12 Bus arrangement related to a magazine WO1996021188A1 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
EP95942334A EP0800675B1 (en) 1994-12-29 1995-12-12 Bus arrangement related to a magazine
AU43584/96A AU4358496A (en) 1994-12-29 1995-12-12 Bus arrangement related to a magazine
KR1019970704457A KR100295504B1 (ko) 1994-12-29 1995-12-12 매거진에 결합된 버스장치
US08/849,754 US6006341A (en) 1994-12-29 1995-12-12 Bus arrangement related to a magazine
JP8520890A JPH10510077A (ja) 1994-12-29 1995-12-12 マガジン関連バス構成
DE69530794T DE69530794D1 (de) 1994-12-29 1995-12-12 Busvorrichtung für ein magazin

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE9404556-4 1994-12-29
SE9404556A SE517194C2 (sv) 1994-12-29 1994-12-29 Magasinrelaterat bussarrangemang

Publications (1)

Publication Number Publication Date
WO1996021188A1 true WO1996021188A1 (en) 1996-07-11

Family

ID=20396511

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/SE1995/001499 WO1996021188A1 (en) 1994-12-29 1995-12-12 Bus arrangement related to a magazine

Country Status (8)

Country Link
US (1) US6006341A (sv)
EP (1) EP0800675B1 (sv)
JP (1) JPH10510077A (sv)
KR (1) KR100295504B1 (sv)
AU (1) AU4358496A (sv)
DE (1) DE69530794D1 (sv)
SE (1) SE517194C2 (sv)
WO (1) WO1996021188A1 (sv)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0886219A2 (en) * 1997-06-16 1998-12-23 Compaq Computer Corporation Computer server system having i/o board with cable-free redundant adapter cards thereon
EP1622020A3 (en) * 2004-07-30 2008-09-10 International Business Machines Corporation Segment level interconnect replacement in a memory subsystem
US7765368B2 (en) 2004-07-30 2010-07-27 International Business Machines Corporation System, method and storage medium for providing a serialized memory interface with a bus repeater

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6795885B1 (en) 2001-06-21 2004-09-21 Hewlett-Packard Development Company, L.P. Electronic device backplane interconnect method and apparatus
US7141893B2 (en) * 2005-03-30 2006-11-28 Motorola, Inc. Highly available power distribution system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4420793A (en) * 1980-09-29 1983-12-13 Asea Aktiebolag Electrical equipment
WO1994003901A1 (en) * 1992-08-10 1994-02-17 Monolithic System Technology, Inc. Fault-tolerant, high-speed bus system and bus interface for wafer-scale integration

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE422386B (sv) * 1979-12-18 1982-03-01 Ericsson Telefon Ab L M Lasanordning for kopplingsdon
US4412281A (en) * 1980-07-11 1983-10-25 Raytheon Company Distributed signal processing system
DE3119458A1 (de) * 1981-05-15 1982-12-02 Siemens AG, 1000 Berlin und 8000 München Mehrrechnersystem
US4597084A (en) * 1981-10-01 1986-06-24 Stratus Computer, Inc. Computer memory apparatus
JPH0812621B2 (ja) * 1981-10-01 1996-02-07 ストレイタス・コンピュータ・インコーポレイテッド 情報転送方法及び装置
US4931922A (en) * 1981-10-01 1990-06-05 Stratus Computer, Inc. Method and apparatus for monitoring peripheral device communications
US4453215A (en) * 1981-10-01 1984-06-05 Stratus Computer, Inc. Central processing apparatus for fault-tolerant computing
US4658333A (en) * 1985-11-08 1987-04-14 At&T Information Systems Inc. Variable length backplane bus
DE8710629U1 (sv) * 1987-08-03 1988-09-01 Siemens Ag, 1000 Berlin Und 8000 Muenchen, De
US5006961A (en) * 1988-04-25 1991-04-09 Catene Systems Corporation Segmented backplane for multiple microprocessing modules
US5065314A (en) * 1988-09-23 1991-11-12 Allen-Bradley Company, Inc. Method and circuit for automatically communicating in two modes through a backplane
ES2013512A6 (es) * 1989-06-05 1990-05-01 Gabas Cebollero Carlos Grupo especular protegido para viseras parasol de vehiculos automoviles.
US5122691A (en) * 1990-11-21 1992-06-16 Balu Balakrishnan Integrated backplane interconnection architecture
US5247522A (en) * 1990-11-27 1993-09-21 Digital Equipment Corporation Fault tolerant bus
JPH04302333A (ja) * 1991-03-29 1992-10-26 Yokogawa Electric Corp データ処理装置
WO1993003439A1 (en) * 1991-07-26 1993-02-18 Tandem Computers Incorporated Apparatus and method for frame switching
US5430663A (en) * 1992-12-11 1995-07-04 Vibrametrics, Inc. Fault tolerant multipoint data collection system
US5600786A (en) * 1993-07-30 1997-02-04 Honeywell Inc. FIFO fail-safe bus
US5450425A (en) * 1993-11-19 1995-09-12 Multi-Tech Systems, Inc. Protocol for communication of a data packet
US5664221A (en) * 1995-11-14 1997-09-02 Digital Equipment Corporation System for reconfiguring addresses of SCSI devices via a device address bus independent of the SCSI bus

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4420793A (en) * 1980-09-29 1983-12-13 Asea Aktiebolag Electrical equipment
WO1994003901A1 (en) * 1992-08-10 1994-02-17 Monolithic System Technology, Inc. Fault-tolerant, high-speed bus system and bus interface for wafer-scale integration

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
IBM TECHNICAL DISCLOSURE BULLETIN, Novel Bus Reconfiguration Scheme with Spare Lines, Vol. 29, No. 12, May 1987, pages 5590-5593. *
PATENT ABSTRACTS OF JAPAN, Vol. 17, No. 116, P-1499; & JP,A,04 302 333, (YOKOGAWA ELECTRIC CORP), 26 October 1992. *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0886219A2 (en) * 1997-06-16 1998-12-23 Compaq Computer Corporation Computer server system having i/o board with cable-free redundant adapter cards thereon
EP0886219A3 (en) * 1997-06-16 1999-12-15 Compaq Computer Corporation Computer server system having i/o board with cable-free redundant adapter cards thereon
EP1622020A3 (en) * 2004-07-30 2008-09-10 International Business Machines Corporation Segment level interconnect replacement in a memory subsystem
US7765368B2 (en) 2004-07-30 2010-07-27 International Business Machines Corporation System, method and storage medium for providing a serialized memory interface with a bus repeater

Also Published As

Publication number Publication date
DE69530794D1 (de) 2003-06-18
EP0800675A1 (en) 1997-10-15
KR100295504B1 (ko) 2001-09-17
AU4358496A (en) 1996-07-24
SE517194C2 (sv) 2002-05-07
US6006341A (en) 1999-12-21
JPH10510077A (ja) 1998-09-29
SE9404556D0 (sv) 1994-12-29
SE9404556L (sv) 1996-06-30
EP0800675B1 (en) 2003-05-14

Similar Documents

Publication Publication Date Title
EP0147046B1 (en) Fault-tolerant communications controlller system
CA2006489C (en) Distributed switching architecture for communication module redundancy
EP2085839B1 (en) Apparatus for unidirectionally interconnecting modules
US6571355B1 (en) Fibre channel data storage system fail-over mechanism
US6275881B1 (en) Device for inherently safe signal matching
EP0120384A2 (en) Self-checking computer circuitry
US20030012528A1 (en) Method and apparatus for transmitting fibre-channel and non-fibre channel signals through a common cable
US4819205A (en) Memory system having memory elements independently defined as being on-line or off-line
WO2005109220A2 (en) Network with programmable interconnect nodes adapted to large integrated circuits
US7073088B2 (en) Data bus arrangement and control method for efficiently compensating for faulty signal lines
US6006341A (en) Bus arrangement related to a magazine
EP0299677B1 (en) Redundancy circuitry
JP3588936B2 (ja) フレキシブル高速多重化リモート入出力システム
US20040078620A1 (en) Equipment protection using a partial star architecture
CN100437814C (zh) 具有内建错误纠正能力的存储器元件
US6615315B1 (en) Fibre channel data storage system having improved fro-end I/O adapted hub
Rennels et al. A fault-tolerant embedded microcontroller testbed
KR980013469A (ko) 전전자 교환기에서의 프로세서간 통신 장치
JPH08509585A (ja) 電気及びデータ通信システム
KR20000040686A (ko) Lan 선로의 이중화 시스템
US7111081B2 (en) Storage device having plural disk units and plural disk control units connected by control signal transmission cables that carry different control signals
KR0153942B1 (ko) 에이티엠 셀 데이타 전송 링크 이중화 장치
Silva et al. Dynamic topology management in CAN
CN115542848A (zh) 用于模块化过程控制系统的输入/输出设备的接线盒单元
SU1084802A1 (ru) Резервированна система

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AL AM AT AU BB BG BR BY CA CH CN CZ DE DK EE ES FI GB GE HU IS JP KE KG KP KR KZ LK LR LS LT LU LV MD MG MK MN MW MX NO NZ PL PT RO RU SD SE SG SI SK TJ TM TT UA UG US UZ VN

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): KE LS MW SD SZ UG AT BE CH DE DK ES FR GB GR IE IT LU MC NL PT SE BF BJ CF CG CI CM GA GN ML MR NE SN TD TG

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 1995942334

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 08849754

Country of ref document: US

WWE Wipo information: entry into national phase

Ref document number: 1019970704457

Country of ref document: KR

WWP Wipo information: published in national office

Ref document number: 1995942334

Country of ref document: EP

REG Reference to national code

Ref country code: DE

Ref legal event code: 8642

WWP Wipo information: published in national office

Ref document number: 1019970704457

Country of ref document: KR

WWG Wipo information: grant in national office

Ref document number: 1019970704457

Country of ref document: KR

WWG Wipo information: grant in national office

Ref document number: 1995942334

Country of ref document: EP