WO1995033285A1 - Silicon thin film on glass substrate - Google Patents

Silicon thin film on glass substrate Download PDF

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Publication number
WO1995033285A1
WO1995033285A1 PCT/EP1995/002059 EP9502059W WO9533285A1 WO 1995033285 A1 WO1995033285 A1 WO 1995033285A1 EP 9502059 W EP9502059 W EP 9502059W WO 9533285 A1 WO9533285 A1 WO 9533285A1
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Prior art keywords
layer
intermediate layer
semiconductor device
semiconductor
substrate
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Application number
PCT/EP1995/002059
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German (de)
French (fr)
Inventor
Jürgen Werner
Ralf Bergmann
Original Assignee
MAX-PLANCK-Gesellschaft zur Förderung der Wissenschaften e.V.
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Publication of WO1995033285A1 publication Critical patent/WO1995033285A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0392—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate
    • H01L31/03921—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate including only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • H01L31/182—Special manufacturing methods for polycrystalline Si, e.g. Si ribbon, poly Si ingots, thin films of polycrystalline Si
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/546—Polycrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the invention relates to a semiconductor device according to the preamble of claim 1 and a method for its production.
  • photovoltaics on a larger scale presupposes that photocells, in particular solar cells, on the one hand achieve high efficiency with regard to the conversion of light energy into electrical energy and on the other hand can be manufactured at low production costs.
  • the semiconductor material to be used as a photoconductor can be deposited in the form of a thin layer on a carrier material (substrate) in order to save material.
  • Thin-film silicon solar cells using amorphous or polycrystalline silicon still seem very promising for the application.
  • the high absorption of light with more than 1.6 eV photon energy makes it possible to work with layer thicknesses in the ym range, while in the case of polycrystalline silicon, because of the low absorption of light in the visible spectral range as a result of the indirect Tape structure layer thicknesses in the order of 20-50 ym must be selected.
  • polycrystalline silicon shows no signs of degradation compared to amorphous, hydrogen-doped silicon (light-induced degradation; Stäbler-Wronski effect).
  • the cheapest possible substrate must be chosen.
  • Si When Si is deposited from metallic solutions, silicon crystallizes with grain sizes of more than 100 ⁇ m; however, the layers obtained in this way have not been suitable for the production of components due to the presence of metallic inclusions or an unsuitable surface morphology. Si layers which have been produced on glass by means of solid-phase crystallization are generally closed and sufficiently planar for the production of diode structures, but only have grain sizes of at most 5 ⁇ m.
  • the invention specifies a semiconductor device and a method for its production, in which an intermediate layer is first deposited on an inexpensive substrate.
  • the material of this intermediate layer is now selected such that the intermediate layer can serve as a nucleation layer for the semiconductor layer to be deposited on it.
  • This is achieved in that the material of the nucleation layer is lattice-matched to the material of the semiconductor layer.
  • the semiconductor layer is then heteroepitaxially deposited on the nucleation layer.
  • the lattice match can be chosen such that the lattice constants of the intermediate layer and the semiconductor layer essentially match.
  • the lattice constants of the two layers are in a specific integer relationship to one another.
  • the material of the nucleation layer can be an insulator, a semiconductor or a metal, it being possible for both element materials and compounds composed of two or more elements to be used.
  • the intermediate layer is electrically conductive, it can advantageously also be used as an electrode for an electronic component.
  • FIG. 1 shows a schematic, sectional basic illustration of a silicon thin-film solar cell according to an embodiment of the invention
  • Fig. 2 shows the course of the electronic
  • the silicon thin-film solar cell shown in FIG. 1 contains a glass substrate 1, in the present embodiment made of float glass or normal glass, on which an intermediate or nucleation layer 2 adapted to the silicon lattice is first deposited.
  • the nucleation layer 2 contains a lattice-adapted silicide, such as FeSi_ in the modification of the ⁇ -FeSi ".
  • layer 2 serves both as a nucleation layer for the semiconductor material silicon to be grown thereon and also as an electrode for a component to be manufactured owing to the electrical conductivity of ⁇ -FeSi.
  • the silicide can be deposited at low temperatures ( ⁇ 600 ° C., preferably approx. 500 °) and spontaneously forms relatively large grains when suitably tempered.
  • other nucleation layers matched to silicon such as NiSi ", CoSi 2 , CaSi", ErSi ? “GdSi”, YSi "or other lattice-adapted suicides can be used.
  • ß-FeSi a polycrystalline layer is deposited with a thickness of approximately 0.5 ⁇ m, which has a maximum grain size of 30 ⁇ m with Si-rich deposition.
  • the ⁇ -FeSi 2 layer can be produced in a known manner by siliconizing an iron layer, an iron-containing layer or a stainless steel base as a substrate.
  • the silicide can also be produced in that the silicon and the corresponding metal are co-evaporated and precipitate together on the substrate, advantageously also a • subsequent annealing process is performed at about 500 ° C. Sputtering on the silicide layer is also conceivable.
  • a metal that is lattice-matched to the semiconductor material used can also be used.
  • silicon for example, as element metals such.
  • silicon however, compounds such as TiAl 3 NbAl 3 or Zr 4 Al 3 are also conceivable.
  • the intermediate layer can also be an insulator, for example an oxide such as zirconium oxide in its various modifications, or else a nitride.
  • the lattice match can be chosen such that the lattice constants of the intermediate layer 2 and the semiconductor layer 3 essentially match, as in the case of ⁇ -FeSi "on Si.
  • the lattice adaptation can also be such that the lattice constants are in an integer ratio to one another. This also enables the semiconductor material to grow. This case is e.g. given for silicon on aluminum or silver, the lattice constants being in a ratio of 4: 3 to each other.
  • a heavily p-doped (p) silicon layer 3a serving as a back surface field is first deposited epitaxially on the ⁇ -FeSi.
  • This deposition can be carried out, for example, by liquid phase epitaxy from a gallium solution at a temperature of approximately 450 °.
  • other low-temperature deposition methods are also conceivable, such as (plasma-assisted) CVD (Chemical Vapor Deposition) or ion beam-assisted or ion-assisted deposition at temperatures from 200 to 600 °.
  • the photovoltaically active p-doped Si layer 3b is then deposited on the p -silicon layer with a thickness of preferably 20-50 ⁇ m in a homo-epitaxial manner.
  • This deposition can also be carried out by liquid phase epitaxy, for example from a zinc solution or from other suitable solvents. However, the methods described above for the deposition of the p layer for the deposition of the layer 3b can also be used.
  • An n-Si layer 3c is then applied to the silicon layer 3b, which can also be done by liquid-phase epitaxy or one of the other methods mentioned. 2 shows the course of the energy bands and the position of the Fermi level E “resulting from the structure of FIG.
  • the advantage of using a back-surface layer is that minority carriers remain in the lightly doped p-layer 3b, so that the probability of recombination on the back of the solar cell structure is reduced.
  • the solar cell structure can also be deposited on the intermediate layer 2 in the order n, n, p.
  • the invention is not limited to the production of solar cell structures and the use of glass as a substrate material of relatively low temperature resistance (substantially below 1000 ° C., for example below 800 ° C. or below 600 ° C.), but is also suitable for the production other electronic components such as photo diodes, transistors etc.
  • Another attractive area of application is also the production of control elements, such as thin film transistors, for flat screens.
  • a silicon-germanium alloy, in particular GeSi, can also advantageously be used as the semiconductor material.

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Abstract

An intermediate layer (2) is deposited on a substrate (1) and a semiconductor layer (3) is grown on the intermediate layer. The intermediate layer (2) is lattice-matched with the semiconductor layer (3) and thus acts as a nucleation layer. The intermediate layer (2) can advantageously be formed from a silicide and can thus also, owing to its electrical conductivity, be used as an electrode, for example in a solar cell structure.

Description

Silizium-Dünnschicht auf Glassubstrat Silicon thin film on glass substrate
Die Erfindung betrifft eine Halbleitereinrichtung gemäß dem Oberbegriff des Anspruchs 1 und ein Verfahren zu ihrer Herstellung.The invention relates to a semiconductor device according to the preamble of claim 1 and a method for its production.
Eine Anwendung der Photovoltai in größerem Umfang setzt voraus, daß Photozellen, insbesondere Solarzellen, einer¬ seits einen hohen Wirkungsgrad hinsichtlich der Umwandlung von Lichtenergie in elektrische Energie erzielen und andererseits bei niedrigen Herstellungskosten gefertigt werden können. Um die Herstellungskosten niedrig zu halten, kann z. B. das als Photoleiter zu verwendende Halbleiter¬ material aus Gründen der Materialersparnis in Form einer dünnen Schicht auf einem Trägermaterial (Substrat) abge¬ schieden werden. Für die Anwendung sehr aussichtsreich erscheinen nach wie vor Dünnschicht-Silizium-Solarzellen unter Verwendung von amorphem oder polykristallinem Silizium.The use of photovoltaics on a larger scale presupposes that photocells, in particular solar cells, on the one hand achieve high efficiency with regard to the conversion of light energy into electrical energy and on the other hand can be manufactured at low production costs. In order to keep the manufacturing costs low, e.g. For example, the semiconductor material to be used as a photoconductor can be deposited in the form of a thin layer on a carrier material (substrate) in order to save material. Thin-film silicon solar cells using amorphous or polycrystalline silicon still seem very promising for the application.
Bei Verwendung von amorphem Silizium kommt man aufgrund der hohen Absorption von Licht mit mehr als 1,6 eV-Photonen- energie mit Schichtdicken im ym-Bereich aus, während bei polykristallinem Silizium aufgrund der niedrigen Absorption von Licht im sichtbaren Spektralbereich infolge der in¬ direkten Bandstruktur Schichtdicken in der Größenordnung von 20-50 ym gewählt werden müssen. Polykristallines Silizium weist dagegen im Vergleich zu amorphem, Wasserstoffdotiertem Silizium (lichtinduzierte Degradation; Stäbler-Wronski- Effekt) keinerlei Degradationserscheinungen auf. Als weitere Maßnahme, um die Herstellungskosten niedrig zu halten, muß ein möglichst billiges Substrat gewählt werden. Bezüglich der Verwendung von polykristallinem Silizium als photovoltaisch aktive Schicht konzentrieren sich die meisten Forschungsanstrengungen zur Zeit darauf, die Silizium-Schich¬ ten auf hochtemperaturbeständigen Substraten, wie Graphit und Keramiken abzuscheiden. Eine ebenfalls sehr preiswerte und attraktive Variante ist die Abscheidung auf Glassub¬ straten. Hierbei muß die Prozeßtemperatur im allgemeinen auf maximal 600°C beschränkt werden. Für die Fertigung einer Solarzelle wird gewöhnlich zunächst auf dem Glassubstrat eine elektrisch leitfähige Schicht abgeschieden werden. Diese kann z.B. eine dünne, lichtdurchlässige Schicht sein, so daß das Substrat als Vorderseite der Solarzelle verwendet werden kann. Bei der Abscheidung der Silizium-Schicht direkt auf dem Glassubstrat wurden im Stand der Technik vor allem die Lösungszüchtung und die Festphasenkristallisation unter¬ sucht. Beide Verfahren sind jedoch mit Nachteilen behaftet. Bei der Si-Abscheidung aus metallischen Lösungen kristal¬ lisiert Silizium zwar mit Korngrößen von über 100 ym; die so gewonnenen Schichten waren aber wegen dem Vorhandensein von metallischen Einschlüssen oder einer ungeeigneten Ober¬ flächenmorphologie bis heute nicht zur Herstellung von Bauelementen geeignet. Si-Schichten, die mittels Fest¬ phasenkristallisation auf Glas hergestellt wurden, sind im allgemeinen geschlossen und hinreichend planar zur Her¬ stellung von Diodenstrukturen, haben aber nur Korngrößen von maximal 5 ym.When using amorphous silicon, the high absorption of light with more than 1.6 eV photon energy makes it possible to work with layer thicknesses in the ym range, while in the case of polycrystalline silicon, because of the low absorption of light in the visible spectral range as a result of the indirect Tape structure layer thicknesses in the order of 20-50 ym must be selected. In contrast, polycrystalline silicon shows no signs of degradation compared to amorphous, hydrogen-doped silicon (light-induced degradation; Stäbler-Wronski effect). As a further measure to keep the manufacturing costs low, the cheapest possible substrate must be chosen. With regard to the use of polycrystalline silicon as a photovoltaically active layer, most research efforts are currently focused on depositing the silicon layers on high-temperature-resistant substrates such as graphite and ceramics. Another very inexpensive and attractive variant is deposition on glass substrates. The process temperature must generally be limited to a maximum of 600 ° C. For the manufacture of a solar cell, an electrically conductive layer is usually first deposited on the glass substrate. This can be, for example, a thin, translucent layer, so that the substrate can be used as the front of the solar cell. When the silicon layer was deposited directly on the glass substrate, the prior art primarily examined solution growth and solid-phase crystallization. However, both methods have disadvantages. When Si is deposited from metallic solutions, silicon crystallizes with grain sizes of more than 100 μm; however, the layers obtained in this way have not been suitable for the production of components due to the presence of metallic inclusions or an unsuitable surface morphology. Si layers which have been produced on glass by means of solid-phase crystallization are generally closed and sufficiently planar for the production of diode structures, but only have grain sizes of at most 5 μm.
Es ist daher Aufgabe der vorliegenden Erfindung, bei einer Halbleitereinrichtung, die ein preiswertes Substrat, dessen Temperaturbeständigkeit deutlich unter 1000°C liegt, und eine darauf aufgebrachte Schicht eines Halbleitermaterials enthält, die Qualität des Halbleitermaterials zu verbessern.It is therefore an object of the present invention to improve the quality of the semiconductor material in a semiconductor device which contains an inexpensive substrate, the temperature resistance of which is well below 1000 ° C., and a layer of semiconductor material applied thereon.
Diese Aufgabe wird durch die in den Ansprüchen gekennzeich¬ nete und im folgenden näher erläuterte Erfindung gelöst. Die Erfindung gibt eine Halbleitereinrichtung und ein Verfahren zu ihrer Herstellung an, bei dem zunächst auf einem preiswerten Substrat eine Zwischenschicht abgeschieden wird. Das Material dieser Zwischenschicht wird nun derart gewählt, daß die Zwischenschicht als Nukleationsschicht für die auf ihr abzuscheidende Halbleiterschicht dienen kann. Dies wird dadurch erreicht, daß das Material der Nukleations¬ schicht an das Material der Halbleiterschicht gitterangepaßt ist. Auf die Nukleationsschicht wird dann heteroepitaktisch die Halbleiterschicht abgeschieden. Die Gitteranpassung kann derart gewählt werden, daß die Gitterkonstanten von Zwischen¬ schicht und Halbleiterschicht im wesentlichen übereinstimmen. Sie kann aber auch derart gewählt werden, daß die Gitter¬ konstanten beider Schichten in einem bestimmten ganzzahligen Verhältnis zueinander stehen. Das Material der Nukleations¬ schicht kann ein Isolator, ein Halbleiter oder ein Metall sein, wobei sowohl Elementmaterialien als auch Verbindungen aus zwei oder mehr Elementen verwendet werden können. In dem Fall, daß die Zwischenschicht elektrisch leitfähig ist, kann sie in vorteilhafter Weise zusätzlich als Elektrode für ein elektronisches Bauelement verwendet werden.This object is achieved by the invention characterized in the claims and explained in more detail below. The invention specifies a semiconductor device and a method for its production, in which an intermediate layer is first deposited on an inexpensive substrate. The material of this intermediate layer is now selected such that the intermediate layer can serve as a nucleation layer for the semiconductor layer to be deposited on it. This is achieved in that the material of the nucleation layer is lattice-matched to the material of the semiconductor layer. The semiconductor layer is then heteroepitaxially deposited on the nucleation layer. The lattice match can be chosen such that the lattice constants of the intermediate layer and the semiconductor layer essentially match. However, it can also be chosen in such a way that the lattice constants of the two layers are in a specific integer relationship to one another. The material of the nucleation layer can be an insulator, a semiconductor or a metal, it being possible for both element materials and compounds composed of two or more elements to be used. In the event that the intermediate layer is electrically conductive, it can advantageously also be used as an electrode for an electronic component.
Im folgenden wird die Erfindung am Beispiel von Dünnschicht— Solarzellen, die ein besonders vorteilhaftes, jedoch keines¬ wegs ausschließliches Anwendungsgebiet der Erfindung darstellen, unter Bezugnahme auf die Zeichnungen näher erläutert. Dabei werden noch weitere Merkmale und Vorteile der Erfindung zur Sprache kommen. Es zeigen:The invention is explained in more detail below using the example of thin-film solar cells, which represent a particularly advantageous, but by no means exclusive, field of application of the invention, with reference to the drawings. Further features and advantages of the invention will also be discussed. Show it:
Fig. 1 eine schematische, geschnittene Prinzipdarstellung einer Silizium-Dünnschicht-Solarzelle gemäß einer Ausführungsform der Erfindung;1 shows a schematic, sectional basic illustration of a silicon thin-film solar cell according to an embodiment of the invention;
Fig. 2 eine Darstellung des Verlaufs der elektronischenFig. 2 shows the course of the electronic
Bänder in einer Silizium-Dünnschicht-Solarzelle gemäß Fig. 1. Die in Fig. 1 dargestellte Silizium-Dünnschicht-Solarzelle enthält ein Glassubstrat 1, bei dem vorliegenden Ausführungs¬ beispiel aus Floatglas oder Normalglas, auf dem zunächst eine an Silizium gitterangepaßte Zwischen- oder Nukleations¬ schicht 2 abgeschieden wird. In einer besonders vorteil¬ haften Ausführungsform enthält die Nukleationsschicht 2 ein gitterangepaßtes Silizid, wie z.B. FeSi_ in der Modifikation des ß-FeSi„. In diesem Fall dient die Schicht 2 sowohl als Nukleationsschicht für das darauf aufzuwachsende Halbleiter¬ material Silizium, als auch als Elektrode für ein zu fertigendes Bauelement infolge der elektrischen Leitfähigkeit von ß-FeSi„. Das Silizid kann bei niedrigen Temperaturen (<600°C, vorzugsweise ca. 500°) abgeschieden werden und bildet bei geeigneter Temperung spontan relativ große Körner. Es können jedoch auch andere an Silizium gitter¬ angepaßte Nukleationsschichten, wie z.B. NiSi„, CoSi2, CaSi„, ErSi?, GdSi«, YSi„ oder andere gitterangepaßte Suizide verwendet werden. Bei Verwendung von ß-FeSi„ wird eine polykristalline Schicht mit einer Dicke von ca. 0,5 ym abgeschieden, die bei Si-reicher Abscheidung eine Korngröße von maximal 30 ym aufweist. Die ß-FeSi2-Schicht kann in bekannter Weise durch Silizierung einer Eisenschicht, einer eisenenthaltenden Schicht oder einer Edelstahlunterlage als Substrat erzeugt werden. Die Silizidschicht kann aber auch dadurch erzeugt werden, daß Silizium und das entsprechende Metall co-verdampft werden und sich gemeinsam auf dem Substrat niederschlagen, wobei vorteilhafterweise noch ein •anschließender Temper-Prozeß bei ca. 500°C durchgeführt wird. Auch Aufsputtern der Silizidschicht ist denkbar.Bands in a silicon thin-film solar cell according to FIG. 1. The silicon thin-film solar cell shown in FIG. 1 contains a glass substrate 1, in the present embodiment made of float glass or normal glass, on which an intermediate or nucleation layer 2 adapted to the silicon lattice is first deposited. In a particularly advantageous embodiment, the nucleation layer 2 contains a lattice-adapted silicide, such as FeSi_ in the modification of the β-FeSi ". In this case, layer 2 serves both as a nucleation layer for the semiconductor material silicon to be grown thereon and also as an electrode for a component to be manufactured owing to the electrical conductivity of β-FeSi. The silicide can be deposited at low temperatures (<600 ° C., preferably approx. 500 °) and spontaneously forms relatively large grains when suitably tempered. However, other nucleation layers matched to silicon, such as NiSi ", CoSi 2 , CaSi", ErSi ? "GdSi", YSi "or other lattice-adapted suicides can be used. When ß-FeSi "is used, a polycrystalline layer is deposited with a thickness of approximately 0.5 μm, which has a maximum grain size of 30 μm with Si-rich deposition. The β-FeSi 2 layer can be produced in a known manner by siliconizing an iron layer, an iron-containing layer or a stainless steel base as a substrate. However, the silicide can also be produced in that the silicon and the corresponding metal are co-evaporated and precipitate together on the substrate, advantageously also a • subsequent annealing process is performed at about 500 ° C. Sputtering on the silicide layer is also conceivable.
Anstatt eines Suizides kann aber auch ein an das verwendete Halbleitermaterial gitterangepaßtes Metall verwendet werden. Bei Verwendung von Silizium als Halbleiter kommen hierfür z.B. als Elementmetalle z. B. Silber, Aluminium, Blei oder Ytterbium in Frage. Bei Silizium sind jedoch auch Verbindungen wie TiAl3 NbAl3 oder Zr4Al3 denkbar. Die Zwischenschicht kann aber auch ein Isolator, z.B. ein Oxid wie Zirkonoxid in seinen verschiedenen Modifikationen, oder auch ein Nitrid sein.Instead of a suicide, a metal that is lattice-matched to the semiconductor material used can also be used. When using silicon as a semiconductor, for example, as element metals such. B. silver, aluminum, lead or ytterbium in question. For silicon, however, compounds such as TiAl 3 NbAl 3 or Zr 4 Al 3 are also conceivable. However, the intermediate layer can also be an insulator, for example an oxide such as zirconium oxide in its various modifications, or else a nitride.
Die Gitteranpassung kann derart gewählt sein, daß die Gitterkonstanten der Zwischenschicht 2 und der Halbleiter¬ schicht 3 im wesentlichen übereinstimmen wie im Fall von ß-FeSi„ auf Si. Die Gitteranpassung kann aber auch in der Weise bestehen, daß die Gitterkonstanten zueinander in einem ganzzahligen Verhältnis stehen. Auch dieses ermöglicht das Aufwachsen des Halbleitermaterials. Dieser Fall ist z.B. gegeben bei Silizium auf Aluminium oder Silber, wobei die Gitterkonstanten im Verhältnis 4:3 zueinander stehen.The lattice match can be chosen such that the lattice constants of the intermediate layer 2 and the semiconductor layer 3 essentially match, as in the case of β-FeSi "on Si. The lattice adaptation can also be such that the lattice constants are in an integer ratio to one another. This also enables the semiconductor material to grow. This case is e.g. given for silicon on aluminum or silver, the lattice constants being in a ratio of 4: 3 to each other.
Zur Herstellung der eigentlichen Silizium-Solarzellen¬ struktur wird dann zunächst eine als Back-Surface-Feld dienende, stark p-dotierte (p ) -Silizium-Schicht 3a epitaktisch auf dem ß-FeSi„ abgeschieden. Diese Abscheidung kann z.B. durch Flüssigphasenepitaxie aus einer Gallium¬ lösung bei einer Temperatur von ca. 450° durchgeführt werden. Es sind jedoch auch andere Niedertemperatur-Ab- scheidungsverfahren denkbar, wie z.B. (plasmaunterstützte) CVD (Chemical Vapor Deposition) oder ionenstrahlassistierte oder ionengestützte Abscheidungen bei Temperaturen von 200 bis 600°. Auf die p -Silizium-Schicht wird dann homo- epitaktisch die photovoltaisch aktive p-dotierte Si-Schicht 3b mit einer Dicke von vorzugsweise 20-50 ym abgeschieden. Diese Abscheidung kann ebenfalls durch Flüssigphasen¬ epitaxie, z.B. aus einer Zinklδsung oder aus anderen ge¬ eigneten Lösungsmitteln erfolgen. Es können aber auch die für die Abscheidung der p -Schicht weiter oben beschriebenen Verfahren für die Abscheidung der Schicht 3b angewandt werden. Auf die Silizium-Schicht 3b wird dann eine n -Si-Schicht 3c aufgebracht, was ebenfalls durch Flüssig¬ phasenepitaxie oder eines der anderen genannten Verfahren erfolgen kann. In Fig. 2 ist der sich aus dem Aufbau der Figur 1 ergebende Verlauf der Energiebänder und die Lage des Fermi-Niveaus E„ schematisch dargestellt. Der Vorteil der Verwendung einer Back-Surface-Schicht liegt darin, daß Minoritätsträger in der nur leicht dotierten p-Schicht 3b verbleiben, so daß die Rekombinationswahrscheinlichkeit an der Rückseite der Solar¬ zellenstruktur herabgesetzt wird. Diesem Zweck entsprechend kann die Solarzellenstruktur auch in der Reihenfolge n , n, p auf der Zwischenschicht 2 abgeschieden werden.To produce the actual silicon solar cell structure, a heavily p-doped (p) silicon layer 3a serving as a back surface field is first deposited epitaxially on the β-FeSi. This deposition can be carried out, for example, by liquid phase epitaxy from a gallium solution at a temperature of approximately 450 °. However, other low-temperature deposition methods are also conceivable, such as (plasma-assisted) CVD (Chemical Vapor Deposition) or ion beam-assisted or ion-assisted deposition at temperatures from 200 to 600 °. The photovoltaically active p-doped Si layer 3b is then deposited on the p -silicon layer with a thickness of preferably 20-50 μm in a homo-epitaxial manner. This deposition can also be carried out by liquid phase epitaxy, for example from a zinc solution or from other suitable solvents. However, the methods described above for the deposition of the p layer for the deposition of the layer 3b can also be used. An n-Si layer 3c is then applied to the silicon layer 3b, which can also be done by liquid-phase epitaxy or one of the other methods mentioned. 2 shows the course of the energy bands and the position of the Fermi level E “resulting from the structure of FIG. The advantage of using a back-surface layer is that minority carriers remain in the lightly doped p-layer 3b, so that the probability of recombination on the back of the solar cell structure is reduced. Corresponding to this purpose, the solar cell structure can also be deposited on the intermediate layer 2 in the order n, n, p.
Die Erfindung ist jedoch nicht auf die Herstellung von Solarzellenstrukturen und die Verwendung von Glas als Substratmaterial relativ niedriger Temperaturfestigkeit (wesentlich unter 1000°C, z. B. unter 800°C oder unter 600°C) beschränkt, sondern eignet sich ebenso für die Herstellung anderer elektronischer Bauelemente wie Photo¬ dioden, Transistoren etc. Ein weiteres attraktives Anwendungsgebiet ist auch die Herstellung von Steuer¬ elementen, wie Dünnfilmtransistoren, für Flachbildschirme. Als Halbleitermaterial kann mit Vorteil auch eine Silizium-Germanium-Legierung, insbesondere GeSi, verwendet werden. However, the invention is not limited to the production of solar cell structures and the use of glass as a substrate material of relatively low temperature resistance (substantially below 1000 ° C., for example below 800 ° C. or below 600 ° C.), but is also suitable for the production other electronic components such as photo diodes, transistors etc. Another attractive area of application is also the production of control elements, such as thin film transistors, for flat screens. A silicon-germanium alloy, in particular GeSi, can also advantageously be used as the semiconductor material.

Claims

PATENTANSPRÜCHE PATENT CLAIMS
1. Halbleitereinrichtung mit einem Substrat (1) , welches eine kristalline Halbleiterschicht (3) trägt, dadurch gekennzeichnet, daß die Halbleiterschicht (3) auf einer auf einem Substrat (1) aufgebrachten Zwischenschicht (2) aufgebracht ist, wobei die Zwischenschicht (2) und die Halbleiterschicht (3) derart kristallographisch orientiert sind, daß ihre Gitterkonstanten im wesentlichen überein¬ stimmen oder im wesentlichen in einem ganzzahligen Verhältnis zueinander stehen.1. A semiconductor device with a substrate (1) which carries a crystalline semiconductor layer (3), characterized in that the semiconductor layer (3) is applied to an intermediate layer (2) applied to a substrate (1), the intermediate layer (2) and the semiconductor layer (3) is oriented crystallographically in such a way that their lattice constants essentially match or are essentially in an integer relationship to one another.
2. Halbleitereinrichtung nach Anspruch 1, dadurch gekenn¬ zeichnet, daß die Zwischenschicht (2) ein Silizid enthält.2. Semiconductor device according to claim 1, characterized gekenn¬ characterized in that the intermediate layer (2) contains a silicide.
3. Halbleitereinrichtung nach Anspruch 2, dadurch gekenn¬ zeichnet, daß das Silizid eisenhaltig ist.3. Semiconductor device according to claim 2, characterized gekenn¬ characterized in that the silicide contains iron.
4. Halbleitereinrichtung nach Anspruch 3, dadurch gekenn¬ zeichnet, daß die Zwischenschicht (2) FeSi„ enthält.4. Semiconductor device according to claim 3, characterized gekenn¬ characterized in that the intermediate layer (2) contains FeSi ".
5. Halbleitereinrichtung nach Anspruch 4, dadurch gekenn¬ zeichnet, daß die Zwischenschicht (2) ß-FeSi_ enthält.5. Semiconductor device according to claim 4, characterized gekenn¬ characterized in that the intermediate layer (2) contains ß-FeSi_.
6. Halbleitereinrichtung nach Anspruch 2, dadurch gekenn¬ zeichnet, daß die Zwischenschicht (2) CoSi«, NiSi„, CaSi„, ErSi» GdSi„ oder YSi2 enthält.6. Semiconductor device according to claim 2, characterized gekenn¬ characterized in that the intermediate layer (2) CoSi ", NiSi", CaSi ", ErSi" GdSi "or YSi 2 contains.
7. Halbleitereinrichtung nach Anspruch 1, dadurch gekenn¬ zeichnet, daß die Zwischenschicht (2) ein Metall als Element oder Verbindung enthält. 7. The semiconductor device according to claim 1, characterized gekenn¬ characterized in that the intermediate layer (2) contains a metal as an element or compound.
8. Halbleitereinrichtung nach Anspruch 8, dadurch gekenn¬ zeichnet, daß das Metall Ag, AI, Pb und/oder Sb ist.8. A semiconductor device according to claim 8, characterized in that the metal is Ag, Al, Pb and / or Sb.
9. Halbleitereinrichtung nach Anspruch 8, dadurch gekenn¬ zeichnet, daß das Metall TiAl-., NbAl^ oder Zr.Al., ist.9. A semiconductor device according to claim 8, characterized gekenn¬ characterized in that the metal is TiAl., NbAl ^ or Zr.Al.
10. Halbleitereinrichtung nach Anspruch 1, dadurch gekenn¬ zeichnet, daß die Zwischenschicht ein Oxid oder ein Nitrid enthält.10. A semiconductor device according to claim 1, characterized gekenn¬ characterized in that the intermediate layer contains an oxide or a nitride.
11. Halbleitereinrichtung nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, daß das Substrat aus Glas besteht.11. Semiconductor device according to one of the preceding claims, characterized in that the substrate consists of glass.
12. Halbleitereinrichtung nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, daß die Halbleiterschicht aus Silizium oder einer Silizium-Germanium-Legierung, insbesondere GeSi, besteht.12. Semiconductor device according to one of the preceding claims, characterized in that the semiconductor layer consists of silicon or a silicon-germanium alloy, in particular GeSi.
13. Verwendung einer Einrichtung nach einem der Ansprüche 1 bis 12 für eine Solarzelle.13. Use of a device according to one of claims 1 to 12 for a solar cell.
14. Verwendung einer Einrichtung nach einem der Ansprüche 1 bis 12 für einen Flachbildschirm.14. Use of a device according to one of claims 1 to 12 for a flat screen.
15. Verfahren zur Herstellung einer Halbleitereinrichtung, welche ein Substrat (1) und eine von dem Substrat getragene15. A method for producing a semiconductor device which has a substrate (1) and one supported by the substrate
•kristalline Halbleiterschicht (3) aufweist, dadurch gekenn¬ zeichnet, daß in einem ersten Verfahrensschritt auf das Substrat (1) eine Zwischenschicht (2) aufgebracht wird, und daß in einem zweiten Verfahrensschritt auf die Zwischenschicht (2) die Halbleiterschicht (3) aufgebracht wird, wobei die Gitterkonstanten der Zwischenschicht (2) und der Halbleiterschicht (3) im wesentlichen übereinstimmen oder im wesentlichen in einem ganzzahligen Verhältnis zueinander stehen. • Has crystalline semiconductor layer (3), characterized gekenn¬ characterized in that an intermediate layer (2) is applied to the substrate (1) in a first method step, and that the semiconductor layer (3) is applied to the intermediate layer (2) in a second method step is, wherein the lattice constants of the intermediate layer (2) and the semiconductor layer (3) essentially match or are essentially in an integral relationship to each other.
16. Verfahren nach Anspruch 15, dadurch gekennzeichnet, daß die Zwischenschicht (2) ein Silizid enthält, und daß die Zwischenschicht (2) im ersten Verfahrensschritt durch Silizierung einer metallischen Schicht oder durch Co-Ver- dampfen des entsprechenden Metalls und Silizium oder durch Sputtern erzeugt wird.16. The method according to claim 15, characterized in that the intermediate layer (2) contains a silicide, and that the intermediate layer (2) in the first process step by siliconizing a metallic layer or by co-evaporation of the corresponding metal and silicon or by sputtering is produced.
17. Verfahren nach Anspruch 16, dadurch gekennzeichnet, daß das Metall Fe, Co, Ni, Ca und/oder Gd ist.17. The method according to claim 16, characterized in that the metal is Fe, Co, Ni, Ca and / or Gd.
18. Verfahren nach Anspruch 15, dadurch gekennzeichnet, daß die Halbleiterschicht (3) im zweiten Verfahrensschritt durch Flüssigphasen- oder Gasphasenepitaxie aufgebracht wird.18. The method according to claim 15, characterized in that the semiconductor layer (3) is applied in the second process step by liquid phase or gas phase epitaxy.
19. Verfahren nach Anspruch 15, dadurch gekennzeichnet, daß die Halbleiterschicht (3) im zweiten Verfahrensschritt durch ionenstrahlassistierte oder ionengestützte Abscheidung gebildet wird. 19. The method according to claim 15, characterized in that the semiconductor layer (3) is formed in the second process step by ion beam-assisted or ion-assisted deposition.
PCT/EP1995/002059 1994-05-31 1995-05-30 Silicon thin film on glass substrate WO1995033285A1 (en)

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