WO1995012150A1 - Appareil approprie a la commande specifique d'une unite externe et procede associe - Google Patents

Appareil approprie a la commande specifique d'une unite externe et procede associe Download PDF

Info

Publication number
WO1995012150A1
WO1995012150A1 PCT/US1994/010445 US9410445W WO9512150A1 WO 1995012150 A1 WO1995012150 A1 WO 1995012150A1 US 9410445 W US9410445 W US 9410445W WO 9512150 A1 WO9512150 A1 WO 9512150A1
Authority
WO
WIPO (PCT)
Prior art keywords
unit specific
interface
data
specific characteristics
information
Prior art date
Application number
PCT/US1994/010445
Other languages
English (en)
Inventor
Ronald J. Vanderhelm
Gregory Funk
Denis Beaudoin
Original Assignee
Motorola Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc. filed Critical Motorola Inc.
Priority to JP7512616A priority Critical patent/JPH08506680A/ja
Priority to AU79561/94A priority patent/AU7956194A/en
Priority to EP94930436A priority patent/EP0676063A4/fr
Publication of WO1995012150A1 publication Critical patent/WO1995012150A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/40—Network security protocols

Definitions

  • This disclosure deals with but is not limited to devices having unit specific characteristics that are adapted for external control in accordance with such characteristics.
  • ROM read only memory
  • PROM programmable read only memory
  • Some such electronic assemblies furthermore have a processor to provide access to the ROM and further to provide access to the variable components for setting the component appropriately in accordance with the device or unit specific characteristic. In such circumstances programming the electronic assembly to operate according to its unit specific characteristic is straight forward and well known.
  • ROM read only memory
  • PROM programmable read only memory
  • Some such electronic assemblies furthermore have a processor to provide access to the ROM and further to provide access to the variable components for setting the component appropriately in accordance with the device or unit specific characteristic.
  • programming the electronic assembly to operate according to its unit specific characteristic is straight forward and well known.
  • Such devices here to fore either have not taken advantage of the utility offered by the above referenced techniques or have relied on approaches such as providing an external data base to a controller or processor when such processor is identified.
  • FIG. 1 is a block diagram of an electronic assembly in accordance with an embodiment of the instant invention
  • FIG. 2 is an exemplary memory map illustrative of a host computer interface in the FIG. 1 embodiment
  • FIG. 3 is a detailed block diagram of an interface portion of the FIG. 1 embodiment
  • FIG. 4 is a flow chart indicative of using the FIG. 3 interface to access information used to control the FIG. 1 embodiment
  • FIG. 5 is a flow chart indicative of a process using the FIG. 3 interface to update information used to control the FIG. 1 embodiment
  • FIG. 6 is a table illustrative of information that. may be accessed in accordance with the FIG. 5 and FIG. 6 process flow charts.
  • this disclosure deals with an assembly or device that has various unit specific parameters and is further adapted for external control by for example a controller such as a processor or host computer.
  • This assembly includes a non-volatile memory that is collocated or co-resident with the assembly or device or portion requiring or having the unit specific parameters or characteristics and is adapted for storing information or data that is representative of the unit specific characteristics.
  • the assembly includes an interface function that is arranged to provide access to the information or data stored in the non-volatile memory as well as access to the assembly or device by an external controller. The external controller may then provide the device with the information indicative of the unit specific characteristics when this is required.
  • the interface function includes a
  • the interface function may be viewed as a first interface, coupled to the non-volatile memory and arranged to provide access to the data or information within the non-volatile memory by an external controller, and a second interface, coupled to the data transceiver and arranged to provide access to the data transceiver by the external controller so as to provide control, configuration, initialization, or other operating data in accordance with the information that may be unit specific.
  • PCMCIA Personal Computer Memory Card International Association
  • FIG. 1 depicts a device, specifically an electronic assembly (103) that includes an RF transceiver (105) that has unit specific characteristics and hence requires unit specific information, such as calibration or initialization information, etc.
  • the device (103) is a wireless data modem and the RF transceiver (105) is a data transceiver.
  • the electronic assembly is a device, specifically an electronic assembly (103) that includes an RF transceiver (105) that has unit specific characteristics and hence requires unit specific information, such as calibration or initialization information, etc.
  • the device (103) is a wireless data modem and the RF transceiver (105) is a data transceiver.
  • a nonvolatile memory such as an electrically erasable programmable read only memory (EEPROM) (107), is included with or co-resident with the electronic assembly (103) to store any information that is specific to and representative of the unit specific characteristics for the co-resident device or unit, such as that needed for initialization, configuration, or operation.
  • EEPROM electrically erasable programmable read only memory
  • the interface (109) further converts the host computer signals at the control bus (113) to transfer data that is representative of the unit specific information or characteristics to or from the EEPROM (107) at an input (111).
  • the input (111) is a serial or 3 wire EEPROM interface or bus as is well known in the art.
  • the interface function (109) includes a 3 wire serial EEPROM interface, a data buffer, and an automated transfer function all cooperatively arranged for providing access to the data and to the device or wireless data modem.
  • the host computer (101) is provided access to the electronic assembly (103) in accordance with the exemplary memory map depicted.
  • the host computer memory map (201) includes EEPROM access registers (205) and RF transceiver control registers (203) that are located at addresses within the host computer's memory field. These EEPROM access registers (205 & 203) are reserved for transferring and storing information required to access and support the interface (109) at the control bus (113).
  • the EEPROM access registers (205) include a control register (207), an EEPROM address register (209), a write data register (211) which contains the data or op code to send to the EEPROM and a read data register (213) which contains the data accessed or read back from the EEPROM.
  • the control register (207) can be expanded as depicted to include a load control bit (215), which when set by the host computer (101), causes the access to the EEPROM to begin.
  • a busy bit (217) can be read by the host computer to monitor the status of the access or transfer.
  • Bits "E0" (219) and “El” (221) determine as depicted an intended transfer type (225), such as read or write an address or op code, etc.
  • An abort bit (223) when set, cancels the transfer that is in progress and resets the EEPROM interface to a known or predetermined state.
  • the control register (207) while still functioning as a control register is for various practical reasons a composite of bits some of which are physically located at different and distinct addresses.
  • This embodiment includes an address register (301), a write data register (303) and a control register all coupled to the
  • a load bit (329) from the control register (305) triggers the serial or 3 wire EEPROM controller (313) to provide a clock signal at line (321) and serial data to the EEPROM through the serial data line (320).
  • the 3 wire EEPROM controller (313) also controls at input (339) a serial to parallel shift register (311) which assembles information or data received from the EEPROM at a data output pin (322).
  • the serial to parallel shift register (311) is coupled to the host computer at control bus (113).
  • the EEPROM controller (313) asserts a "busy” status or busy signal at output (317) that may be accessed by the host computer (101) when it is in the process of performing a function. Additionally an "abort" status may be asserted by the host computer (101) at input (331).
  • the control bus (113) is further coupled to a plurality of transceiver interface registers, including by way of example a power output register (351) and a DC offset register (355).
  • This plurality of registers including registers (351) and 355) are used to store information provided by the host computer and each, respectively, has an output (353....357) that is interfaced with or coupled to and provides information to the RF transceiver (105) that is representative of the unit specific characteristics of that RF transceiver.
  • Many of the interfaces, such as a digital to analog conversion etc., performed by the plurality of registers and the specifics of how they are performed are known.
  • FIG. 3 diagram is a simplified diagram and that the control bus (113) includes an address function as well as a data function.
  • the address functions (not specifically shown) as are well known include an address decoder circuit that in turn provides an enable input to any register whose address has been decoded thus enabling that register to load or output data that is then available on the data function portion of the control bus (113).
  • FIG. 4 flow chart an illustration of the process followed by the host computer to read data from the EEPROM is depicted and begins at step (401) with the control register bits "E0" and "El” (219 and 221) set to respectively "0" and "1" (signifying read address).
  • the host computer (101) checks the status of the busy bit (217) at step (403) and when it is equal to "0", signifying not busy, loads the address register (301) with the location of the data within the EEPROM at step (405). This is the address within the EEPROM (107) that contains the data or information or unit specific information that is required.
  • the load bit is set and this causes the EEPROM controller (313) to initiate access to the EEPROM at the address as above described and to assert the busy signal at the output (317).
  • the data at this EEPROM address will be provided to the serial to parallel shift register (311). When the data has all been serially received at the serial to parallel shift register (311) the EEPROM controller (313) will release the busy.
  • the host computer (101) can determine this by checking the busy bit at step (409) and when the busy bit equals "0" accessing the data from the serial to parallel shift register (311). At step (411) if more data is required the process repeats from step (403) until all required data is retrieved. Then at step (412) the data is written to the appropriate RF transceiver control registers (203).
  • exemplary unit specific information or data is shown together with an address or location within EEPROM where the data is located.
  • the host computer (101) may access, in accordance with the above descriptions, EEPROM locations or addresses 00, 01, 02, and 03 to obtain unit specific information representing respectively a transceiver output power level, a varactor tuning setting, a frequency deviation setting, and a DC offset setting.
  • FIG. 5 a simplified illustration of the process used by the host computer (101) to update the unit specific information within the EEPROM is depicted and starts at step (501) with the control register in a write address state, specifically bits "E0" and “El” (219 and 221) respectively equal to "1" and "0".
  • host computer (101) loads the address register (301) with the location of the unit specific information within the EEPROM at step (505).
  • the write data register (303) is loaded with the unit specific information that is to be written to the EEPROM address or location from step (505).
  • the load bit (215) is set and the interface function of FIG. 3 updates the EEPROM (107) per the above discussion.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Transceivers (AREA)
  • Stored Programmes (AREA)
  • Medicines Containing Material From Animals Or Micro-Organisms (AREA)
  • Transition And Organic Metals Composition Catalysts For Addition Polymerization (AREA)
  • Read Only Memory (AREA)

Abstract

L'invention concerne un modem de données sans fil (103) approprié à la commande spécifique d'une unité externe, suivant les caractéristiques spécifiques de ladite unité, qui comprend une mémoire rémanente (107) corésidant avec un émetteur-récepteur de données pour stocker des données représentatives des caractéristiques spécifiques de l'émetteur-récepteur de données, une interface (109) permettant d'accéder aux données par l'intermédiaire d'une unité de commande externe (101), ainsi qu'à l'émetteur-récepteur de données par l'intermédiaire de l'unité de commande (101), pour faciliter le pilotage de l'émetteur-récepteur de données en fonction de ses caractéristiques spécifiques.
PCT/US1994/010445 1993-10-28 1994-09-16 Appareil approprie a la commande specifique d'une unite externe et procede associe WO1995012150A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP7512616A JPH08506680A (ja) 1993-10-28 1994-09-16 外部ユニット特定制御に適応した装置およびそのために使用される方法
AU79561/94A AU7956194A (en) 1993-10-28 1994-09-16 An apparatus adapted for external unit specific control and method used therefor
EP94930436A EP0676063A4 (fr) 1993-10-28 1994-09-16 Appareil approprie a la commande specifique d'une unite externe et procede associe

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14493393A 1993-10-28 1993-10-28
US08/144,933 1993-10-28

Publications (1)

Publication Number Publication Date
WO1995012150A1 true WO1995012150A1 (fr) 1995-05-04

Family

ID=22510819

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1994/010445 WO1995012150A1 (fr) 1993-10-28 1994-09-16 Appareil approprie a la commande specifique d'une unite externe et procede associe

Country Status (6)

Country Link
EP (1) EP0676063A4 (fr)
JP (1) JPH08506680A (fr)
CN (1) CN1116005A (fr)
AU (1) AU7956194A (fr)
CA (1) CA2151376A1 (fr)
WO (1) WO1995012150A1 (fr)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4442071A (en) * 1980-07-24 1984-04-10 Kernforschungszentrum Karlsruhe Gmbh Extraction of plutonium ions from aqueous sulfuric acid solutions with D2 EHPA or D2 EHPA/TOPO
US4818998A (en) * 1986-03-31 1989-04-04 Lo-Jack Corporation Method of and system and apparatus for locating and/or tracking stolen or missing vehicles and the like
US4857716A (en) * 1986-05-12 1989-08-15 Clinicom Incorporated Patient identification and verification system and method

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0459279A1 (fr) * 1990-05-30 1991-12-04 Hayes Microcomputer Products, Inc. Construction d'un module d'interface de ligne global et appareil de télécommunication l'utilisant
FI106902B (fi) * 1992-02-28 2001-04-30 Nokia Networks Oy Radiopuhelin

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4442071A (en) * 1980-07-24 1984-04-10 Kernforschungszentrum Karlsruhe Gmbh Extraction of plutonium ions from aqueous sulfuric acid solutions with D2 EHPA or D2 EHPA/TOPO
US4818998A (en) * 1986-03-31 1989-04-04 Lo-Jack Corporation Method of and system and apparatus for locating and/or tracking stolen or missing vehicles and the like
US4857716A (en) * 1986-05-12 1989-08-15 Clinicom Incorporated Patient identification and verification system and method

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP0676063A4 *

Also Published As

Publication number Publication date
EP0676063A4 (fr) 2005-02-09
CA2151376A1 (fr) 1995-05-04
CN1116005A (zh) 1996-01-31
EP0676063A1 (fr) 1995-10-11
JPH08506680A (ja) 1996-07-16
AU7956194A (en) 1995-05-22

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