WO1994022251A1 - Method for synchronizing interconnected sdh and pdh telecommunications networks - Google Patents
Method for synchronizing interconnected sdh and pdh telecommunications networks Download PDFInfo
- Publication number
- WO1994022251A1 WO1994022251A1 PCT/FI1994/000094 FI9400094W WO9422251A1 WO 1994022251 A1 WO1994022251 A1 WO 1994022251A1 FI 9400094 W FI9400094 W FI 9400094W WO 9422251 A1 WO9422251 A1 WO 9422251A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- network
- pdh
- synchronization
- node
- sdh
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 10
- 230000001360 synchronised effect Effects 0.000 description 7
- 238000004891 communication Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229920000136 polysorbate Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0679—Clock or time synchronisation in a network by determining clock distribution path in a network
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
- H04J3/0647—Synchronisation among TDM nodes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/42—Loop networks
- H04L12/422—Synchronisation for ring networks
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
- H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
- H04Q11/0478—Provisions for broadband connections
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J2203/00—Aspects of optical multiplex systems other than those covered by H04J14/05 and H04J14/07
- H04J2203/0001—Provisions for broadband connections in integrated services digital network using frames of the Optical Transport Network [OTN] or using synchronous transfer mode [STM], e.g. SONET, SDH
- H04J2203/0057—Operations, administration and maintenance [OAM]
- H04J2203/006—Fault tolerance and recovery
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J2203/00—Aspects of optical multiplex systems other than those covered by H04J14/05 and H04J14/07
- H04J2203/0001—Provisions for broadband connections in integrated services digital network using frames of the Optical Transport Network [OTN] or using synchronous transfer mode [STM], e.g. SONET, SDH
- H04J2203/0089—Multiplexing, e.g. coding, scrambling, SONET
Definitions
- the invention relates to a method for synchron- izing interconnected SDH and PDH telecommunications net ⁇ works.
- the object of the present invention is to pro ⁇ vide a method by means of which it is possible to trans ⁇ mit a timing (synchronization) between the SDH and PDH networks in such a way that a master node is found with the greatest possible certainty also in failure cases.
- This object is achieved by means of the method of the invention, which is characterized in what is described in the characterizing portion of the enclosed claim 1.
- the basic idea according to the invention is to provide a signal to be transmitted from a SDH network to a PDH network with at least one status bit (lcb, mcb) known per se for LP synchronization in such a way that said at least one status bit is interpretable in the PDH network by using rules of interpretation known per se.
- the synchronization thus works in the interconnected network without any changes having to be made in the PDH networ .
- Figure 1 shows an LP synchronization known per se in a network comprising five nodes
- FIGS 2a to 2c illustrate the operation of the network according to Figure 1 in case of failure
- Figure 3 shows PDH and SDH networks intercon ⁇ nected according to the invention.
- a synchronization may be performed either by means of separate synchronizing connections or by util ⁇ izing normal data connections between the nodes (de ⁇ vices) of the system. Separate synchronizing connections are used in individual cases only and very seldom for the synchronization of a whole network.
- data con- nections are used for the synchronization, such a line code is needed that the nodes are capable of extracting also the clock frequency of an incoming data signal. From these clock frequencies, the synchronization of the nodes of the network may be performed by two different basic methods: mutual synchronization and master-slave synchronization.
- each node In mutual synchronization, each node generates its own clock frequency from the average of the frequencies of incoming signals and its own clock frequency at the moment. Thus all nodes of the network are driven towards a common average frequency and in a stable state they have achieved it.
- a network using mutual synchronization cannot be synchronized with a desired source, which makes an interconnection of different networks problematic, because the operating frequency of the whole network cannot then be predeter- mined accurately.
- master-slave synchronization in ⁇ stead, all nodes of the network are synchronized with the clock frequency of one master node. Each node selects the frequency of one incoming signal as the source of its own clock frequency. The node tries to select a signal having the clock frequency of the master node of the network.
- each node makes its own decision on synchronization, without receiving any information supporting the deci ⁇ sion-making from outside. Since the nodes make their decisions on synchronization independently, each node must be provided with definitions of with which node to be synchronized. These definitions are often made in the form of a priority list, whereby a node selects that signal from the usable incoming signals as the source of its synchronization which has the highest priority, i.e. the one which is highest on the list. If this sig ⁇ nal is interrupted or its quality becomes weaker so that it cannot be qualified as the source of synchronization any longer, the node selects from the list the signal which has the next highest priority.
- the priority list shall be composed in such a way that all nodes on it are situated between the node in question and the master node, whereby the synchronization spreads from the mas ⁇ ter node to lower levels.
- independent master-slave synchroniza ⁇ tion causes restrictions for the synchronization of the network: in a loop network, all connections cannot be used for the synchronization, due to which the dynamic adaptability of the network is restricted in different situations. Communication has to be brought between the nodes for the purpose that the amount of information of a separate node would be sufficient for decision-making in all situations, without a necessity of restricting heavily the amount of connections to be used for the synchronization, in which case the clock frequency of the master node cannot be spread equally well to the nodes of the network in failure conditions.
- the simplest method of expanding the indepen ⁇ dent master-slave synchronization to a communicating one is a so-called LP (loop protected) synchronization.
- the LP synchronization tries to prevent the timing of loop networks from getting in disorder by using two status bits mcb and lcb to support the above-mentioned priority lists, which bits are transmitted between the nodes of the network.
- the first status bit mcb master control bit
- the master node defined for the network transmits this bit as a logic zero in its outgoing signals and the other nodes transmit it forward, in case they are synchronized with a signal the value of the mcb of which is zero.
- the second status bit lcb (loop control bit) indicates whether there is a loop in the synchronization.
- Each node of the network trans ⁇ mits this bit as a logic number one in the direction with which the node itself is synchronized and as a logic zero in the other directions.
- Figure 1 shows an example of a telecommunica ⁇ tions network comprising five nodes 1 to 5, which net- work uses the LP synchronization described above.
- the bits mcb and lcb transmitted by each node in different directions are indicated at the nodes by reference marks M (mcb) and L (lcb), respectively.
- M (mcb) and L (lcb) are indicated at the nodes by reference marks M (mcb) and L (lcb), respectively.
- a synchronization tree is composed of tree-like hierarchic structures, while in LP syn ⁇ chronization the synchronization tree is composed by means of loops. At first is formed a master loop, in which the master node of the network is situated, and then nodes are added to the synchronization tree chain by chain, until all nodes are included.
- Priority lists are composed according to the loops and chains.
- the master loop comprises the nodes 1, 2, 4 and 3, in this order.
- To this master loop is connected a one node chain (node 5).
- the priority lists used by the nodes are indicated by reference mark PL.
- Reference marks A, B and C designate incoming signals of each node.
- the connections not used by the synchronization are indicated by broken lines in the figure.
- Figures 2a to 2c illustrate the behaviour of a network using LP synchronization (Figure 1) in a fail ⁇ ure condition.
- Figure 2a the connection between the master node 1 and the node 2 is interrupted.
- the network receives syn ⁇ chronization from the master node 1 via the node 3.
- the connection is interrupted also between the nodes 1 and 3, whereby the new master node will be the node 3, which was the last to forward the frequency of the master node to the net ⁇ work.
- the mcb sent by the node 3 has now changed into a logic number one to indicate that there exists no con ⁇ nection with the official master node of the network any longer.
- FIG. 3 shows a SDH network 31 and a PDH network 32, which are inter ⁇ connected by coupling a device 33 of the SDH network to nodes 34 and 35 of the PDH network.
- a typical SDH device 33 comprises 63 interfaces of 2048 kbit/s (because an STM-1 frame typically includes 63 channels of 2048 kbit/s).
- a signal to be transmitted to such a PDH network is provided in the SDH device with status bits mcb and lcb to be used for LP synchronization in such a way that these bits are inter ⁇ pretable in the PDH network (in a node of the PDH net- work) by using rules of interpretation known per se.
- a common "synchronization" language can thus be construct ⁇ ed between the networks without a necessity of making changes in the PDH network.
- Such status bits are not necessarily used in all signals to be transferred from the SDH network to the PDH network, but the timing is indicated typically in one direction or two directions (depending on the topology of the network).
- the status bits mcb and lcb may be transferred e.g.
- the status bits may be added to the 2048 kbit/s signal by generating them by means of software in an output buffer of this 2048 kbit/s signal.
- the bits may be detected by reading them by means of software from an input buffer of the 2048 kbit/s signal. If the lcb of two equivalent signals coming to a node of the PDH network has the value "0", a selection is made by means of the mcb by selecting the signal the mcb of which is zero.
- the two tables below show the values of the status bits in different cases.
- the first table concerns an alternative of using both status bits and the second table an alternative of using the lcb only.
- the SDH network receives its timing from a clock signal coming from the PDH network to the SDH network, and
- Figure 4 shows the principle of the invention concerning timing in a loop network, which comprises a node 33 of a SDH network and nodes 34, 35 and 36 of a PDH network.
- the master node of the whole network is in this case the node 33, a clock signal of a clock oscil ⁇ lator 33a of which is transmitted over a loop 37 to synchronizing means (34a, 36a and 35a) of all other nodes, whereby an outgoing signal of each node has the same frequency ⁇ defined by the master node 33 of the network.
- the status bits transmitted by the node 33 to the PDH network have the value "0", because the node 33 has been defined as the master node of the interconnected network.
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Time-Division Multiplex Systems (AREA)
- Small-Scale Networks (AREA)
- Mobile Radio Communication Systems (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE69429086T DE69429086T2 (de) | 1993-03-16 | 1994-03-14 | Verfahren zur synchronisation von verbundenen sdh- und pdh-fernmeldenetzen |
AU62096/94A AU680879B2 (en) | 1993-03-16 | 1994-03-14 | Method for synchronizing interconnected sdh and pdh telecommunications networks |
JP6520686A JPH08508146A (ja) | 1993-03-16 | 1994-03-14 | 相互接続されたsdh及びpdh遠隔通信ネットワークを同期する方法 |
EP94909143A EP0689745B1 (en) | 1993-03-16 | 1994-03-14 | Method for synchronizing interconnected sdh and pdh telecommunications networks |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FI931166 | 1993-03-16 | ||
FI931166A FI93287C (fi) | 1993-03-16 | 1993-03-16 | Menetelmä toisiinsa kytkettyjen SDH- ja PDH-tietoliikenneverkkojen synkronoimiseksi |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1994022251A1 true WO1994022251A1 (en) | 1994-09-29 |
Family
ID=8537562
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/FI1994/000094 WO1994022251A1 (en) | 1993-03-16 | 1994-03-14 | Method for synchronizing interconnected sdh and pdh telecommunications networks |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP0689745B1 (fi) |
JP (1) | JPH08508146A (fi) |
AU (1) | AU680879B2 (fi) |
DE (1) | DE69429086T2 (fi) |
FI (1) | FI93287C (fi) |
WO (1) | WO1994022251A1 (fi) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1997001904A1 (en) * | 1995-06-28 | 1997-01-16 | Nokia Telecommunications Oy | Implementing a fault-tolerant bus in a telecommunications network |
WO1997017777A1 (en) * | 1995-11-06 | 1997-05-15 | Telefonaktiebolaget Lm Ericsson (Publ) | A system related to a transmission buffer |
US5706291A (en) * | 1994-02-25 | 1998-01-06 | Nokia Telecommunications Oy | Method and apparatus for connecting two messaging systems having differing synchronizations one of which is message-based |
WO1998004064A1 (en) * | 1996-07-19 | 1998-01-29 | Nokia Telecommunications Oy | Master-slave synchronisation |
US6134234A (en) * | 1996-07-19 | 2000-10-17 | Nokia Telecommunications Oy | Master-slave synchronization |
US6262996B1 (en) | 1994-02-25 | 2001-07-17 | Nokia Telecommunications Oy | Network arrangement |
WO2002075992A2 (de) * | 2001-03-16 | 2002-09-26 | Siemens Aktiengesellschaft | System und verfahren zur einführung von redundanzmechanismen in ein kommunikationssystem |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW363315B (en) * | 1996-11-12 | 1999-07-01 | Toshiba Corp | Communication network system and the rebuilding method |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0453876A2 (de) * | 1990-04-21 | 1991-10-30 | Alcatel SEL Aktiengesellschaft | Synchronisationsverfahren für SDH-Systeme sowie Verfahren und Schaltungsanordnung zum Erkennen unterschiedlicher Datenstrukturen |
US5172376A (en) * | 1990-06-04 | 1992-12-15 | Gpt Limited | Sdh rejustification |
EP0522748A2 (en) * | 1991-07-10 | 1993-01-13 | Gpt Limited | SDH data transmission timing |
EP0563511A2 (de) * | 1992-02-21 | 1993-10-06 | WANDEL & GOLTERMANN GmbH & Co. | Decoder für Informationsströme in einem synchronen digitalen Nachrichten-Transportsystem |
-
1993
- 1993-03-16 FI FI931166A patent/FI93287C/fi active
-
1994
- 1994-03-14 WO PCT/FI1994/000094 patent/WO1994022251A1/en active IP Right Grant
- 1994-03-14 JP JP6520686A patent/JPH08508146A/ja active Pending
- 1994-03-14 EP EP94909143A patent/EP0689745B1/en not_active Expired - Lifetime
- 1994-03-14 DE DE69429086T patent/DE69429086T2/de not_active Expired - Lifetime
- 1994-03-14 AU AU62096/94A patent/AU680879B2/en not_active Ceased
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0453876A2 (de) * | 1990-04-21 | 1991-10-30 | Alcatel SEL Aktiengesellschaft | Synchronisationsverfahren für SDH-Systeme sowie Verfahren und Schaltungsanordnung zum Erkennen unterschiedlicher Datenstrukturen |
US5172376A (en) * | 1990-06-04 | 1992-12-15 | Gpt Limited | Sdh rejustification |
EP0522748A2 (en) * | 1991-07-10 | 1993-01-13 | Gpt Limited | SDH data transmission timing |
EP0563511A2 (de) * | 1992-02-21 | 1993-10-06 | WANDEL & GOLTERMANN GmbH & Co. | Decoder für Informationsströme in einem synchronen digitalen Nachrichten-Transportsystem |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5706291A (en) * | 1994-02-25 | 1998-01-06 | Nokia Telecommunications Oy | Method and apparatus for connecting two messaging systems having differing synchronizations one of which is message-based |
US6262996B1 (en) | 1994-02-25 | 2001-07-17 | Nokia Telecommunications Oy | Network arrangement |
WO1997001904A1 (en) * | 1995-06-28 | 1997-01-16 | Nokia Telecommunications Oy | Implementing a fault-tolerant bus in a telecommunications network |
WO1997017777A1 (en) * | 1995-11-06 | 1997-05-15 | Telefonaktiebolaget Lm Ericsson (Publ) | A system related to a transmission buffer |
WO1998004064A1 (en) * | 1996-07-19 | 1998-01-29 | Nokia Telecommunications Oy | Master-slave synchronisation |
US6134234A (en) * | 1996-07-19 | 2000-10-17 | Nokia Telecommunications Oy | Master-slave synchronization |
WO2002075992A2 (de) * | 2001-03-16 | 2002-09-26 | Siemens Aktiengesellschaft | System und verfahren zur einführung von redundanzmechanismen in ein kommunikationssystem |
WO2002075992A3 (de) * | 2001-03-16 | 2003-10-30 | Siemens Ag | System und verfahren zur einführung von redundanzmechanismen in ein kommunikationssystem |
Also Published As
Publication number | Publication date |
---|---|
FI93287C (fi) | 1995-03-10 |
JPH08508146A (ja) | 1996-08-27 |
DE69429086D1 (de) | 2001-12-20 |
EP0689745A1 (en) | 1996-01-03 |
AU680879B2 (en) | 1997-08-14 |
EP0689745B1 (en) | 2001-11-14 |
AU6209694A (en) | 1994-10-11 |
FI931166A0 (fi) | 1993-03-16 |
FI93287B (fi) | 1994-11-30 |
DE69429086T2 (de) | 2002-06-06 |
FI931166A (fi) | 1994-09-17 |
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