WO1993017364A1

WO1993017364A1 - Matrix display having an electro-optical material

Info

Publication number: WO1993017364A1
Application number: PCT/FR1993/000168
Authority: WO
Inventors: Jean-Claude Lehureau; José MAGARINO
Original assignee: Thomson-Lcd
Priority date: 1992-02-21
Filing date: 1993-02-19
Publication date: 1993-09-02
Also published as: FR2687824A1

Abstract

A matrix display having an electro-optical material and consisting of a pixel matrix made of an electro-optical material placed between two electrodes, wherein the picture displayed at one pixel is dependent on the electrical field applied between the two electrodes located at said pixel, and the display further comprises an electrode addressing assembly for selectively applying the desired electrical field to each pixel. One (15) of said electrodes consists of a transparent doped semiconductor region surrounded by an amorphous region (17) comprising at least one lightly- or non-doped semiconductor portion (18) forming the channel of a control transistor of which the source or drain is provided by the electrode. The display may be used as a liquid crystal display.

Description

MATRIX DISPLAY WITH ELECTRO-OPTICAL MATERIAL

The present invention relates to a matrix display with electro-optical material and a method of manufacturing such a display.

In French patent application No. 91 03625 filed in the name of THOMSON CSF, a new structure of matrix display with electro-optical material has been proposed combining the advantages of the transfer of the columns to the wall opposite those of the lines, of the use of control transistors and their production in a single masking level, while the known methods of producing the control transistors used until now have at least two levels of masking.

The display claimed in French patent application No. 91 03625 essentially comprises a matrix network of elementary image areas or image points, each area being made up of an electro-optical material placed between two electrodes. One of these electrodes is constituted by a transparent doped semiconductor zone completely surrounded by a lightly or not doped semiconductor zone constituting the channel of a control transistor whose electrode forms the source or the drain. This display also comprises means for addressing the electrodes which make it possible to selectively apply, in each zone, an electric field adapted to the desired image. As shown in FIGS. 1, 2 and 3, which relate to an embodiment of a display according to French patent application No. 91,03625, this display includes columns of electrodes 2 made of transparent semiconductor material produced on a first substrate 1. The first substrate is most often made up of a glass slab.

The display also comprises a second substrate 3, preferably made of glass, which comprises lines of electrodes 4 and control transistors which will be described in more detail below.

The electro-optical material is inserted between the two substrates 1 and 3 positioned as shown in the figure. 3. In this case, the line electrodes 4 rérllsés on the substrate 3 in correspondence with the column electrodes 2 produced on the substrate 1 form image points or pixels 5 controlled by control transistors.

One embodiment of the gate and the source electrode or drain of a control transistor ^f is shown, for example, in Figure 2. In this figure, the gate is represented by a metal ladder, the internal spaces defined by the uprights and the bars materializing the line electrodes 4. In this case, on the glass substrate 3, there has been deposited in a known manner - a transparent semiconductor material 6. This transparent semiconductor material may consist of amorphous silicon or polycrystalline silicon. On this semiconductor material, an insulating layer 7 has been deposited, consisting, for example, of silicon oxide or silicon nitride. On this insulating layer 7, which serves as a gate insulator for the transistor, a metal layer 8 is deposited. This metal layer 8 is preferably a layer of refractory metal such as molybdenum or tantalum. Then, using a known photolitho-etching technique, the grid structure is produced in scale as shown in FIG. 2. Then, using this grid structure as a mask, doping of the uncovered transparent semiconductor material is carried out. Therefore, the electrodes 4 defined by the interior of the scale bars have a conductivity higher than the conductivity sO of the semiconductor zones 9 which are opposite the insulating ladder. In addition, the space 6 between scales also having a conductivity s, the layer of semiconductor material can be brought to a determined potential V. When the grid is energized, the transistors become passers-by and the electrodes 4 are thus brought to potential V. The information transmitted by the electrode columns 2 is

_ then displayed on pixels 5 of the addressed line.

This grid structure is interesting. However, it presents certain problems, in particular when the transparent semiconductor material consists of polycrystalline silicon. In this case, a very high channel capacity is observed due to a large surface channel. This generates currents in the blocked state that are too high for a good

10 operation. On the other hand, with the drawing rules used and the width of the channel, we very often observe a fixed noise on the screen.

The object of the present invention is to propose a new structure which in particular solves this type of problem.

15 Thus, the subject of the present invention is a matrix display of electro-optical material constituted by a matrix of image points formed of an electro-optical material placed between two electrodes, the image displayed at the level of an image point being a function of the electric field applied between the two

20 electrodes located at said point. The display also includes means for addressing the electrodes to selectively apply the desired electric field at each image point. This display is characterized in that one of the two electrodes is constituted by a doped semiconductor zone

- transparent surrounded by an amorphous zone which comprises at least one semiconductor part little or not doped constituting the channel of a control transistor whose electrode forms the source or the drain.

According to a preferred embodiment, the 7, one

30 amorphous is made of non-hydrogenated amorphous silicon ot the semiconductor part little or not doped is obtained by crystallizing the amorphous silicon, the crystallization of the amorphous silicon being preferably carried out using a laser. Using this technique, it is possible to align channels with a width of around 10 microns with just a laser pass. On the other hand, because of the use of the laser pass to make the channel, it is not necessary to align the channel with the grid structure. For the display to function properly, it is sufficient to draw at least one channel between the image points or pixels.

The present invention also relates to a method of manufacturing a matrix display in which a first network of electrodes for applying an electric field is produced on a first substrate, a second network of electrodes for applying an electric field associated with it. to individual access transistors for controlling each image point on a second substrate and the placement of an electro-optical material between the first and second substrates, characterized in that the second network of electrodes associated with the transistors d access is obtained by following the steps below:

- deposition on the second substrate of a layer of an amorphous material; "depositing on the layer of amorphous material a layer of an insulating material and a layer of a metallic material;

- production in a known manner of the gate structures - doping of the areas not covered by the gate structures;

irradiation of these zones, so as to transform the amorphous material into a doped polycrystalline material, and irradiation through the substrate of certain parts of the zones left amorphous by the first irradiation so as to obtain, by crystallization, semiconductor parts s little or not doped constituting the channel of the control transistors.

According to an alternative embodiment, the irradiation of certain parts of the amorphous layer so as to obtain the crystallization of the slightly or not doped semiconductor parts constituting the channel of the control transistors can be carried out before depositing the layer of insulating material and the layer of metallic material on the layer of amorphous material.

According to another characteristic of the present invention, the method further comprises a post-hydrogenation of the crystallized zones which makes it possible to improve the characteristics of the transistors by giving the crystallized zones the properties of a semiconductor with high mobility and low current. blocking.

According to a preferred embodiment, the doping of the areas not covered by the gate structures is carried out using a PH phosphene plasma or by depositing an organic compound containing phosphorus, for example using '' an aerosol. On the other hand, the irradiation of the doped areas is carried out by an excimer laser and the channel of the transistors is carried out using an Argon laser by focusing on the amorphous layer. Other characteristics and advantages of the present invention will appear on reading the description of a preferred embodiment. This description is made with reference to the attached drawings in which:

- Figure 1, already described, shows the substrate supporting the electrode columns of a display according to the prior art;

- Figure 2 already described, shows the second substrate and the semiconductor electrodes associated with transistors for a display according to the prior art, - i _a Figure 3, already described, illustrates an example of display according to the prior art obtained using the first and second substrates shown in Figures 1 and 2; FIGS. 4A, 4B and 4C schematically represent three stages of the process for manufacturing semiconductor electrodes associated with transistors according to an embodiment of the present invention;

FIG. 5 represents a schematic perspective view of the substrate receiving the semiconductor electrodes associated with transistors according to an embodiment of a display according to the present invention, and

- Figure 6 schematically illustrates another embodiment of the transistor channel in a display according to the present invention.

We will first describe, with reference to FIGS. 4A to 4C, a method for producing a display device in accordance with the present invention, more particularly the production of semiconductor electrodes and transistors _. associated command. The described method uses as gates the transistors to define the semiconductor electrodes allowing a self-alignment of the source and the drain of a transistor. More specifically, the control grids serve as a mask for doping the parts of semiconductor layers which are not opposite the grids. As shown in FIG. 4A, a first protective layer 11 or adaptation layer constituted, for example, by a thin layer of silicon oxide, is first deposited on a substrate 10 constituted by a glass plate. On this layer 11, a layer of an amorphous material such as non-hydrogenated amorphous silicon is successively deposited, then an insulating layer 13 and then a metal layer 14. More precisely, on layer 11, using an LPCVD deposit (for Lo Pressure Chemical Vapor Deposition in English), a semiconductor layer consisting of silicon obtained by cracking silane at low pressure in the absence of hydrogen. This layer is deposited over a thickness of between 5 and 50 nanometers. On this layer is deposited using the same enclosure, an insulating layer 13 such as silicon nitride or silicon oxide, for example, from the material known as "Tomcat"

(i ^ C ^ O ^ Hg). Then on this insulating layer, a layer of metal 14 is deposited, preferably made up of a layer of refractory metal such as molybdenum or tantalum. Then, in known manner, a resin is deposited on the assembly, then using a pholitholithography technique or a printing technique, the resin is etched so as to produce the grid structures in scale. Then, the metal and the insulator are attacked selectively, for example in a SiF./SlH plasma, or in the aqueous phase in a hydrofluoric acid solution so as to obtain the structure shown in FIG. 4B. Then, using the gate structures as a mask, the exposed zones 15 and 16 are doped. This doping is carried out by putting the structure in a plasma of phosphine PH,. This makes it possible to deposit, under an acceleration of a few hundred to a few thousand volts, the dopant on the zones 15, 16. It is also possible to carry out the doping by depositing by aerosol an organic compound containing phosphorus. Then, an exposure using an excimer laser makes it possible to heat the zones 15 and 16 of the layer of amorphous silicon a -Si.

An exposure of the order of 100 mJ / cm ^{2 is} carried out so as to effect the crystallization of the layer of amorphous silicon. As the metal is more reflective, the zones 17 of amorphous silicon which are located opposite the grid structures, are not or only slightly crystallized. On the other hand, an Argon laser focused through the glass substrate 10 makes it possible to achieve local crystallization of the amorphous semiconductor layer in the regions 17. This gives rise to at least one region 18 forming the channel of the transistor. For example, a power of 80 W makes it possible to explosively crystallize the layer of amorphous silicon at a speed of 13 m / s under a width of 30 μ_m. These different operations are represented in FIG. 4C. Finally, a post-hydrogenation can be operated under a hydrogen atmosphere at 250-400 ° C so as to improve the characteristics of the trans' ^* "* or.

According to a variant of the method, it is possible to produce zones 18 of polycristaUln silicon in the layer of amorphous silicon using an Argon laser, before making the grid structures, that is to say before depositing the insulating layer 13 and the metal layer 14.

L ^r using the methods described above provides a second substrate 10 in which were carried out of the line electrodes 15 and G grUle of structures, as shown in Figure 5. In this figure 5, that we noticed below the grid structure formed by the layer 13 of grating insulator and the metallic layer 1B, there is an amorphous silicon layer 17, and that in this amorphous silicon layer, zones have been produced 18 in polycrystalline silicon by an Argon laser pass. In addition, by using the gate structure G as a mask, doping and crystallization of the zones 15 and 16 not covered by the gate structures G are carried out, so as to obtain, in these parts, N-doped semiconductor polycristaUln silicon for example. By using this technique, it is possible to re-use a transistor channel having a controlled width and which is not entirely constituted by the gate structures. In Figure 6, there is shown another embodiment of the transistor channel. In this case, it is noted that the laser passes are not aligned with the amounts of the grids as in FIG. 5. In fact, the adjustment between photogravure and laser pass is not necessary. It is only necessary to carry out the laser passes of such that there is at least one channel between the pixels. The line and line spacing channels allow the average pixel potential to be reduced to zero. In addition, the laser passes can all have direct ions relative to the grid pattern. They can even be perpendicular. In the latter case, the current flows through the line space 16.de doped semiconductor.

Claims

1. Matrix display with electro-optical material consisting of a matrix of image points formed of electro-optical material placed between two electrodes, the image displayed at an image point being a function of the electric field applied between the two electrodes located. at said point, the display also comprising means for addressing the electrodes to selectively apply the desired electric field at each image point, characterized in that one (15) of the two electrodes is constituted by a doped semiconductor zone transparent surrounded by an amorphous zone (17) which comprises at least one semiconductor part (18) little or not doped constituting the channel of a control transistor whose electrode forms the source or the drain.

2. Display according to claim 1, characterized in that the amorphous zone is made of non-hydrogenated amorphous sUlcium.

3. Display according to claim 2, characterized in that the lightly or not doped semiconductor part is obtained by cristaUisant the amorphous silicon.

4. Display according to claim 3, characterized in that the crystallization of amorphous silicon is carried out using a laser.

5. Display according to any one of claims 1 to 4, characterized in that the electro-optical material is inserted between a substrate comprising transparent column electrodes and a substrate comprising semi-conducting and transparent electrode-lines with transistors whose griUes are opposite amorphous zones comprising semiconductor parts little or not doped constituting the channel of the transistors.

6. Display according to claim 5, characterized in that the set of griUes of a line is defined by a SHEET STRUCTURE whose bars separate two line electrodes, the uprights defining an address line.

7. A method of manufacturing a matrix display according to any one of claims 1 to 6, in which a first network of electrodes for applying an electric field is produced on a first substrate, a second network of electrodes for application of an electric field associated with individual access transistors to control each image point on a second substrate and the placement of an electro-optical material between the first and second substrates, characterized in that the second network of electrodes associated with the access transistors is obtained by following the steps below:

- Deposition on the second substrate of a layer of an amorphous material;

- depositing on the layer © .. of amorphous material, a layer of an insulating material and a layer of a metallic material;

- making known structures of griUes;

- doping of areas not covered by the griU structures;

- irradiation of these areas so as to transform the amorphous material into a doped polycristaUln material; - irradiation through the substrate of certain parts of the zones left amorphous by the first irradiation so as to obtain, by cristaUisation, semiconductor parts which are slightly or not doped constituting the channel of the control transistors.

8. A method of manufacturing a matrix display according to any one of claims 1 to 6, in which a first network of electrodes for applying an electric field on a first substrate, a second network of electrodes is produced. application of electric field associated with individual access transistors to control each image point on a second substrate and the placement of an electro-optical material between the first and second substrates, characterized in that the second network of electrodes associated with the control transistors is obtained by following the steps below:

- Deposition on the second substrate of a layer of an amorphous material; irradiation of certain parts of the amorphous layer so as to obtain, by crystallization, semiconductor parts with little or no doping constituting the channel of the control transistors;

- Deposition on the layer of amorphous material with a layer of insulating material and a layer of metallic material; - Realization in a known manner of griU structures;

- doping of areas not covered by the griU structures and

- irradiation of these areas so as to transform the amorphous material into a doped polycristaUln material.

9. Method according to any one of claims 7 and 8, characterized in that U further comprises a post-hydrogenation of the cristaUized areas.

10. A method according to any one of claims 7 to 9, characterized in that the doping of the areas not covered by the griUe structures is reaaUsed using a phosphlne plasma PH ".

11. Method according to any one of claims 7 to 9, characterized in that the doping of the areas not covered by the griUe structures is carried out by depositing an organic compound containing phosphorus.

12. Method according to any one of claims 7 to 11, characterized in that the irradiation of the doped areas is réaUsée using an excimer laser.

13. Method according to any one of claims 7 to 12, characterized in that the channel of the transistors is produced using an Argon laser.