WO1993011602A1 - Circuit de commutation - Google Patents

Circuit de commutation Download PDF

Info

Publication number
WO1993011602A1
WO1993011602A1 PCT/AU1992/000630 AU9200630W WO9311602A1 WO 1993011602 A1 WO1993011602 A1 WO 1993011602A1 AU 9200630 W AU9200630 W AU 9200630W WO 9311602 A1 WO9311602 A1 WO 9311602A1
Authority
WO
WIPO (PCT)
Prior art keywords
signal
load
pulse width
control
switching means
Prior art date
Application number
PCT/AU1992/000630
Other languages
English (en)
Inventor
Miroslav Kostecki
Original Assignee
Living Image Technology Pty. Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Living Image Technology Pty. Ltd. filed Critical Living Image Technology Pty. Ltd.
Publication of WO1993011602A1 publication Critical patent/WO1993011602A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
    • H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
    • H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/538—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a push-pull configuration
    • H02M7/53803—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a push-pull configuration with automatic control of output voltage or current
    • H02M7/53806—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a push-pull configuration with automatic control of output voltage or current in a push-pull configuration of the parallel type

Definitions

  • the invention described herein relates to a feedback means, arrangement and method applicable to bi-phase controlled switching circuit.
  • this load is a centre tapped transformer but this is not necessarily th case.
  • the load may be one or more resistors and the load need not necissarily be centre tapped.
  • a bi-phase controlled switching circuit driving a centre tapped transformer of the basic type as illustrated in FIG. 1 , there are two controlled switching means which are both connected to a common rail. The other end is connected through a low pass filter to the primary ends of a centre tapped transformer.
  • the control inputs which are the gate inputs of field effects transistors are periodically and alternatively turned on, causing current to fiow through the controlled switching means from the negative rail to the positive rail.
  • the resultant output developed across the secondary of the transformer may be substantially a sinusoidal waveform where the voltage developed across the primary is a periodic half sinusoid.
  • Such a circuit is supplied with a free running gate signal. Consequently, there is no feedback or adaptive control. In some cases feedback has been arranged to control the switching by feedback taken from the secondary side of the transformer. This approach may include one or more inherent problems regarding: phase shifts, phase variations, isolation of the feedback control signal and noise due to the load.
  • a method of controlling a bi-phase controlled switching circuit having at least two switching means adapted to control the current flowing into a load including the steps of: generating a reference signal of a desired shape and frequency; sensing at least one voltage to provide a feedback signal dependent upon the current flowing into the load; processing the reference signal and feedback signal to provide a control signal which is dependent upon the amplitude, phase difference and waveform shape of both the reference signal and feedback signal; generating a pulse width modulated signal, the width of the generated pulses being dependent upon the amplitude and waveform shape of the control signal; and directing the pulse width modulated signal to one of the switching means and then directing the pulse width modulated signal to another switching means, wherein the directing is dependent upon the frequency of the reference signal.
  • a method of controlling a bi-phase controlled switching circuit having at least one first switching means adapted to allow electrical current to flow into a first end of a load and at least one second switching means adapted to allow electrical current to flow into a second end of the load, the method including the steps of: generating a reference signal at a pre-determined shape and frequency; sensing at least one voltage dependent upon the current flowing into the load to provide at least one feedback signal; processing the reference and feedback signals to provide a control signal; generating a pulse width modulated signal, the width of the generated pulses of the pulse modulated signal being dependent upon the control signal; and selecting a control input of one of the switching means and applying the pulse width modulated signal to the selected control input, wherein the selecting is dependent upon the reference signal.
  • a method of controlling a bi-phase controlled switching circuit having at least one first switching means adapted to allow electrical current to flow into a fir end of a load and at least one second switching means adapted to allow electrical current to flow in a second end of the load, the method inciuding th steps of: generating a reference signal at a pre-determined shape and frequency; sensing at least one voltage to provide a feedback signal, the voltage being dependent upon the current flowing in the load; combining the feedback signal and the reference signal to form a control signal; generating a pulse width modulated signal in which the width of the generated pulses are dependent upon the amplitude of the control signal; monitoring the reference signal to provide a polarity signal; and applying the pulse width modulated signal to the control inputs of the first or second switching means to selectively allow current to flow in the sai first and second directions around the load, the applying being controlled by the polarity signal.
  • the method is further characterised by the voltage providing th feedback signal being substantially in phase with the voltage applied to the load.
  • the method is further characterised by the load being a transformer and the sensing occurring at the primary side of the transformer.
  • the method is further characterised by the sensing occurring a the ends of the primary side of the transformer.
  • the method is further characterised by the load being centre tapped.
  • the method is further characterised by the pulse width modulated signal being supplied to the control input of one of the switching means when the reference signal reaches a first threshold value and pulse width modulated signal is supplied to the control input of the other switching means when the reference signal reaches a second threshold value.
  • the method is further characterised by the first and second threshold values being substantially identical.
  • the method is further characterised by the reference signal being rectified before being combined with the feedback signal, wherein the combining is the difference between a processed rectified reference signal and the feedback signal.
  • the method further includes the step of rectifying the reference signal before it is combined with the feedback signal to form the control signal
  • the reference signal can be generated by an oscillator producing an analogue signal.
  • this function may be dispensed with but in effect provided by a digital system.
  • the input signal is of substantially sinusoidal shape.
  • the input signal may be an input from an analogue source. In both cases the input signal may have a maximum frequency component of 60kHz.
  • the bi-phase controlled switching circuit may be used to provide a sinusoidal output or an output of some other shape.
  • the reference signal may be an audio input such as an output from a microphone or an output from a music cassette tape player.
  • the method further includes the steps of: sensing voltage variations across the secondary of the transformer to
  • SUBSTITUTE SHEET provide a secondary feedback signal, the variations being substantially dependent upon the load across the secondary of the transformer; comparing the secondary feedback signal with a reference voltage an adjusting the signal amplitude level of the control signal so that when the secondary feedback signal is less than a selected amplitude level the pulse width modulated signal is modified to effect a voltage increase on the primar side of the transformer, and when the secondary feedback signal is greater than the selected amplitude level the pulse width modulated signal is modifi to effect a voltage decrease on the primary side of the transformer.
  • the sensed secondary voltage is characterised by being substantially a low frequency signal
  • the second reference voltage is als characterised by being substantially a low frequency signal
  • the method is one wherein the secondary voltage is interpretable as the RMS (root means square) value of the voltage generate across the secondary of the transformer.
  • the feedback from the primary side can preferably correct substantially rapidly changing variations whilst, if used, the feedback from the secondary can be used to correct for variations due to substantial load variations.
  • the method is further characterised by the current flowing into the load being low pass filtered.
  • a method of controlling a bi-phase controlled switching circuit including two input controlled switching means and a centre tapped load with two ends, wherein the method includes controlling the conduction state of the switching means by pulse width modulated signals, the pulse width modulated signals being generated such that the width of the generated pulses increase when first control signal is of amplitude within a first selected range and decrease when the first control signal is of amplitude within a second selected range, and the first control signal is generated by means using feedback sensed fro the ends of the centre tapped load.
  • a bi-phase controlled switching circuit including two input controlled switching means and a centre tapped load with two ends, circuit being of the type defined herein, the method including the steps of: generating a reference signal characterised by signal amplitude variations about a selected signal amplitude level; sensing the voltage at each end of the load and combining the sens voltages to form a combined feedback signal; combining the combined feedback signal and the reference signal to form the difference therebetween and adding this difference signal to a furt signal of selected signal amplitude level to form a control signal; generating a pulse width modulated signal where the width of the generated pulses are greater when the control signal is of amplitude within first amplitude range partly bounded by a second selected signal amplitude level and is smaller when the control signal is of amplitude within a second amplitude range partly bounded by a second selected signal amplitude lev sensing the polarity of the reference signal with respect to the selecte signal amplitude level; and directing
  • the circuit If the circuit is being operated to provide a sinusoidal output voltage, the voltage waveform developed between each end of the primary of the transformer and the centre tap is sensed. These voltages are of half sinusoidal shape with a phase shift of 180° between them. These feedback voltages are summed and combined with a reference signal. The difference added to a control signal supplied to a pulse width modulator which accordingly generates a pulse width modulated signal. When the polarity of the reference signal is positive the pulse width modulated signal is supplied the control input of one switching means and when the polarity is negative it supplied to the control input of the other switching means.
  • a control arrangement adapted for controlling a bi-phase controlled switching circuit including two input controlled switching means and a centre tapped load with two ends, the control arrangement including: generating means adapted to generate a reference signal, the reference signal being characterised by amplitude variations about a sele signal amplitude level; sensor means adapted to sense the voltage at each end of the load combine the sensed voltages to form a combined feedback signal; means adapted to combine the combined feedback signal and the reference signal to form the difference therebetween and adding this difference signal to a further signal of selected signal amplitude level to for control signal; modulator means adapted to generate a pulse width modulated sign where the width of the generated pulses are greater when the control sign of amplitude within a first amplitude range partly bounded by a second selected signal amplitude level and is smaller when the control signal is of amplitude within a second amplitude range partly bounded by a second selected signal amplitude level; polarity sensor means adapted to sense the
  • a control means for controlling a bi-phase controlled switching circuit having least one first switching means having a control input adapted to allow electrical current to flow in a first end of a load and at least one second switching means having a control input adapted to allow electrical current t flow in a second end of the load
  • the control means including: a reference signal generator for providing a reference signal frequen and waveform shape; a processing means adapted to provide a control signal, the control signal being derived from the processing means processing both one or m feedback voltages related to the current flowing in the load and the referen signal; a pulse width modulation means for providing a pulse width modulati signal, the characteristics of the pulse width modulation signal being o dependent upon the control signal; a direction means adapted to direct the pulse width modulation signal to the control input of either the first switching means or the second switching means, the direction being related to the frequency of the reference signal.
  • comparing means adapted to compare a reference voltage with a secondary feedback signal which is dependent upon the voltage across the load, the comparing means being adapted to provide a second control signal, wherein the pulse width modulation signal is dependent upon the control signal and second control signal.
  • FIG. 1 illustrates a circuit of the type with which the invention is useful
  • FIG. 2 illustrates a further circuit of the type with which the invention is useful
  • FIG. 3 illustrates the feedback points of the preferred embodiment as applied to a circuit of the type illustrated in FIG. 1 ;
  • FIG. 4 is a functional block diagram of the preferred embodiment
  • FIGS. 5(a) and 5(b) illustrate the circuit diagram of the preferred embodiment
  • FIG. 6 illustrates the feedback points, and basic feedback processing circuitry, for providing additional feedback to the preferred embodiment as applied to a circuit of the type illustrated in FIG. 1 ;
  • FIG. 7 illustrates an alternative to the basic feedback processing circuitry
  • FIG. 8 is a functional block diagram of the additional feedback circuitr
  • the invention is applicable to the control of circuits of the general type such those illustrated in FIG. 1 and FIG. 2. These circuits consists of two controlle input switching means 1 and 2, in this case field effect transistors, each connected to a load in this case a transformer 3.
  • this invention is not limited loads such as transformers (centre tapped or otherwise).
  • loads such as transformers (centre tapped or otherwise).
  • resistive loads cou be used for heating or lighting applications.
  • Circuits such as the illustrated in FIG. 1 or FIG. 2, are known but the feedba arrangement to control these circuits disclosed herein is not. Typical feedb arrangements, if used, have feedback taken from the secondary side of the transformer 3. This leads to isolation and phase shift feedback problems which can be overcome by including additional circuitry, this leads to additional cost and complexity.
  • the circuit illustrated in FIG. 3 includes a negative rail 4 connected to one terminal of each of the two controlled input switching means 5 and 6.
  • the positive rail 7 connected to the centre tap of a centre tapped transformer 8.
  • the controlled input switching means 5 and 6 are connected to the ends of t centre tapped transformer 8 through low pass filters comprising inductors 9 and 10, and capacitors 1 1 and 12.
  • the circuit in this example, is adapted to produce a substantially sinusoidal voltage waveform across the secondary terminals 13 and 14 of the transformer 8.
  • the circuit operates by applying pulse width modulated signa to the control inputs 15 and 16 of the two controlled input switching means 5 and 6. These pulse width modulated signals are characterised by a carrier frequency and a low frequency modulation signal of lower frequency than th carrier frequency.
  • the pulse width modulated signals are applied to the control inputs 15 and 16 alternatively in accordance with the instant polarity the low frequency modulation signal. This results in the bi-phase characteristics of the circuit. Note, although the majority of the above discussion referred to the centre tapped transformer configuration of FIG. 1 , the invention is equally applicable to the arrangement of FIG. 2 or other loads such as a resistive load.
  • the circuit illustrated in FIG. 3 is of the general type illustrated in FIG. 1 (note other load configurations can be used such as illustrated in FIG. 2) but in this case primary feedback signals are taken from points 17 and 18. By taking feedback signals from these points phase shift and isolation problems can be substantially reduced or eliminated.
  • the feedback signals 17 and 18 are substantially at the potential of the negative rail 4. These signals are substantially characterised by the frequency of the low frequency modulation signal. This is due to the low pass filters effeciively reducing the component of the carrier frequency.
  • the feedback signals are of the form pointed out by numbers 19 and 20 which are applied to the inputs 17 and 18 respectively. They are combined to form the signal as illustrated by number 21. This is achieved with the feedback signals 19 and 20 being added, inverted and conditioned by the adder and inverter 22.
  • the sinusoidal input at 26 is generated by a simpte sine wave oscillator. This is then .rectified by the full wave rectifier 27 to provide the full wave rectified signal 23-
  • the combined signal 21 is added to the full wave rectified signal 23 by the summer 24.
  • the summer 24 includes a level shifting means adapted to set the steady state reference signal 33 level applied to a control input of the pulse width modulator 25. Consequently, the pulse width modulator 25 produces a pulse width modulated signal in accordance with the reference signal from the summer 24.
  • the pulse width modulated signal is applied to inputs of two dual input AND gates 30 and 31.
  • the full wave rectified signal 23 is also applied to a zero voltage detector 28.
  • This provides a clock signal 32 each time the full wave rectified signal 23 is substantially zero which is used to clock a flip-flop 29.
  • the zero voltage detector 28 can be replaced with a crossover detecto detect the sinusoidal input 26 crossing a threshold level.
  • the Q output of the flip-flop 29 is connected to the AND gate 30 and the Q- output is connected to the AND gate 31. This results in the pulse width modulated signal being applied to first one control input ,15 or 16, of the switching means, 5 or 6, then to the other in accordance with the polarity of reference signal. It will be appreciated that the outputs of the AND gates 3 and 31 may need buffering.
  • FIG. 4 can be implemented by the circuit shown i FIG. 5(a) and FIG. 5(b). Only the major parts of the circuit are pointed out a the details would be apparent to a person skilled in the art.
  • the operational amplifiers 42 are adapted to provide a substantially sinusoidal signal 26 to the operational amplifiers 27. These operational amplifiers 27 are configured with the connected diodes to provide a full wa rectified signal 23 to the operational amplifier 28 configured as a zero detector.
  • the output of the operational amplifier configured as a zero detector 28 is connected to the clock of the flip-flop 29 which is configured in the toggle mode.
  • the Q output of the flip-flop 29 is connected to a NAND gate which i buffered by the inverters to provide an AND gate 30.
  • the Q-bar output of the flip-flop 29 is connected to a NAND gate which is buffered by t inverters to provide an AND gate 31.
  • the outputs of these AND gate configurations 30 and 31 are adapted to drive the inputs 15 and 16 of the switching means 5 and 6 illustrated in FIG. 3.
  • the operational amplifiers 22 are adapted to process t feedback signals 17 and 18 supplied, for example, from the connections illustrated in FIG. 3.
  • the circuitry associated with FIG. 5(b) include a level shifting means adapted to set the steady state reference signal level applied to a control input of the pulse width modulator 25 (illustrated on FIG 5(a)).
  • the pulse width modulator 25 is a standard chip NE5560 and it shou be noted that other chips are available to provide this function.
  • the output from the pulse width modulator 25 is connected to both the AND gate configurations 30 and 31 to provide control to the inputs 15 and 16 -of th switching means 5 and 6.
  • the switching means of FIG. 2, FIG. 3 or other similar ci can be controlled to provide a power supply of a desired waveshape whi this embodiment is sinusoidal.
  • variations in the impedance o load can be such that the transformer's impedance becomes considerabl terms of the load as seen by the switching means. This results in the sig generated across the primary of the transformer not substantially reflectin signal generated across the secondary of the transformer. Thus controlli the voltage generated across the primary of the transformer under some special and not necessarily common load conditions does not result in th desired voltage being generated across the secondary of the transformer
  • the abovementioned effects of variations in the load impedance can be corrected by sensing the RMS (root mean square) value of the voltage generated across the secondary of the transformer.
  • control of th switching is separated into two feedback arrangements.
  • the first is illustr above in FIGS. 1 to 5 and is adapted to substantially rapidly correct for variations in the voltage generated across the secondary of the transform Because of the arrangement, this can be done simply and effectively as described without the problems outlined earlier concerning known feedb arrangements. Further, this feedback quickly corrects for variations in waveform shape.
  • the second is to correct for the variations in the voltage generated across the secondary of the transformer. This feedback control does not need to be as fast acting as the first and so the problems with kn feedback arrangements are not substantially encountered.
  • the circuit illustrated in FIG. 6 includes secondary feedback sampling poi 34 and 35 on the secondary side of the transformer 8. This feedback sign filtered and adapted to detect the value of the voltage generated across th secondary terminals of the transformer 8. This can be achieved by a transformer 36 being connected to the feedback points 34 and 35. A rectif 37 is connected to the output of the transformer 36. The output of the rectif 37 is connected to a low pass filter 38 including the resistor and capacitor provide a secondary feedback signal 39. In an alternative arrangement, illustrated in FIG. 7, the resistor and capacitor arrangement are connected across the output of the transformer 8.
  • the secondary feedback signal 39 is a substantially sinusoidal wave oscillating about a steady state bias of approximately 6 volts.
  • the secondary feedback signal 3S is conditioned and combined with a second reference signal 40 by the summer 41 (using a standard operational amplifier circuit).
  • the output from the summer 41 is adapted to adjust the amplitude of the reference signal 33 for the pulse width modulator 25. This is achieved by the amplifier 42 being used such so its gai is controlled by the output 43 of the summer 41.
  • the other parts of FIG. 8 perform the same functions as the counter parts illustrated in FIGS. 4, 5(a) an 5(b).
  • the reference signal (the sinusoidal input at 26) is generated by a simple sine wave oscillator.
  • this signal can be generated by other means and although preferably this signal is sinusoidal it need not necessarily be of this shape.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

Dispositif, système et procédé pouvant trouver application dans un circuit commandé biphasé de commutation adapté pour fournir une charge. On traite des signaux de retour (17, 18) associés au courant passant dans la charge, et on les utilise pour commander les dispositifs commutateurs (5, 6) du circuit de commutation. Le signal de retour est en phase avec la tension appliquée à la charge aux bornes du circuit de commutation. On traite ces signaux de retour pour former un signal que l'on combine ensuite à un signal de référence. On utilise le résultat ainsi obtenu pour commander un modulateur de largeur d'impulsion produisant un signal à modulation de largeur d'impulsion. On utilise la polarité du signal de référence pour diriger le signal modulé en largeur d'impulsion vers les entrées de commande (15, 16) des dispositifs commutateurs. De préférence, on compare une tension de référence à un signal secondaire dépendant de la tension dans la charge. Ainsi, on peut régler le signal modulé en largeur d'impulsion de manière à compenser les variations de l'impédance de la charge.
PCT/AU1992/000630 1991-11-28 1992-11-26 Circuit de commutation WO1993011602A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
AUPK972591 1991-11-28
AUPK9725 1991-11-28

Publications (1)

Publication Number Publication Date
WO1993011602A1 true WO1993011602A1 (fr) 1993-06-10

Family

ID=3775846

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/AU1992/000630 WO1993011602A1 (fr) 1991-11-28 1992-11-26 Circuit de commutation

Country Status (1)

Country Link
WO (1) WO1993011602A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003055055A1 (fr) * 2001-12-13 2003-07-03 Coolit Systems Inc. Convertisseurs
US6687142B2 (en) 2001-12-17 2004-02-03 Coolit Systems Inc. AC to DC inverter for use with AC synchronous motors

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU4252578A (en) * 1977-12-16 1979-06-21 Sony Corporation Switching regulator
AU4252478A (en) * 1977-12-16 1979-06-21 Sony Corporation Switching regulator
EP0284021A2 (fr) * 1987-03-24 1988-09-28 Zaidan Hojin Handotai Kenkyu Sinkokai Convertisseur de puissance à modulation de largeur d'impulsion
EP0358191A2 (fr) * 1988-09-06 1990-03-14 Kabushiki Kaisha Toshiba Alimentation de puissance à modulation de largeur d'impulsion capable d'éliminer les composantes du signal de fréquence de modulation de potentiels de terre

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU4252578A (en) * 1977-12-16 1979-06-21 Sony Corporation Switching regulator
AU4252478A (en) * 1977-12-16 1979-06-21 Sony Corporation Switching regulator
EP0284021A2 (fr) * 1987-03-24 1988-09-28 Zaidan Hojin Handotai Kenkyu Sinkokai Convertisseur de puissance à modulation de largeur d'impulsion
EP0358191A2 (fr) * 1988-09-06 1990-03-14 Kabushiki Kaisha Toshiba Alimentation de puissance à modulation de largeur d'impulsion capable d'éliminer les composantes du signal de fréquence de modulation de potentiels de terre

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003055055A1 (fr) * 2001-12-13 2003-07-03 Coolit Systems Inc. Convertisseurs
US6687142B2 (en) 2001-12-17 2004-02-03 Coolit Systems Inc. AC to DC inverter for use with AC synchronous motors

Similar Documents

Publication Publication Date Title
US5450306A (en) Closed loop pulse width modulator inverter with volt-seconds feedback control
Buso et al. A dead-beat adaptive hysteresis current control
US5115205A (en) AC amplifier with automatic DC compensation
US4364109A (en) Control device of inverters
EP0163746A1 (fr) Dispositif inverseur a modulation par largeur d'impulsions
KR970055166A (ko) Npc 인버터 제어 시스템
US5777864A (en) Resonant converter control system having resonant current phase detection
KR20030011274A (ko) 전력 컨버터에서 고조파 감소를 위한 장치 및 공정
JP4068146B2 (ja) 位相ノイズ軽減回路
WO1998004031A1 (fr) Onduleur a frequence de commutation reduite
WO1993011602A1 (fr) Circuit de commutation
JPS61244275A (ja) Ｐｗｍ制御電圧形インバ−タ装置
US5953220A (en) System and method for zero phase error tracking of reference in PWM inverters
JPH05176594A (ja) 誘導電動機用インバータ装置
JPH0956175A (ja) 圧電トランスを含む電源回路装置
Agrawal et al. Design of a New Single Phase 7-Level Reduced Switches Count Multilevel Inverter Topology
JPS61280773A (ja) パルス幅制御方式インバ−タ装置
JPH08331855A (ja) インバータ装置
JPH05333953A (ja) 静止形無効電力補償装置
JP3049673B2 (ja) スイッチング電源
JP2885855B2 (ja) 信号切換回路
JPH04304167A (ja) 電源装置
JPS61254075A (ja) 電源回路
JPH1056781A (ja) インバータ回路
JPS6248476B2 (fr)

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AT AU BB BG BR CA CH CS DE DK ES FI GB HU JP KP KR LK LU MG MN MW NL NO PL RO RU SD SE UA US

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): AT BE CH DE DK ES FR GB GR IE IT LU MC NL PT SE BF BJ CF CG CI CM GA GN ML MR SN TD TG

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
REG Reference to national code

Ref country code: DE

Ref legal event code: 8642

122 Ep: pct application non-entry in european phase
NENP Non-entry into the national phase

Ref country code: CA