WO1992020078A2 - Superconducting delay line - Google Patents

Superconducting delay line Download PDF

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Publication number
WO1992020078A2
WO1992020078A2 PCT/US1992/003862 US9203862W WO9220078A2 WO 1992020078 A2 WO1992020078 A2 WO 1992020078A2 US 9203862 W US9203862 W US 9203862W WO 9220078 A2 WO9220078 A2 WO 9220078A2
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WIPO (PCT)
Prior art keywords
superconducting
delay line
ground plane
conductor
substrate
Prior art date
Application number
PCT/US1992/003862
Other languages
French (fr)
Other versions
WO1992020078A3 (en
Inventor
Roger James Forse
David Lee Skoglund
Original Assignee
Superconductor Technologies Inc.
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Filing date
Publication date
Application filed by Superconductor Technologies Inc. filed Critical Superconductor Technologies Inc.
Publication of WO1992020078A2 publication Critical patent/WO1992020078A2/en
Publication of WO1992020078A3 publication Critical patent/WO1992020078A3/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P9/00Delay lines of the waveguide type
    • H01P9/006Meander lines

Definitions

  • This invention relates to useful articles formed from superconducting thin films. More particularly, it relates to microwave delay lines having improved bandwidth con- structed from superconducting thin films.
  • Delay lines are well known electrical devices for introducing delay in electrical signals. Particularly, delay lines are useful in microwave devices to introduce delay and relative phase shift between two or more sig ⁇ nals. Microwave delay lines have a physical length to them, whose length is on the order of the wavelength of microwaves, typically a few centimeters.
  • a conductor 10 meanders in a serpentine fashion across a substrate 12 to form a delay line.
  • a known disadvantage of this arrangement is that cross-talk or coupling occurs between the various portions of the conductor 10.
  • the higher the frequency at which the device operates the greater the amount of coupling.
  • the amount of coupling becomes so large as to preclude effective transfer through the delay line. For example, a maximum frequency of 3 GHz is typical of earlier devices.
  • a ground plane is an electrically conductive plane or structure which is sufficiently close to the conductor so as to modify its electromagnetic transport properties. Specifically, the cross-talk is reduced as the electrical coupling occurs principally between the conductor and ground plane, as opposed to between portions of the conductor.
  • ground plane devices There are two principal embodiments of ground plane devices known to the prior art.
  • a first class of device, known generally as microstrip devices, are shown for example with reference to Fig. 2 which shows a perspective view of a superconducting delay line in the microstrip configuration.
  • a substrate 22 supports a meandering conductor 20 on one face, and a conductive ground plane 24 on the other face of the substrate 22.
  • Superconducting delay lines have been made in this struc ⁇ ture, utilizing an epitaxial film patterned into the shape of the conductor 20 on the substrate 22.
  • the advantage of the microstrip design is that a large ground plane 24 is provided.
  • the principal disadvantage when utilizing superconductors is that it is necessary to provide a conductor, preferably superconductors, on both faces of the substrate 22.
  • the second standard configuration for ground plane devices are the coplanar devices.
  • Fig. 3 shows a perspec ⁇ tive view of a typical coplanar configuration. Struc ⁇ turally, a conductor 30 meanders upon a substrate 32. A ground plane 34 is disposed on the same side of the substrate 32 as is the conductor 30. Thus, the conductor 30 and ground plane 34 are coplanar, being disposed on the same side of the substrate 32 and in the same plane.
  • the advantage of the coplanar structure is that a single side of the substrate is used. This is particularly useful for superconducting delay lines in that the superconductor may be formed on one side of the substrate 32 and then patterned to separate the conductor 30 and ground plane 34.
  • ground plane 34 becomes ineffective due to segmentation.
  • the ground plane 34 will have fingers 36 which may be a substantial distance from the point at which the ground plane 34 is connected to ground.
  • Such segmentation reduces the effectiveness of the ground plane.
  • a partial solution to the segmentation problem has been to provide interconnections (not shown) between portions of the ground plane to help maintain a true ground potential all points in the ground plane 34. Such arrangements have not proved fully satisfactory in the past. When such interconnections were utilized, generally they were not considered to be a part of the circuitry.
  • ground plane structures Another significant disadvantage of the ground plane structures is that the resulting devices have unacceptably low impedance.
  • Microwave devices conventionally have impedances of 50 ohms.
  • Use of a ground plane results in a device having an impedance substantially below 50 ohms, and is not considered acceptable for direct use in microwave circuitry.
  • the "Q” denotes the quality of the device and is a measure of the energy stored by the device divided by the energy dissipated.
  • the Q is in the range typically of 20-30, whereas if made of oxygen free high conductivity (OFHC) copper, the Q is on the order of 50.
  • a superconducting delay line utilizes a meandering conductor on a substrate, a thin dielectric coating and a ground plane adjacent the conductor having portions selectively removed to control the impedance of the device.
  • the ground plane has rectangular sections removed adjacent the conductor to adjust the impedance to substantially 50 ohms.
  • a superconducting epitaxial film on a substrate is patterned to form a conductor, a dielectric insulator covers the conductor and substrate and a gold ground plane having removed portions is disposed above the insulator.
  • a superconducting microwave delay line is constructed having a conductor and a portion of the ground plane adjacent the substrate, with the remainder of the ground plane formed by interconnections which preferably are not in the plane of the conductor.
  • a superconducting epitaxial film is patterned to provide the conductor and portions of the ground plane, and gold ground plane crossovers connect the ground plane, leaving sized holes over the conductor to adjust the impedance of the overall device.
  • a dielectric material provides structural support to the ground plane crossovers. Such structures provide a "Q" of approximately 1800.
  • Fig. 1 shows a meandering conductor delay line of the prior art.
  • Fig. 2 shows a cross-sectional perspective view of a microstrip configuration.
  • Fig. 3 shows a perspective view of a coplanar configuration.
  • Fig. 4 shows a perspective view of a portion of a superconducting delay line with a ground plane pattern in a screen pattern.
  • Figs. 5A-C shows cross-sectional views of Fig. 4 at the indicated portions.
  • Fig. 6 is a plan view of a superconductor delay line having a ground plate pattern in a screen pattern.
  • Fig. 4 shows one embodiment of this invention having generally a microstrip configuration with a modified ground plate.
  • a substrate 42 has disposed on its surface a conductor 40, both of which are covered by an insulator 44 upon which is disposed the ground plane 46.
  • Open regions 48 are patterned in the ground plane 46 to generate a screen like pattern. If the device of Fig. 4 is to be used as a delay line, the conductor 40 would normally be continuous and would typically be patterned in a serpentine fashion.
  • Fig. 4 shows only a portion of the superconducting delay line.
  • Figs. 5A-C show cross-sectional views of Fig. 4 at the indicated locations.
  • Fig. 5A shows a cross-section of Fig. 4 down the line of the conductor 40.
  • the substrate 42 has disposed thereon the conductor 40, over which the dielectric 44 and ground plane 46 are disposed.
  • the removed regions 48 are shown in cross-section.
  • Fig. 5B shows a cross-section through Fig. 4 at a location under the ground plane 46, apart from the removed regions 48.
  • a substrate 42 has the insulator 44 disposed on it, with the conductive ground plane 46 in turn disposed above it.
  • Fig. 5C shows a cross-sectional view of Fig. 4 along a line proceeding through the removed portions 48.
  • the substrate 42 has disposed on it the dielectric material 44, which in turn has the ground plane 46 on top of it.
  • the removed portions 48 are also shown.
  • a superconducting delay line is constructed.
  • the superconducting material having the highest transition temperature T c are the various thallium containing superconductors.
  • an epitaxial thallium superconductor is utilized as the conductor 40. These materials are particularly desirable because of their high transition temperature, permitting their use with liquid nitrogen as a coolant, a relatively easily available and inexpensive coolant. Additionally, epitaxial thallium films have a very low loss for microwave applications. Epitaxial thallium films may be grown through a variety of techniques.
  • epitaxial TlCaBaCuO ⁇ thin films may be generated by chemical deposition or laser ablation techniques as described, for example, in Olson et al, Preparation of Superconducting TlCaBaCu Thin Films by Chemical Deposition, Applied Physics Letters 55 (2) 10 July 1989, pp. 188-190, and in copending applications Superconductor Thin Layer Compositions and Methods, serial no.
  • the substrate is preferably lanthanum aluminate, though any substrate compatible with the superconductor and having acceptable microwave properties may be used. Preferably it is on the order of 500 microns thick.
  • the superconducting conductors may be patterned by conventional photolithographic techniques and etched using known etchants. For example, thallium superconductors may be etched using a dilute (1:150) solution of HCL for 10-20 seconds.
  • the dielectric preferably must exhibit both low dielectric loss and loss tangent in the operative frequency range. Further, the dielectric must be compatible with the superconducting films, now patterned as the conductor 40. Further, the dielectric must be thermally stable and cyclable between superconducting temperatures, on the order of 77K and potential ambient temperatures, on the order of 473K.
  • a polyimide formulation in particular, Probamide 412, from Ciba Giegy is utilized. The polyimide formulation consists of a preimidized polyimide solution in gamma butyral lactone.
  • the polymer is photochemically active (negative working) and is cross-linked by exposure to UV light.
  • the film may be deposited using spin on techniques and cured between 100°-200°C. A detailed description of this dielectric is provided in copending application entitled Passivation Coating for Superconducting Thin Film Devices, filed concurrently herewith, commonly assigned to applicant's Assignee, which is incorporated herein by reference.
  • the ground plane 46 is preferably formed of a highly conductive, generally non-reactive material such as gold.
  • a gold layer approximately 3 microns thick may be sputtered or deposited onto the dielectric 44. Once deposited, the gold is removed in the selected portions 48 by any suitable technique, such as photolithographic techniques followed by etching of the gold using a convention gold etchant.
  • the device will have relatively high impedance in areas where the conductor 40 is not covered by the ground plane 46, that is where the removed portion 48 overlies the conductor 40.
  • the device will have relatively low impedance in areas where the conductor 40 is adjacent the ground plane 46.
  • the overall impedance of the device is adjusted to any desired impedance, with the preferred impedance being the conventional 50 ohm impedance for microwave devices. It is further desirable to maximize the "Q" of the device while keeping the impedance at the desired level.
  • the removed portions 48 are shown generally as rectangles, which is a particularly convenient shape to manufacture. However, any shape which has the net effect desired of providing the desired impedance and/or maximizing the "Q" is acceptable.
  • variable parameters are the gap, shown in Fig. 4 and defined to be the distance from the conductor 40 to the edge of the removed region 48 in a direction perpendicular to the conductor 40, and the length (L) of the removed portion 48 in a direction parallel to the conductor 40. Additionally, the space 1 is between adjacent removed regions 48 may be controlled to optimize the device. The following formulae are utilized to calculate the Q and impedance of the devic :
  • the Q is given by:
  • R series resistance/unit length.
  • L refers to the low impedance section
  • H refers to the high impedance section.
  • An alternative embodiment of this invention utilizes a structure with aspects of both the coplanar arrangement and the microstrip arrangement.
  • a conductor 50 is disposed on a substrate 52 in any desired pattern, typically a serpentine pattern.
  • the ground plane consists of a ground plane 54 which is coplanar with the conductor 50, plus ground plane interconnects which provide connection between the ground plane portions 54 and serve to modify the overall impedance of the device by providing the ground plane function regions 54 and 56 adjacent the conductor 50.
  • Dielectric material 58 provides insulation between the conductor 50 and the ground plane interconnect portions 56.
  • the ground plane 54 plus ground plane interconnects 56 collectively provide a total ground plane.
  • the conductor 50 and coplanar ground plane portion 54 are patterned out of an epitaxial superconducting film grown on a substrate 52. Any superconducting material may be used, by YBCO and thallium based superconducting are preferred because of their relatively high transition temperature. Epitaxial films of the 2122 phase are commercially available.
  • the ground plane interconnect portions 56 are made of a highly conductive, nonreactive metal, such as gold, silver or platinum.
  • the contact squares 60 between the coplanar ground plane 54 and first ground plane interconnects 56 are placed on the device.
  • a detailed description of a process providing effective mechanical and electrical contacts to superconductors is described in the co-pending application entitled Fabrication Process for Low Loss Metallizations on Superconducting Thin Film Devices, filed concurrently herewith, and incorporated herein by reference. The description provided here includes specifics related to the disclosed structure.
  • the surface of the superconductor is chemically etched with a dilute (1%) solution of bromine in methanol for 15 seconds.
  • the gold is then sputtered or evaporated onto the surface of the superconductor, prefer ⁇ ably in the range from .2 - 1 micron.
  • the gold may be optionally limited to the desired regions by a shadow mask.
  • the gold may be lithographically patterned, utilizing a thermal resist and known gold etchant, such as TFS etchant from Transene Q, Rowling Ma.
  • the superconducting film is patterned into the conductor 50 and coplanar ground portions 54. Any desired technique, such as lithographic patterning followed by etching, may be used. After the gold squares 60 have been etched and the superconducting film patterned, the surface is covered with dielectric, such as a polyimide, using spin coating techniques, as described above. The insulator is then removed from the gold contact squares 60.
  • the gold crossovers 56 are deposited, which connect the gold pads 60 previously deposited on the superconductor. Any desired technique for depositing the crossovers 56, such as sputtering and etching, may be used.
  • the overall Q and impedance of the delay line may be adjusted by varying the coverage of the conductor 50 by the ground plane interconnects and the proximity of the conductor 50 to the coplanar ground plane 54.

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Abstract

In the preferred embodiment, a superconductive microwave delay line is constructed having an epitaxial superconducting conductor (50) and a portion of the ground plane (54) coplanar with the conductor, both formed on the substrate, with the remainder of the ground plane formed by interconnections (56) between the coplanar ground plane (54). Superconducting epitaxial films may be patterned to provide the conductor and coplanar portions of the ground plane. Metal interconnects (56) disposed on the coplanar portions of the ground plane bridge over the conductor (50) and the impedance of the device is adjusted by varying the coverage of the conductor by the interconnects.

Description

Superconducting Delay Line
Field of the Invention
This invention relates to useful articles formed from superconducting thin films. More particularly, it relates to microwave delay lines having improved bandwidth con- structed from superconducting thin films.
Background of the Invention
Delay lines are well known electrical devices for introducing delay in electrical signals. Particularly, delay lines are useful in microwave devices to introduce delay and relative phase shift between two or more sig¬ nals. Microwave delay lines have a physical length to them, whose length is on the order of the wavelength of microwaves, typically a few centimeters.
When the conductor is placed on a substrate, it is typically the case that the conductor is longer than the substrate is wide. The typical solution to this situation is to meander the conductor across the substrate. As shown in Fig. 1 a conductor 10 meanders in a serpentine fashion across a substrate 12 to form a delay line. A known disadvantage of this arrangement is that cross-talk or coupling occurs between the various portions of the conductor 10. Generally, the higher the frequency at which the device operates, the greater the amount of coupling. At some point, the amount of coupling becomes so large as to preclude effective transfer through the delay line. For example, a maximum frequency of 3 GHz is typical of earlier devices.
The addition of a ground plane has been successfully used to reduce cross-talk between the lines of the conduc- tor. A ground plane is an electrically conductive plane or structure which is sufficiently close to the conductor so as to modify its electromagnetic transport properties. Specifically, the cross-talk is reduced as the electrical coupling occurs principally between the conductor and ground plane, as opposed to between portions of the conductor. There are two principal embodiments of ground plane devices known to the prior art. A first class of device, known generally as microstrip devices, are shown for example with reference to Fig. 2 which shows a perspective view of a superconducting delay line in the microstrip configuration. Structurally, a substrate 22 supports a meandering conductor 20 on one face, and a conductive ground plane 24 on the other face of the substrate 22. Superconducting delay lines have been made in this struc¬ ture, utilizing an epitaxial film patterned into the shape of the conductor 20 on the substrate 22. The advantage of the microstrip design is that a large ground plane 24 is provided. The principal disadvantage when utilizing superconductors is that it is necessary to provide a conductor, preferably superconductors, on both faces of the substrate 22.
The second standard configuration for ground plane devices are the coplanar devices. Fig. 3 shows a perspec¬ tive view of a typical coplanar configuration. Struc¬ turally, a conductor 30 meanders upon a substrate 32. A ground plane 34 is disposed on the same side of the substrate 32 as is the conductor 30. Thus, the conductor 30 and ground plane 34 are coplanar, being disposed on the same side of the substrate 32 and in the same plane. The advantage of the coplanar structure is that a single side of the substrate is used. This is particularly useful for superconducting delay lines in that the superconductor may be formed on one side of the substrate 32 and then patterned to separate the conductor 30 and ground plane 34. The principal disadvantage of this structure is that the ground plane 34 becomes ineffective due to segmentation. For example, with a generally serpentine conductor 30, the ground plane 34 will have fingers 36 which may be a substantial distance from the point at which the ground plane 34 is connected to ground. Such segmentation reduces the effectiveness of the ground plane. A partial solution to the segmentation problem has been to provide interconnections (not shown) between portions of the ground plane to help maintain a true ground potential all points in the ground plane 34. Such arrangements have not proved fully satisfactory in the past. When such interconnections were utilized, generally they were not considered to be a part of the circuitry.
Another significant disadvantage of the ground plane structures is that the resulting devices have unacceptably low impedance. Microwave devices conventionally have impedances of 50 ohms. Use of a ground plane results in a device having an impedance substantially below 50 ohms, and is not considered acceptable for direct use in microwave circuitry.
In addition to having a microwave device with an impedance of 50 ohms, it is a known desirable goal of the prior art to have a high "Q" factor device. The "Q" denotes the quality of the device and is a measure of the energy stored by the device divided by the energy dissipated. For the types of structures involved here, if the delay line is made from gold, the Q is in the range typically of 20-30, whereas if made of oxygen free high conductivity (OFHC) copper, the Q is on the order of 50.
Summary of the Invention
A superconducting delay line utilizes a meandering conductor on a substrate, a thin dielectric coating and a ground plane adjacent the conductor having portions selectively removed to control the impedance of the device. In the preferred embodiment, the ground plane has rectangular sections removed adjacent the conductor to adjust the impedance to substantially 50 ohms. In one embodiment, a superconducting epitaxial film on a substrate is patterned to form a conductor, a dielectric insulator covers the conductor and substrate and a gold ground plane having removed portions is disposed above the insulator.
In another embodiment, a superconducting microwave delay line is constructed having a conductor and a portion of the ground plane adjacent the substrate, with the remainder of the ground plane formed by interconnections which preferably are not in the plane of the conductor. Preferably a superconducting epitaxial film is patterned to provide the conductor and portions of the ground plane, and gold ground plane crossovers connect the ground plane, leaving sized holes over the conductor to adjust the impedance of the overall device. A dielectric material provides structural support to the ground plane crossovers. Such structures provide a "Q" of approximately 1800.
It is a principal object of this invention to provide a useful article from superconducting thin films, par¬ ticularly for use as a microwave delay line. It is another object of this invention to provide a microwave delay line having a controlled impedance.
It is a yet further object of this invention to provide a useful article from superconducting thin films having interconnects out of the plane of the superconduc- tor.
It is a further object of this invention to provide a significantly high "Q" device.
It is an object of this invention to provide a superconducting delay line with a bandwidth of approximately 20 GHz.
It is a further object of this invention to provide a superconducting microwave device which is neither of the microstrip nor the coplanar microwave configuration.
Brief Description of the Drawings Fig. 1 shows a meandering conductor delay line of the prior art. Fig. 2 shows a cross-sectional perspective view of a microstrip configuration.
Fig. 3 shows a perspective view of a coplanar configuration. Fig. 4 shows a perspective view of a portion of a superconducting delay line with a ground plane pattern in a screen pattern.
Figs. 5A-C shows cross-sectional views of Fig. 4 at the indicated portions. Fig. 6 is a plan view of a superconductor delay line having a ground plate pattern in a screen pattern.
Detailed Description of the Invention
Microstrip with Modified Ground Plane Embodiment
Fig. 4 shows one embodiment of this invention having generally a microstrip configuration with a modified ground plate. Structurally, a substrate 42 has disposed on its surface a conductor 40, both of which are covered by an insulator 44 upon which is disposed the ground plane 46. Open regions 48 are patterned in the ground plane 46 to generate a screen like pattern. If the device of Fig. 4 is to be used as a delay line, the conductor 40 would normally be continuous and would typically be patterned in a serpentine fashion. Fig. 4 shows only a portion of the superconducting delay line. Figs. 5A-C show cross-sectional views of Fig. 4 at the indicated locations. Fig. 5A shows a cross-section of Fig. 4 down the line of the conductor 40. The substrate 42 has disposed thereon the conductor 40, over which the dielectric 44 and ground plane 46 are disposed. The removed regions 48 are shown in cross-section. Fig. 5B shows a cross-section through Fig. 4 at a location under the ground plane 46, apart from the removed regions 48. A substrate 42 has the insulator 44 disposed on it, with the conductive ground plane 46 in turn disposed above it. Fig. 5C shows a cross-sectional view of Fig. 4 along a line proceeding through the removed portions 48. The substrate 42 has disposed on it the dielectric material 44, which in turn has the ground plane 46 on top of it. The removed portions 48 are also shown.
In this embodiment, a superconducting delay line is constructed. Currently, the superconducting material having the highest transition temperature Tc are the various thallium containing superconductors. Preferably, an epitaxial thallium superconductor is utilized as the conductor 40. These materials are particularly desirable because of their high transition temperature, permitting their use with liquid nitrogen as a coolant, a relatively easily available and inexpensive coolant. Additionally, epitaxial thallium films have a very low loss for microwave applications. Epitaxial thallium films may be grown through a variety of techniques. For example, epitaxial TlCaBaCuOχ thin films may be generated by chemical deposition or laser ablation techniques as described, for example, in Olson et al, Preparation of Superconducting TlCaBaCu Thin Films by Chemical Deposition, Applied Physics Letters 55 (2) 10 July 1989, pp. 188-190, and in copending applications Superconductor Thin Layer Compositions and Methods, serial no. 238,919, filed August 31, 1989, Liquid Phase Thallium Processing and Superconducting Products, SN: 308,149, filed February 8, 1989; Controlled Thallous Oxide Evaporation for Thallium Superconductor Films and Reactor Design, SN: 516,078, filed April 27, 1990, all incorporated herein by reference, or by in situ evaporation techniques as described in In Situ Growth of Superconducting Films, SN: 598,134, filed October 16, 1990, incorporated herein by reference. Alternatively, epitaxial films may be grown in other superconducting materials, such as in the YBCO class of superconducting materials by known techniques.
In the case of a thallium superconductor, the substrate is preferably lanthanum aluminate, though any substrate compatible with the superconductor and having acceptable microwave properties may be used. Preferably it is on the order of 500 microns thick. The superconducting conductors may be patterned by conventional photolithographic techniques and etched using known etchants. For example, thallium superconductors may be etched using a dilute (1:150) solution of HCL for 10-20 seconds.
An acceptable dielectric coating is then placed above the substrate 42 and patterned conductors 40. For use as a microwave device, the dielectric preferably must exhibit both low dielectric loss and loss tangent in the operative frequency range. Further, the dielectric must be compatible with the superconducting films, now patterned as the conductor 40. Further, the dielectric must be thermally stable and cyclable between superconducting temperatures, on the order of 77K and potential ambient temperatures, on the order of 473K. In the preferred embodiment, a polyimide formulation, in particular, Probamide 412, from Ciba Giegy is utilized. The polyimide formulation consists of a preimidized polyimide solution in gamma butyral lactone. The polymer is photochemically active (negative working) and is cross-linked by exposure to UV light. The film may be deposited using spin on techniques and cured between 100°-200°C. A detailed description of this dielectric is provided in copending application entitled Passivation Coating for Superconducting Thin Film Devices, filed concurrently herewith, commonly assigned to applicant's Assignee, which is incorporated herein by reference.
The ground plane 46 is preferably formed of a highly conductive, generally non-reactive material such as gold. In the preferred embodiment, a gold layer approximately 3 microns thick may be sputtered or deposited onto the dielectric 44. Once deposited, the gold is removed in the selected portions 48 by any suitable technique, such as photolithographic techniques followed by etching of the gold using a convention gold etchant.
The device will have relatively high impedance in areas where the conductor 40 is not covered by the ground plane 46, that is where the removed portion 48 overlies the conductor 40. Correspondingly, the device will have relatively low impedance in areas where the conductor 40 is adjacent the ground plane 46. The overall impedance of the device is adjusted to any desired impedance, with the preferred impedance being the conventional 50 ohm impedance for microwave devices. It is further desirable to maximize the "Q" of the device while keeping the impedance at the desired level. The removed portions 48 are shown generally as rectangles, which is a particularly convenient shape to manufacture. However, any shape which has the net effect desired of providing the desired impedance and/or maximizing the "Q" is acceptable.
In the disclosed embodiment, the variable parameters are the gap, shown in Fig. 4 and defined to be the distance from the conductor 40 to the edge of the removed region 48 in a direction perpendicular to the conductor 40, and the length (L) of the removed portion 48 in a direction parallel to the conductor 40. Additionally, the space 1 is between adjacent removed regions 48 may be controlled to optimize the device. The following formulae are utilized to calculate the Q and impedance of the devic :
The Q is given by:
Q = β/2∞ and the impedance (Z0) is:
Figure imgf000010_0001
Where « and β are determined by the formula: «+ j ϊ = ,/~(THLH + T. LL) (CH/TH + CL/TL) (-W2" where : T = delay/unit length * length of impedance section,
C = capacitance/unit length,
L = inductance/unit length, and
R = series resistance/unit length. The subscript L refers to the low impedance section, whereas the subscript H refers to the high impedance section.
Hybrid Ground Plane Embodiment
An alternative embodiment of this invention utilizes a structure with aspects of both the coplanar arrangement and the microstrip arrangement. As shown in Fig. 6, structurally, a conductor 50 is disposed on a substrate 52 in any desired pattern, typically a serpentine pattern. The ground plane consists of a ground plane 54 which is coplanar with the conductor 50, plus ground plane interconnects which provide connection between the ground plane portions 54 and serve to modify the overall impedance of the device by providing the ground plane function regions 54 and 56 adjacent the conductor 50. Dielectric material 58 provides insulation between the conductor 50 and the ground plane interconnect portions 56. The ground plane 54 plus ground plane interconnects 56 collectively provide a total ground plane. By adjustment of the openings between the ground plane interconnects 56, the overall impedance and "Q" of the circuit may be adjusted.
In the preferred embodiment, the conductor 50 and coplanar ground plane portion 54 are patterned out of an epitaxial superconducting film grown on a substrate 52. Any superconducting material may be used, by YBCO and thallium based superconducting are preferred because of their relatively high transition temperature. Epitaxial films of the 2122 phase are commercially available. In the preferred embodiment, the ground plane interconnect portions 56 are made of a highly conductive, nonreactive metal, such as gold, silver or platinum. In the preferred method of manufacturing the embodiment of Fig. 6, it is preferable to first form the contact squares 60 on the superconducting film, then pattern the superconducting film to form the conductor 40 and ground plane 54, followed by the placement of the insulator 58, and finally, formation of the interconnections 56. It has been discovered that superior mechanical and electrical properties are obtained by depositing the contact squares 60 on the films 54 prior to any earlier processing of the superconducting film.
Describing these process steps in more detail, the contact squares 60 between the coplanar ground plane 54 and first ground plane interconnects 56 are placed on the device. A detailed description of a process providing effective mechanical and electrical contacts to superconductors is described in the co-pending application entitled Fabrication Process for Low Loss Metallizations on Superconducting Thin Film Devices, filed concurrently herewith, and incorporated herein by reference. The description provided here includes specifics related to the disclosed structure.
Preferably, the surface of the superconductor is chemically etched with a dilute (1%) solution of bromine in methanol for 15 seconds. The gold is then sputtered or evaporated onto the surface of the superconductor, prefer¬ ably in the range from .2 - 1 micron. The gold may be optionally limited to the desired regions by a shadow mask. After deposition, the gold may be lithographically patterned, utilizing a thermal resist and known gold etchant, such as TFS etchant from Transene Q, Rowling Ma.
Next, the superconducting film is patterned into the conductor 50 and coplanar ground portions 54. Any desired technique, such as lithographic patterning followed by etching, may be used. After the gold squares 60 have been etched and the superconducting film patterned, the surface is covered with dielectric, such as a polyimide, using spin coating techniques, as described above. The insulator is then removed from the gold contact squares 60.
Finally, the gold crossovers 56 are deposited, which connect the gold pads 60 previously deposited on the superconductor. Any desired technique for depositing the crossovers 56, such as sputtering and etching, may be used.
The overall Q and impedance of the delay line may be adjusted by varying the coverage of the conductor 50 by the ground plane interconnects and the proximity of the conductor 50 to the coplanar ground plane 54.
Though the invention has been described with respect to specific preferred embodiments, many variations and modifications may become apparent to those skilled in the art. It is therefore the intention that the appended claims be interpreted as broadly as possible in view of the prior art to include all such variations and modifications.

Claims

Claims
1. A superconducting delay line comprising: a substrate, a superconducting conductor disposed on the substrate, and a ground plane covering portions of the conductor, including a coplanar ground plane portion and a non-coplanar ground plane portion.
2. The superconducting delay line of claim 1 wherein the non-coplanar ground portions consist of interconnects between portions of the coplanar ground plane.
3. The superconducting delay line of claim 2 wherein the interconnects include gold.
4. The superconducting delay line of claim 1 wherein the superconductor is an oxide of thallium, optionally calcium, barium and copper.
5. The superconducting delay line of claim 4 wherein the superconductor is the 2122 phase of thallium superconductors.
6. The superconducting delay line of claim 1 wherein the superconductor is a YBCO superconductor.
7. The superconducting delay line of claim 1 wherein the superconducting conductor is epitaxial to the substrate.
8. The superconducting delay line of claim 1 wherein the delay line has an overall impedance of substantially 50 ohms.
9. A superconducting microwave delay line comprising: a substrate, a superconducting conductor supported by the substrate, an insulator disposed above the substrate and conductor, and a ground plane on the insulator, wherein the ground plane has portions removed so as to adjust the overall impedance of the delay line.
10. The superconducting microwave delay line of claim 6 wherein the ground plane is gold.
11. The superconducting delay line of claim 9 wherein the superconductor is an oxide of thallium, optionally calcium, barium and copper.
12. The superconducting delay line of claim 9 wherein the superconductor is the 2122 phase of thallium superconductors.
13. The superconducting delay line of claim 9 wherein the superconductor is a YBCO superconductor.
14. The superconducting microwave delay line of claim 9 wherein the delay line has an overall impedance of substantially 50 ohms.
15. A microwave structure having a conductor for transmitting microwaves, and a ground plane disposed electromagnetically adjacent the conductor, the improvements consisting of removing portions of the ground plane adjacent the conductor to adjust the overall impedance of the device.
16. A microwave delay line having a bandwidth in the range of 3 to 20 GHz.
17. A microwave delay line having a Q in excess of 50.
PCT/US1992/003862 1991-05-08 1992-05-08 Superconducting delay line WO1992020078A2 (en)

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JPH01117401A (en) * 1988-08-05 1989-05-10 Nippon Telegr & Teleph Corp <Ntt> Coplanar circuit
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US5635730A (en) * 1995-03-22 1997-06-03 Advanced Mobile Telecommunication Technology Inc. Superconducting oxide thin film device

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