WO1992020061A1 - Methodes de synchronisation et de positionnement de l'image pour ecran d'affichage video - Google Patents

Methodes de synchronisation et de positionnement de l'image pour ecran d'affichage video Download PDF

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Publication number
WO1992020061A1
WO1992020061A1 PCT/FI1992/000087 FI9200087W WO9220061A1 WO 1992020061 A1 WO1992020061 A1 WO 1992020061A1 FI 9200087 W FI9200087 W FI 9200087W WO 9220061 A1 WO9220061 A1 WO 9220061A1
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WO
WIPO (PCT)
Prior art keywords
video
period
display device
frequency
image
Prior art date
Application number
PCT/FI1992/000087
Other languages
English (en)
Inventor
Jarmo Kurikko
Original Assignee
Icl Personal Systems Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Icl Personal Systems Oy filed Critical Icl Personal Systems Oy
Priority to JP4506880A priority Critical patent/JPH06506783A/ja
Priority to GB9317528A priority patent/GB2272136B/en
Publication of WO1992020061A1 publication Critical patent/WO1992020061A1/fr

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006—Details of the interface to the display terminal
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/18—Timing circuits for raster scan displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G1/00—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
    • G09G1/06—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows
    • G09G1/14—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows the beam tracing a pattern independent of the information to be displayed, this latter determining the parts of the pattern rendered respectively visible and invisible
    • G09G1/16—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows the beam tracing a pattern independent of the information to be displayed, this latter determining the parts of the pattern rendered respectively visible and invisible the pattern of rectangular co-ordinates extending over the whole area of the screen, i.e. television type raster
    • G09G1/165—Details of a display terminal using a CRT, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G1/167—Details of the interface to the display terminal specific for a CRT
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/04—Changes in size, position or resolution of an image
    • G09G2340/0464—Positioning

Definitions

  • the invention relates to a method of adjusting the position and/or size of an image displayed on a screen of a video display device, and to a method of synchronizing a video display device with a video signal.
  • VGA Video Graphics Array
  • a hori ⁇ zontal deflection signal aligns the image in the horizontal direction.
  • the timings of the deflection signals depend on the employed display device and display adapter.
  • a cathode-ray tube (CRT) display device requires a predetermined time to retrace the electron beam to the start of the scanning of the next line or field.
  • the retrace time is controlled by horizontal and vertical blanking signals which indicate the position of the active image area on the screen.
  • the resolution of the dis ⁇ play device is determined by the applied technology and the technical solution, being typically e.g. 640x480, 800x600, 1024x768 and 1280x1024.
  • the blanking period or passive display period (e.g. the retrace time of the beam) can be subdivided into a front porch and a back porch and a synchronizing pulse.
  • Display devices typically have horizontal de ⁇ flection frequencies and display refreshing fre- quencies which are determined by the frequencies of the horizontal and vertical synchronizing signals.
  • a usual inexpensive solution is to use a display device with one deflection frequency. This means that the display device is capable of syn ⁇ chronization with video signals only within a relatively narrow frequency band of the horizontal deflection signal.
  • the display device is not usually very sensitive to the vertical deflection, but it is synchronized fairly well with very different vertical deflection frequencies.
  • both the vertical and horizontal deflection signals of the display adapter have to be very accurately defined, and they must not deviate from the values specified for the display device. In this way, a very high image quality is achieved at the expense of low price and versatility.
  • the most recent display devices are usually so- called multi-frequency display devices, and so they are able to synchronize and operate within a very wide range of horizontal deflection frequencies as well within a wide range of vertical deflection frequencies. These display devices offer various adjusting possibilities for the user.
  • the dis ⁇ play device is synchronized with the video signals of the display adapter, the image is usually positioned aside, and so the user has to align the image by using the above-mentioned adjustments.
  • the display devices may comprise preselected and preset timing modes, which the display identifies automatically and adjusts the position of the image in accordance with the manufacturer's adjustments.
  • the position of the image on the screen is usually determined by programming the position of a synchronizing pulse (HSYNC or VSYNC) in relation to the active display period.
  • the position of the image can also be changed by varying the length of the synchronizing pulses.
  • the size of the image can be adjusted by software by varying the duration of the passive display period or by changing the polarity of the synchronizing pulses (polarity adjustment is used e.g. in a VGA environment).
  • This technique is used mainly to adjust the size of the image in the vertical direction, whereas it is hardly ever used for image adjustment in the horizontal direction, because the horizontal deflection frequency would also be affected, and this would also greatly affect the vertical deflection frequency, which should be kept as high as possible and which one is not ready to sacrifice.
  • the most common display device applications are based on one horizontal de ⁇ flection frequency, and therefore it is desirable to maintain compatibility to these applications, too.
  • a change in the horizontal deflection frequency also easily affects the position of the image.
  • the vertical deflection control is formed of the horizontal deflection signal, and it is usually very easy to program as multiples of the horizontal deflection pulses (correspondingly also the active display period and the front (VFP) and back (VBP) porch).
  • the horizontal deflection signal instead, is formed of the multiples of a character clock, and these are considerably more difficult to change by software on account of the technical restrictions imposed by the used technical applications.
  • a charac ⁇ ter clock signal is formed of the multiples of the video dot frequency, and both of these are dependent on the hardware of the equipment and it has not been possible to program them.
  • one character clock period commonly comprises 8 or 16, in text modes also 7, 9 and 18, video dot clock periods. The position or size of the image can thus be adjusted by software only by steps of at least eight pixels, and so the adjustment appears as rough jumps on the screen, and a smooth and accurate adjustment cannot be achieved.
  • Computer application programs are drafted to comply with specific resolutions used as standards, which determines the available active image area on the screen very accurately.
  • the programmatically selectable parameters affecting the adjustment of the image are also generally preselected and bound to the technical application.
  • video dot fre- quencies are often generated by the oscillator or crystal circuits of the display adapter, which gener ⁇ ate only one video frequency per one circuit, and so the display adapter supports only few display standards and resolutions.
  • the most recent circuits based on frequency synthesis are able to generate several frequencies, and so one and the same display adapter is able to support several different resolutions and different horizontal and vertical deflection frequencies for different display devices.
  • the display adapter selects the video frequency proper for the new display mode and the other parameters required by the selected display mode.
  • the final ad ⁇ justment of the position and size of the image on the screen is then performed by utilizing the adjustments of the display device.
  • An object of the invention is to provide a more versatile and more accurate adjustment of the posi ⁇ tion and size of an image on the screen of a display device than what has been possible previously.
  • Another object of the invention is to simplify the synchronization of a video display device with a video signal.
  • the first object is achieved by means of a method according to the invention for adjusting the position and/or size of an image displayed on a video display device, which method comprises the steps of claim 1.
  • the basic idea of the invention is that, instead of adjusting the position and size of the image on the screen by utilizing the adjustments of the display device itself, the properties of the video signal itself are adjusted by the software of the microcomputer by varying the video dot frequency of the video source, such as a display adapter, while simultaneously varying the conventional programmable video control parameters in accordance with various algorithms in such a way that the best possible image is obtained with the display device used in each par ⁇ ticular case.
  • Increase or decrease in the video dot frequency, while the line frequency is maintained substantially constant causes a corresponding decrease or increase in the width of an individual image element, i.e. pixel, on the screen and thus in the size of the entire image.
  • the video dot clock cycle As all video signal timing components are multiples of the video dot clock cycle, it is essential that when the video dot clock cycle is changed, at least the parameters determining the number of the video dot clock cycles in the horizontal deflection period should be changed simultaneously so that the horizontal deflection fre ⁇ quency is maintained substantially unchanged.
  • the video dot frequency can be changed by very small steps, the accuracy which can be achieved in the adjustment of the position and size of the image is only a fraction of the size of an individual pixel, while previously the accuracy has been several pixels.
  • the adjustment of the position and size of the image can be performed "smoothly" and accurately as desired by the user without any compromises.
  • the video dot frequency can be selected by software from a great number of predetermined frequencies or by means of a fully programmable synthesis video dot frequency generator. Accordingly, the only essential modification required e.g. in the present-day display adapters is a video dot frequency generator of a new type or, at best, only a new mode of operation of the previous generator is required, so the invention can be realized very advantageously.
  • the present invention also offers new possibilities to realize the display device at a low ⁇ er cost, because the adjustments of the position and size of the image can be omitted from the display device and performed by software, and the user can control the adjustment e.g. from the keyboard of the computer or by means of a mouse.
  • the inven ⁇ tion provides the best possible quality of the image even with less expensive (lower quality) display devices, as deviations can be corrected easily and accurately.
  • displacements in the position and size of the image due to ageing of the components can be compensated for by the user easily and accurately, which increases the service life of the display device and facilitates maintenance.
  • many other properties are achieved, such as dynamic stepless zooming.
  • the video dot frequency can be altered by sufficiently small steps, a video fre ⁇ quency with which the horizontal deflection of the display device under examination is synchronized can be found by varying the video frequency. Thereafter the vertical deflection can be synchronized and the adjustments of the position and size of the image can be carried out in accordance with the invention.
  • the invention provides compatibility with nearly all dis ⁇ play devices irrespective of their horizontal and vertical deflection frequencies and resolutions.
  • the display devices may be less expensive single-frequency displays and still have better display properties than the conventional multi-frequency displays.
  • the invention is also concerned with a method of synchronizing a video display device with a video signal when at least the vertical and horizontal de ⁇ flection frequencies and resolution are known amongst the electrical properties of the video display device.
  • the method is characterized in that display adapter control parameters are calculated from said known properties of the video display device, the control parameters being utilized to adjust the video dot frequency of a video signal to be applied to the video display device and the numbers of the video clock cycles contained in the horizontal deflection period, the blanking period, the display period, the front porch period and/or the back porch period to such values that the display device is synchronized.
  • the required video dot frequency and other parameters can be calculated easily when the deflection frequencies and resolution of the display device are known.
  • the user is able to make a desired display device synchronize with a video signal by inputting the electrical specifications of his display device to the calculation program.
  • the elec ⁇ trical specifications may be obtained e.g. from a program disk supplied with the display device.
  • De ⁇ fault values for the position and size of the image can be obtained from the same disk e.g. by giving the length of the front and back porch and the display period and the position of the synchronizing pulses, so that the display is immediately ready for oper ⁇ ation.
  • the invention makes it con ⁇ siderably easier to set up a new display device.
  • the specifications of the display devices can be given as frequency and time units and resolutions, the memory space occupied by them is only a fraction of that required for storing the parameter tables used previously for display adapters.
  • Figure 1 is a block diagram of a computer display system in which the method according to the invention can be applied;
  • Figures 2 and 3 show a timing diagram illus ⁇ trating the horizontal and vertical synchronizing signals of a video signal
  • Figures 4 and 5 illustrate the screen of a video display device and how the image is positioned on the screen by the synchronizing signals.
  • the invention may be employed for adjusting any display device controlled by a video signal.
  • a video display may be a cathode-ray tube display, liquid crystal display, plasma display, electro- luminance display, etc.
  • the invention can also be applied to image adjustment in digital television sets, for instance.
  • Figure 1 shows a computer system with a display system in which the invention can be applied.
  • the computer system comprises a central unit (CPU) 7, to which a keyboard 3, a mouse 8 and a display system with a display device 2 can be connected.
  • the display system comprises a video display adapter 1, which is connected through a bus interface 6 to the central unit (CPU) or the like 7 of the computer.
  • the display adapter or graphics controller 1 incorporates a raster display memory 5 having a storage location for each pixel of a displayed image.
  • the display adapter generates a video signal VIDEO (which may comprise several different physical signals), which is applied through a video interface 9 to control the display device 2.
  • the display adapter 1 further comprises an adjustable video frequency generator 4 the output frequency fnc K ° ⁇ wn i c ⁇ ⁇ s controlled by a frequency control signal FCONTR.
  • the generator 4 may be e.g. the frequency synthesizer circuit SC11410 or SC11411 of Sierra Semiconductor Corporation, or the frequency synthesizer circuit ICS1594 of Integrated Circuit Systems Inc.
  • control signal FCONTR of Figure 1 is a serial interface through which the display adapter 1 can write control data into the control registers of the synthesizer circuit 4.
  • control data of the registers practically any frequency can be selected as the output frequency Fnc K*
  • FIG. 2 is a timing diagram, which illustrates deflection or synchronizing signals controlling the horizontal deflection or scanning of the video signal.
  • a horizontal line or horizontal deflection period HPER means a period during which one hori ⁇ zontal line is scanned from the left to the right across the screen and back to the start of the next horizontal line.
  • the HPER comprises an active display period H ACTIVE' w ich determines the active image area on the screen and during which the image data read from the raster memory 5 is displayed; and a blanking period HBLANK, which comprises at least a front porch HFP, a synchronizing pulse HSYNC and a back porch HBP.
  • the character clock CCLK may also be equal to the video clock DCLK.
  • Ml 8 so that one character on the display contains eight pixels in the horizontal direction.
  • the image adjustment parameters may also be selected in some other way.
  • One special case is over- scanning which adds a coloured peripheral area around the active image area. This area can be incorporated in the HFP/HBP area or the H A C TIVE area ' depending on the case.
  • Figure 3 shows a corresponding timing diagram for the control or synchronizing signals of the vertical deflection.
  • a field or vertical deflection period VPER comprises a display period V ACTIVE and a blanking period VBLANK which contains at least a front porch VFP, a vertical synchronizing pulse VSYNC and a back porch VBP. All the above-mentioned control periods of the vertical deflection are formed of the multiples of the horizontal deflection period HPER, the number of the multiples being determined in each particular case by programmable control parameters ⁇ (integers).
  • Figure 3 illustrates how the video image is positioned on the screen of the video display device 2 by the above-mentioned control signals.
  • the durations of the active display periods H A r IVE and V ACTIVE ⁇ n re l a" fci° n "to those of the periods HPER and VPER determine the width and height, that is, the size of the displayed image.
  • the positions of the synchronizing pulses HSYNC and VSYNC in relation to the respective active display periods H A CTIVE anc ⁇ V ACTIVE determine the position of the image in the horizontal and vertical direction. Conventionally, only a coarse adjustment of the position and size of the image has been possible by varying the control parameters M ⁇ with the accuracy of the character clock CCLK (eight pixels).
  • the above-described control signals of the horizontal and vertical deflection and thus the position and size of the image on the screen can be affected more accurately and more smoothly by adjusting the video dot fre ⁇ quency fncLK _?e ne rated by the generator 4 shown in Figure 1.
  • This can be effected by software by alter ⁇ ing the control data in the control registers of the generator 4.
  • the video dot frequency of the generator has to be variable by sufficiently small steps.
  • the adjustment begins to be really agreeable and accurate only when f ⁇ cLK can ⁇ ° e se l ec-te d freely and the accuracy of the adjustment on the screen is one pixel or higher.
  • the adjusting accuracy is a fraction of a pixel, an individual pixel displayed on the screen can be extended or narrowed very accurate ⁇ ly by means of the invention.
  • the length of the cycle of the video dot clock DCLK changes with the video dot frequency foCLK*
  • a change in the cycle of the video dot clock DCLK auto- matically changes the duration of the character clock CCLK and thereby the duration of the horizontal de ⁇ flection period HPER, which may result in that the synchronization is lost. Therefore, according to the invention, the horizontal deflection frequency is maintained substantially constant within the fre ⁇ quency tolerance allowed by the display device; if required, the value of the control parameter M6 and thus the number of the DCLK clock cycles in the horizontal deflection period HPER may be altered by software in such a direction that the duration of HPER remains substantially constant.
  • the size of the image on the screen is adjusted by varying the video dot frequency ncLK while maintaining the horizontal deflection frequency substantially constant by means of the parameters M ⁇ .
  • Figures 4 and 5 illustrate the adjustment of the size of the image by the video fre ⁇ quency.
  • a video dot fre ⁇ quency is increased while maintaining HPER and HSYNC substantially constant by means of the parameters M ⁇ is f ncLKl* ⁇ ⁇ e DCLK clock cycle thereby decreases with increasing video dot frequency, as a result of which the duration of the display period H ACTjVE also decreases (the duration of H BLANK increases) and an individual pixel narrows, thus causing the image area on the screen to be narrowed in the horizontal direction, as shown in Figure 5.
  • the image area on the screen can be widened by decreasing the video dot frequency. In the vertical direction the adjustment of the image is carried out separate ⁇ ly, which will be described later on.
  • the position of the image on the screen is adjusted by programming the position of the horizontal synchronizing pulse HSYNC in relation to the display period H AC TI V E ⁇ y the parameters M ⁇ .
  • the position of the image can also be adjusted accurately (smoothly) by software by varying the video dot frequency while aiming at keeping the position of the pulse HSYNC constant in relation to either edge of the active display period H ACTIVE ⁇ y means of the parameters M ⁇ .
  • a change in the video dot frequency causes a change in the size of the active display period H A CTIVE' as a resu l' t ' of which the "unfixed" edge of the image area is "dis- placed" on the screen in the horizontal direction with respect to the synchronizing pulse.
  • the number of the clock cycles DCLK contained in the front porch HFP or the back porch HBP can be altered by means of the parameters M i in such a direction that the com- bined duration of the display period H Tj y and the front or back porch period remains substantially constant with varying video dot frequency.
  • a change in the video dot frequency does not, in prin ⁇ ciple, affect the vertical deflection. If the vertical deflection is not adjusted, an increase in the video dot frequency, for example, causes the image on the screen to be flattened at the sides, as shown in Figure 5, and the ratio between the width and height of an individual pixel is not correct. This dot aspect ratio is typically 1:1. Therefore, in the invention, the number of horizontal lines blanked during one VPER period, i.e. the height of the image, is also altered by means of the parameters N ⁇ _ when the video dot frequency is changed in such a direction that the ratio between the width and height of the pixels remains substantially constant.
  • the height of the image on the screen may also be adjust- ed e.g. by varying the polarity or length of the pulse VSYNC.
  • the computer system comprises a control soft ⁇ ware effecting the adjustments according to the in ⁇ vention.
  • the control software determines control data determining the required video dot frequency for the generator 4 and the respective M ⁇ and N ⁇ parameters for the display adapter.
  • the user controls the adjustment e.g. by the keyboard 3, the mouse driver 8 or some other peripheral device.
  • the final integer parameters N ⁇ and M ⁇ required by the display adapter 1 and the control data of the generator 4 can be calculated mathematically for each mode of the dis ⁇ play device and the display adapter whenever the mode is changed.
  • This method of storing image adjustment information e.g. enables more user-friendly proper ⁇ ties to be achieved more easily and requires less memory capacity for storing the control information.
  • the same initial data are directly applicable to all display adapters irrespective of their structure, as it is the calculation software that determines the control parameters for each particular display adapter.
  • the image of a new display device can be adjusted to the manufacturer's set values simply by inputting the specifications of the display device into the calculation software.
  • the specifications may be loaded into the calculation software e.g. from a program disk supplied with the display device.
  • the search for the deflection frequencies can be effected by selecting a suitable resolution and by maintaining H ACTIVE and HPER constant and by varying the video dot frequency from a starting frequency to a first frequency at which the synchronization of the horizontal de ⁇ flection of the display device is observed.
  • the user can signal the program about the synchronization by means of the keyboard (or this may be performed by the display device when it detects the synchronization). There ⁇ after the video dot frequency is further increased to a second frequency at which the synchronization of the horizontal deflection is again lost.
  • the user or the display device gives another signal indicating the loss of the synchronization.
  • the program can determine the synchronizing range and the synchronizing center of the horizontal deflection, such as the mean value of the first and second frequencies, which is selected as a video dot frequency.
  • the vertical deflection is syn ⁇ chronized by maintaining the horizontal deflection frequency and the video frequency substantially constant and by varying the length of the vertical deflection period of a video signal applied to the display device by means of the parameters N ⁇ until it is observed that the vertical deflection is synchron ⁇ ized.
  • the synchronizing range and center of the vertical deflection can be searched similarly as above and then adjust the size and position of the image on the screen as described above.
  • a partial image area 62 is selected from a normal-size image area 61 to be dis ⁇ played with normal resolution on the screen, the partial image area being smaller than the normal image area 61 and corresponding to an mxn memory area having an origin (M ⁇ , N ⁇ ) in an MxN-size raster memory 5.
  • the zoom effect of the partial image area 62 is achieved by allowing the video dot frequency to decrease.
  • the origin of the active image area to be zoomed can be moved by programming the (M , N2) co ⁇ ordinate as the initial address of the image area along a line (M Q , N Q ) -> (M ⁇ , N- ⁇ ) when the zooming is in progress.
  • the resolution of the image area 62 de- creases correspondingly with decreasing video dot frequency.
  • the physical size of the entire image area (area 61) on the screen during the zooming of the image area 62 remains sufficiently accurately un ⁇ changed when the control parameter M5 of the display period H Af -- TjVE as well as the parameter M6 of the horizontal period HPER and the position of the pulse HSYNC pulse are altered in accordance with a suitable algorithm depending on the requirements in each particular case.
  • the invention has been described above with reference to certain synchronizing and timing signals HS, HBLANK, VS, VBLANK of the horizontal and vertical deflection and their periods, such as HFP, HSYNC, HBP, H ACTIVE , VFP, VSYNC, VBP, V ACTIVE , which can be found in one form or another in every video signal.
  • the format of the video signal and, in practice, the number of discrete signal components to be trans ⁇ ferred may, however, vary to a very great extent.
  • the horizontal and vertical deflection signals can be transferred separately or in combina ⁇ tion, the video signal may a composite video signal (television), or an RGB video signal, an analogous or TTL level signal, etc.
  • the invention is intended for use in connection with all such various video signal formats.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Details Of Television Scanning (AREA)

Abstract

L'invention se rapporte à une méthode permettant de régler la position et/ou la grandeur d'une image présentée sur l'écran d'un dispositif d'affichage vidéo (2). L'invention permet d'obtenir un réglage plus exact et plus progressif de la position et de la grandeur de l'image sur l'écran, lorsque la fréquence vidéo (fDCLK) d'un signal vidéo (VIDEO) appliqué au dispositif d'affichage vidéo (2) depuis l'adaptateur d'affichage est réglée par logiciel, tout en maintenant la fréquence de déviation horizontale du signal vidéo (VIDEO) sensiblement constante grâce au logiciel. L'invention concerne également une méthode s'appuyant sur le réglage de la fréquence vidéo et permettant de synchroniser un dispositif d'affichage vidéo avec un signal vidéo.
PCT/FI1992/000087 1991-04-26 1992-03-25 Methodes de synchronisation et de positionnement de l'image pour ecran d'affichage video WO1992020061A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP4506880A JPH06506783A (ja) 1991-04-26 1992-03-25 ビデオ表示の同期及び画像位置決め方法
GB9317528A GB2272136B (en) 1991-04-26 1992-03-25 Synchronizing and image positioning methods for a video display

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI912041 1991-04-26
FI912041A FI91197C (fi) 1991-04-26 1991-04-26 Menetelmä videonäyttölaitteella näytettävän kuvan paikan ja/tai koon säätämiseksi sekä menetelmä videonäyttölaitteen synkronoimiseksi videosignaaliin

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WO1992020061A1 true WO1992020061A1 (fr) 1992-11-12

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JP (1) JPH06506783A (fr)
AU (1) AU1438192A (fr)
CA (1) CA2104385A1 (fr)
DE (1) DE4291346T1 (fr)
FI (1) FI91197C (fr)
GB (1) GB2272136B (fr)
WO (1) WO1992020061A1 (fr)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996037879A1 (fr) * 1995-05-26 1996-11-28 National Semiconductor Corporation Circuit generateur d'impulsions d'horloge pour un controleur d'affichage ayant une frequence de trames syntonisable fine
US5602567A (en) * 1993-12-15 1997-02-11 Mitsubishi Denki Kabushiki Kaisha Display monitor
EP0881621A1 (fr) * 1997-05-22 1998-12-02 Matsushita Electric Industrial Co., Ltd. Circuit d'ajustement de conversion de balayage pour un affichage à cristaux liquides
GB2328595A (en) * 1997-08-20 1999-02-24 Lg Electronics Inc Automatic picture adjustment system
US5900886A (en) * 1995-05-26 1999-05-04 National Semiconductor Corporation Display controller capable of accessing an external memory for gray scale modulation data

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4701753A (en) * 1985-10-01 1987-10-20 Zenith Electronics Corporation Video display terminal with multi frequency dot clock
GB2235358A (en) * 1989-08-10 1991-02-27 Apple Computer Computer with self-configuring video circuitry

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4701753A (en) * 1985-10-01 1987-10-20 Zenith Electronics Corporation Video display terminal with multi frequency dot clock
GB2235358A (en) * 1989-08-10 1991-02-27 Apple Computer Computer with self-configuring video circuitry

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
IBM TECHNICAL DISCLOSURE BULLETIN, Vol. 32, No. 3, August 1989.: "LDC Controller having Digital PLL", see page 256 - page 259. *

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5602567A (en) * 1993-12-15 1997-02-11 Mitsubishi Denki Kabushiki Kaisha Display monitor
WO1996037879A1 (fr) * 1995-05-26 1996-11-28 National Semiconductor Corporation Circuit generateur d'impulsions d'horloge pour un controleur d'affichage ayant une frequence de trames syntonisable fine
US5821910A (en) * 1995-05-26 1998-10-13 National Semiconductor Corporation Clock generation circuit for a display controller having a fine tuneable frame rate
US5900886A (en) * 1995-05-26 1999-05-04 National Semiconductor Corporation Display controller capable of accessing an external memory for gray scale modulation data
EP0881621A1 (fr) * 1997-05-22 1998-12-02 Matsushita Electric Industrial Co., Ltd. Circuit d'ajustement de conversion de balayage pour un affichage à cristaux liquides
US6175347B1 (en) 1997-05-22 2001-01-16 Matsushita Electric Industrial Co., Ltd. Liquid crystal display apparatus
GB2328595A (en) * 1997-08-20 1999-02-24 Lg Electronics Inc Automatic picture adjustment system
GB2328595B (en) * 1997-08-20 2000-01-12 Lg Electronics Inc Automatic picture adjustment system for monitor

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FI912041A (fi) 1992-10-27
JPH06506783A (ja) 1994-07-28
CA2104385A1 (fr) 1992-10-27
DE4291346T1 (de) 1994-02-17
AU1438192A (en) 1992-12-21
GB2272136B (en) 1995-05-17
GB9317528D0 (en) 1993-10-27
GB2272136A (en) 1994-05-04
FI912041A0 (fi) 1991-04-26
FI91197B (fi) 1994-02-15
FI91197C (fi) 1994-05-25

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