WO1991014284A1 - Dispositif a couplage de charge a jonctions de schottky - Google Patents

Dispositif a couplage de charge a jonctions de schottky Download PDF

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Publication number
WO1991014284A1
WO1991014284A1 PCT/AU1991/000078 AU9100078W WO9114284A1 WO 1991014284 A1 WO1991014284 A1 WO 1991014284A1 AU 9100078 W AU9100078 W AU 9100078W WO 9114284 A1 WO9114284 A1 WO 9114284A1
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Prior art keywords
array
ccd
schottky junction
schottky
transfer
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PCT/AU1991/000078
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English (en)
Inventor
Ulrich Theden
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Unisearch Limited
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Publication date
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Publication of WO1991014284A1 publication Critical patent/WO1991014284A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/148—Charge coupled imagers
    • H01L27/14875—Infrared CCD or CID imagers

Definitions

  • the present invention relates generally to the design and fabrication of a Schottky Junction Charge Coupled Device, and more particularly, but not exclusively, to a 5 Schottky Junction Charge Coupled Device arranged as a photo-optic detector, particularly to the design and fabrication of detector arrangements using low Schottky barrier height metal silicide layers on a silicon substrate for infra-red (IR) detection, wherein each of
  • the detector elements in the arrangement forms one of a plurality of Schottky gates for infra-red sensitive Schottky Charge Coupled Devices.
  • CCD Device 15 Device
  • This detector array architecture is known as the "interline transfer scheme”. Due to the area occupied by the shift registers, the detector fill
  • 20 factor (the ratio of active detector area to the area of the whole device) is, in practice, in the order of less than 50%.
  • the fill factor is the use of separate planes, one for Schottky silicide IR detection, and the other one as a silicon multiplexer network, bonded together with indium bumps, as described in US Patent No. 4,531,055.
  • Another approach is to use micro-lenses on the device backside.
  • SUBSTITUTE SHEET infra-red detection and charge transfer comprises a series of Schottky silicide gates in a Junction CCD arrangement.
  • the metal silicide layers of each gate are separated from each other by a gap of a few microns.
  • Another device described in Australian Patent No. 579027 comprises a series of Schottky silicide gates which are separated from each other by MOS-type poly-silicon gates of a few microns to form a linear CCD.
  • the area required by the MOS gates decreases the available space for the infra-red sensitive Schottky silicide gates.
  • each linear CCD column is separated by channel stop diffusions of the opposite polarity as the CCD channel implant.
  • each gate also requires a guard barrier of opposite polarity implant at either side of the CCD gate, to prevent edge leakage current.
  • the areas under the MOS poly-silicon gates and gaps between the metal silicide layers, and the areas covered by the channel stop diffusion and guard barriers, are non infra-red sensitive.
  • the present invention addresses solutions to the problems associated with this edge leakage current of reversed bias low Schottky barrier height metal gates on p-type silicon, which is prevented in conventional Schottky infra-red detectors by implanted guard rings.
  • the present invention provides a Schottky Junction CCD array comprising a plurality of Schottky Junction transfer gates on a semiconductor substrate, the array comprising at least two adjacent linear CCDs, each CCD comprising a plurality of adjacent Schottky Junction transfer gates, the adjacent CCDs being separated by a low dose semiconductor impurity implant of the same polarity as a higher dose buried channel implant used in the CCD channel.
  • Each Schottky Junction transfer gate preferably comprises a metal silicide layer over a semiconductor impurity implant.
  • the metal silicide layers of adjacent gates extend in strips across adjacent CCDs.
  • adjacent Schottky Junction transfer gates in each CCD are separated from each other by only sub-micron wide gaps. Silicon dioxide spacers are preferably used to separate the adjacent gates. Previously, adjacent gates in each CCD were separated by gaps of a few microns.
  • the Schottky Junction transfer gates are infra-red sensitive gates which are arranged to operate in a first mode as IR detection elements and in a second mode as gates of a CCD shift register.
  • the Schottky Junction CCD array is preferably a "frame transfer device".
  • an array of infra-red sensitive Schottky CCD gates is connected to an array of non-sensitive Schottky CCD gates for frame storage.
  • the frame of information can then be read out line by line through a Schottky gate read-out CCD.
  • the frame storage array could comprise an array of infra-red sensitive Schottky CCD gates shielded from IR radiation so they act as a storage array for charge from the array exposed to IR.
  • the semiconductor substrate preferably comprises n-type silicon and the CCD is formed by a p-type implant on the n-type silicon.
  • the present invention further provides a Schottky Junction CCD array comprising a plurality of Schottky
  • each CCD comprising a plurality of adjacent Schottky Junction transfer gates
  • each Schottky Junction transfer gate comprising a layer of metal silicide over a semiconductor impurity implant, the metal silicide layers of adjacent gates extending in strips across adjacent CCDs in the array.
  • the adjacent CCDs are separated by a low dose semiconductor impurity implant of the same polarity as a higher dose buried channel implant used in the CCD channel.
  • the device may also include sub-micron wide gaps between adjacent gates and may be a frame transfer device, and preferably the gates are IR sensitive, as discussed above.
  • An advantage of having the layer of silicide extending all the way across the CCD array is that the whole array underneath the silicide strip will be IR sensitive, unlike the case in the prior art where silicide layers of adjacent CCD columns are separated by a channel stop diffusion and also by opposite polarity implant guard rings.
  • the present invention yet further provides a Schottky Junction CCD array comprising a plurality of Schottky Junction transfer gates, on a semiconductor substrate, the array comprising at least two adjacent linear CCDs, each CCD comprising a plurality of adjacent Schottky Junction transfer gates, adjacent Schottky Junction transfer gates within the CCD being separated from each other by a gap of a micron or less wide in the direction of charge transfer.
  • the gap is preferably of sub-micron dimension. Silicon dioxide spacers are preferably used to separate adjacent gates.
  • Adjacent CCDs may be separated by a low dose semiconductor impurity implant, metal silicide layers forming the Schottky Junction transfer gates may extend across adjacent CCDs, and the array may be a frame transfer device, and preferably the gates are IR sensitive, as discussed above.
  • An advantage of having adjacent gates separated by gaps of sub-micron dimension is that inversion layers caused by the reverse bias voltage connected to the silicide gates are formed in an overlapping manner, and guard rings are not needed. This also leads to more efficient charge transfer.
  • the silicon dioxide spacers may be removed by etching, i.e. the Si ⁇ 2 spacers would only be used during the manufacturing process for the array.
  • the present invention yet further provides a frame transfer Schottky Junction CCD array comprising an upper array and a lower array, the upper array comprising at least two adjacent linear CCDs, each CCD comprising a plurality of adjacent Schottky Junction transfer gates on a semiconductor substrate, said transfer gates being radiation sensitive and being arranged to operate in a first mode as radiation detection elements and in a second mode as gates of a CCD shift register, and the lower frame comprising at least two adjacent linear CCDs, each comprising a plurality of adjacent Schottky Junction transfer gates, each upper CCD being able to transfer charge into a respective lower frame CCD for storage.
  • the upper array gates are preferably IR sensitive. In at least the upper frame array it is preferred that adjacent CCDs are separated by a low dose semiconductor impurity implant. It is also preferred that, in at least the upper array, that adjacent transfer gates in each CCD are separated by a gap of sub-micron width dimension. It is also preferred that, in at least the upper array, that metal silicide layers forming part of the transfer gates extend across the array over adjacent CCDs.
  • both arrays include all the above features.
  • An advantage of arranging the device as a frame transfer device is that similar fabrication techniques may be used for each array of the frame, which leads to ease of manufacture. In order to prevent the lower array producing charge it may be shielded from incident radiation..
  • a CCD array comprising adjacent radiation sensitive CCDs which are separated by a low dose impurity implant, adjacent gates being separated by a silicon dioxide spacer, results in a "Fully Integrated Schottky Array" (FISA), with a detector array of almost 100% fill factor.
  • FISA Fluly Integrated Schottky Array
  • a further advantage is that the FISA does not need metal oxide semiconductor type gates for separating the individual Schottky gates.
  • the whole matrix of Schottky CCDs including the channel separation implant may be infra-red sensitive. Only a small fraction under the sub-micron spacers separating the Schottky gates is non-infra-red sensitive. This leads to almost 100% detector fill factor.
  • Such an FISA is also only minimally affected by solar radiation because of the lack of gate oxides.
  • the Si ⁇ 2 spacers may be removed by etching in order to improve further resistance to solar radiation.
  • the present invention further provides a Schottky Junction charge coupled device infra-red imaging array having substantially continuous infra-red sensitive elements with a fill factor substantially greater than fifty percent, said imaging array comprising: a plurality of substantially contiguous conductive transfer electrodes disposed along a semiconductor substrate above a buried implant channel and providing means for serially shifting charge packets within the buried channel of said substrate when a sequence of control voltages is applied thereto, each of said substantially contiguous transfer elements forming a rectifying metal to semiconductor contact known as a Schottky contact and having a barrier height sufficiently low to cause the Schottky contact to respond to infra-red radiation of wavelength substantially greater than the band to band absorption cutoff wavelength of the semiconductor, said Schottky contact acting in a first mode as an infra-red detector element by photoemission of charge carriers from the metallic region of said Schottky contact to said buried channel of said semiconductor substrate and, in a second mode, to control movement of charge packets within said buried channel, operating in
  • the transfer electrodes being sufficiently thin to enable transmission of infra-red light and the dielectric layer forming an optical cavity on top of the transfer electrode, the buried implant channel comprising a central region of relatively high concentration dopant extending along the channel and bounded by regions of relatively low concentration dopant of the same polarity at its edges.
  • the present invention yet further provides a Schottky Junction charge coupled device infra-red imaging array having substantially contiguous infra-red sensitive elements with a fill factor substantially greater than fifty percent, said imaging array comprising: a plurality of substantially contiguous conductive transfer electrodes disposed along a semiconductor substrate above a buried implant channel and providing means for serially shifting charge packets within the buried channel of said substrates when a sequence of control voltages is applied thereto, each of said substantially contiguous transfer electrodes forming a rectifying metal to semiconductor contact known as a Schottky contact and having a barrier height sufficiently low to cause the Schottky contact to respond to infra-red radiation of wavelength substantially greater than the band to band absorption cutoff wavelength of the semiconductor, said Schottky contact acting in a first mode as an infra-red detector element by photoemission of charge carriers from the metallic region of said Schottky contact to said buried channel of said semiconductor substrate and, in a second mode, to control movement of charge packets within said
  • Figure 1 illustrates in cross section the basic structure of a single conventional metal-silicide Schottky barrier infra-red detector
  • Figure 2 illustrates in plan view the structure of a prior art Schottky Junction Charge Coupled Device.
  • Figure 3 schematically illustrates the layout of a frame transfer detector array designed in accordance with an embodiment of the present invention
  • Figures 3 and 4 A, B and C illustrate in plan view and cross-sections elements of the Fully Integrated
  • FIG. 1 The basic structure of a conventional metal silicide Schottky barrier infra-red detector is illustrated in Figure 1, from which it will be noted that photons of incident infra-red radiation 11 are transmitted from the back surface 12 of the detector to the silicide layer 13 via a dielectric anti-reflection coating 14 and a p-type silicon substrate 15.
  • Suicides of metals such as platinum or palladium are characterised by low Schottky barrier height for p-type silicon and are therefore suitable for the formation of infra-red sensitive detectors.
  • the quantum efficiency of the silicide infra-red detector is improved by putting an optical cavity on top of the thin silicide layer 13 comprising a dielectric layer 16 and an aluminium mirror 17.
  • a n-type guard ring 18 is integrated into the silicon substrate surrounding the edge of the silicide layer 13.
  • the metal-silicide having a low Schottky barrier height on p-type silicon is characterised by a high Schottky barrier height on n-type silicon, thus preventing leakage current within the n-type doped guard ring 18.
  • infra-red detector arrays such detectors are placed as an array, and the photo current of each individual detector is read-out by shift registers placed between the rows of detectors. Valuable space occupied by the shift registers can not be used for infra-red detection, leading to detector fill factors of less than 50%.
  • FIG 2 is a plan view of a portion of a prior art infra-red sensitive Schottky Junction CCD array such as the types disclosed in Australian Patent No. 579027.
  • the CCD array designated generally by reference numeral 100, is formed by p-type implants 101 (to form the CCD columns) on an n-type silicone substrate. It wold be possible to form the CCDs from n-type implants on p-type silicon, but the wavelength response for such a CCD will be unsatisfactory. To obtain the required wavelength sensitivity p-type implants on n-type silicon need to be used.
  • Each CCD gate is formed by a layer of metal silicide 102 over the channel implants 101 (suicides of metals such as platinum or palladium are suitable).
  • guard barriers 103 are formed at either side of the silicide 102. These guard barriers 103 are formed by n-type channel implants. Further, to separate each CCD column 101 channel stop diffusions 104 are required. These are also formed by n-type diffusions. The guard barriers 103 and channel stop diffusions 104 take up space that would otherwise be responsive to IR radiation, and reduce the fill factor of the CCD array. Overlying the CCD array will be a dielectric layer (not shown) and metallic contact layers (also not shown) connecting the CCDs up to two alternate phases of electrical potential (dia. 1, dia. 2) for operation of the device. The opposite side of the detector array may be coated with an anti-reflective layer.
  • the device operation is divided into two modes; the integration or detection mode and the read-out mode respectively.
  • the integration mode the silicide gates, and their respective overlying dielectric and metal layers, work, as infra-red detectors as described with reference to Fig. 1, where the silicide is an infra-red sensitive region and the dielectric with overlying metal may act as an optical cavity of the detector in addition to its main role.
  • the infra-red radiation coming from the substrate direction generates charges in the infra-red sensitive region where positive charges (holes) are ejected to the p-type channel.
  • the charges When the phase 1 is "on" during the integration mode, the charges will accumulate in the well regions of the gates connected to that phase and they will choose the shortest way to go to these regions of lowest potential from the regions where they were generated.
  • the second mode of operation is initiated, within which the accumulated charge is read out to the output stage.
  • the device has either to be covered from infra-red light (by a shutter) to prevent additional charge generation thus avoiding image "smear", or alternatively it is possible to avoid the use of the shutter by very fast transfer of the changes rom the horizontal lines into a conventional CCD array (non-detecting) for later slow read-out.
  • the silicide gates work as junction gates of a junction CCD.
  • the silicide-silicon Schottky Junction behaves as a reverse biased p-n junction and is used in that capacity for charge transfer in the infra-red Schottky Junction CCD.
  • the Fully Integrated Schottky Array should best be implemented as a frame transfer architecture, since metal-silicide Schottky CCDs in accordance with the present invention can be used for both infra-red detection and signal shift registers.
  • An array of IR-sensitive Schottky silicide gates for IR imaging and frame transfer 21 is connected to an array of non-lR-sensitive CCDs for frame storage 22, before line-by-line read-out through a further CCD 23.
  • the CCDs in the image part must abandon the use of MOS-type gates, and use Schottky gates only.
  • the Schottky gates would be formed by using low Schottky barrier height suicides such as platinum silicide for maximum infra-red response.
  • silicide for the CCDs within the frame storage area 22, and for the read-out CCD 23, would be formed by using metals which have a high Schottky barrier height, for minimal infra-red response and low dark current.
  • the FISA is easy to fabricate, leading to high fabrication yields.
  • the lack of gate oxides increases the storage capacity of the Schottky CCDs compared to conventional buried channel CCDs, leads automatically to anti-blooming behaviour, and makes the device more radiation resistant.
  • FIG. 4 A, B and C, in plan view (A) and cross section (Fig. 4B is a cross-section along line B-B of Fig. 4A, and Fig. 4C is a cross-section along line C-C of Fig. 4A) the layout of a detector cell of the proposed FISA device.
  • Starting material for the detector device is n-type silicon 30. Boron is implanted across the CCD matrix. A Si ⁇ 2 layer, patterned between the CCD channels, masks against the first boron channel implant, while the silicon substrate 30 within the channel areas is uncovered by this masking oxide. This leads to a light boron dose 31 between the CCD channels and a heavier boron dose within the channel areas 32.
  • the light boron dose area 31 willbe about a half of the concentration of the heavy boron dose area 32, for example, although it may vary from this.
  • This distinct implant profile has two purposes: (1) The heavy implant keeps the charges within the CCD channel 32, while the light implant acts as a channel separation 31; (2) Schottky gates 33 formed later on this p-type implant do not need guard rings for each individual CCD gate, since silicide areas may stretch on uninterrupted p-implanted silicon across the whole device. Channel stop diffusions of the opposite polarity than the channel implant, as used in conventional CCDs
  • the light implant used in the present invention is also infra-red sensitive - leading to increased detector fill factor.
  • the gaps between adjacent Schottky gates 33 have to be made very small, preferably in the sub-micron range, if high transfer efficiency is to be achieved.
  • Schottky gates which lie directly on silicon can be separated by spacers 34 of grown or deposited silicon-dioxide (Si ⁇ 2)» patterned by electron-beam exposure, X-ray exposure, deep UV exposure, or other patterning techniques leading to sub-micron wide Si ⁇ 2 lines 34 across the CCD matrix perpendicular to the CCD channel direction.
  • Metals having low Schottky barrier heights such as platinum on p-type silicon, form platinum-silicide (PtSi) only on exposed silicon and not on Si ⁇ 2» and the PtSi Schottky gates are thus separated by sub-micron Si ⁇ 2-spacers 34.
  • PtSi platinum-silicide
  • Other metals which form high Schottky barrier height suicides would be suitable for the CCD matrix 22 ( Figure 2) as frame storage CCDs or for the read-out CCD 23 ( Figure 2). If the Schottky CCD is supposed to be operated as a two-phase CCD shift register, then the CCD p-type channel implant needs two distinct regions under each Schottky gate for a unique charge transfer direction.
  • This channel implant has to be aligned exactly to the sub-micron Schottky gate spacers 34.
  • This second p-type implant leads to three distinguishable p-implanted areas; a light implant 31 between the CCD channels 32, a medium implant 35 for the charge barrier areas within the channel under each gate, and a heavy implant dose for the charge storage areas 36 under each Schottky gate.
  • an aluminium layer 39 is patterned as stripes over each silicide gate 33 on top of a dielectric layer 37, interconnecting the PtSi gates of the same phase through contact holes 38.
  • the dielectric layer 37 acts, together with the aluminium layer 39 on top of it, as the optical cavity, enhancing the detector quantum efficiency (i.e. it provides an optical cavity and reflective layer, designed to reflect photos of light back towards the section layer).
  • an anti-reflective coating 40 may be provided on the opposite, radiation receiving side of the device.
  • the advantage of having uninterrupted silicide gates 33 lying on uninterrupted p-implanted silicon 31,35,36 across the entire width of the device is that the PtSi Schottky gates do not need guard rings for each individual pixel. Only at the edge of the CCD array a structure is needed to prevent edge leakage current and edge breakdown while the Schottky gates 33 are reverse biased during operation.
  • This leakage current can be reduced by implanting a shallow n-type layer at the end of each Schottky gate at the edge of the array into the p-type channel implant, or by replacing the low Schottky barrier height PtSi at the end of each gate by a metal silicide having a high Schottky barrier height on p-type silicon.
  • the silicide gate edges facing the silicon dioxide spacer 34 do not need guard rings, since the gates are only separated by sub-micron spacers, and therefore form overlapping depletion regions when reverse biased.
  • the operation of the image part 21 ( Figure 2) of the FISA is divided into two modes: the detection mode and the frame transfer mode. During the detection mode the Schottky gates of one phase (e.g.
  • dia.l would be reverse biased.
  • the infra-red radiation coming from the substrate direction generates electron-hole pairs in the metal- silicide layer, as described for Figure 1. Electrons which stay in the silicide layer, are absorbed by the applied bias voltage, while positive charges (holes) are ejected into the p-type implanted layer and stored in the "buried" channel potential well. After the detection mode, the phases are alternatingly pulsed, as in conventional buried channel CCDs, thus shifting the potential wells and stored holes along the Schottky CCD channels. This way, the whole frame of an infra-red image is shifted into the storage CCDs 22 ( Figure 2).
  • a generalized process for the fabrication of a Schottky Junction CCD array in accordance with the present invention may include the following items:
  • a second p-type implant to define the CCD channels using a silicon dioxide or photoresist mask to define the areas of light and heavy concentration doping.
  • a third p-type implant to define the p-type concentration profile within each CCD channel, using masks to form the storage and barrier areas under each Schottky gate. [Note that this is only necessary for two phase CCD operation, as is described herein. It is also possible to have a four phase device, in which case the third p-type implant step is not necessary, although four different phases of electrical potential are] 4. Silicons! dioxide deposition and sub-micron patterning to form sub-micron spacers between Schottky gates. This submission patterning may be carried out using such techniques as electron-beam exposure. X-ray exposure, etc.
  • the present invention cannot only be applied in the area of IR detection arrays, but is also applicable to Schottky Junction CCD arrays in general and also photo-optic detectors outside the IR range.
  • the array in accordance with the present invention may be mounted in a device having a lens or other means for focussing radiation on the array.

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  • Engineering & Computer Science (AREA)
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Abstract

Réseau à couplage de charge à jonctions de schottky comprenant une pluralité de dispositifs à couplage de charge à jonctions de schottky adjacents sensibles infrarouges, et lesquels sont séparés par un implant à faible dose d'impuretés (31) de la même polarité qu'un implant à dose supérieure (35, 36) dans le canal à couplage de charge (32). Les barrières individuelles se composent d'une couche de siliciure de métal sur le substrat à semi-conducteur. La couche de siliciure s'étend sur la totalité du réseau. De plus, ces bandes de siliciure sont séparées par des espaces (34) de dimensions inférieures au micron. Cet agencement permet d'obtenir un facteur de remplissage du réseau de 100 %. Presque tout le réseau est sensible aux infrarouges.
PCT/AU1991/000078 1990-03-06 1991-03-06 Dispositif a couplage de charge a jonctions de schottky WO1991014284A1 (fr)

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US20130001729A1 (en) * 2008-03-06 2013-01-03 Sionyx, Inc. High Fill-Factor Laser-Treated Semiconductor Device on Bulk Material with Single Side Contact Scheme
US9496308B2 (en) 2011-06-09 2016-11-15 Sionyx, Llc Process module for increasing the response of backside illuminated photosensitive imagers and associated methods
US9673243B2 (en) 2009-09-17 2017-06-06 Sionyx, Llc Photosensitive imaging devices and associated methods
US9673250B2 (en) 2013-06-29 2017-06-06 Sionyx, Llc Shallow trench textured regions and associated methods
US9741761B2 (en) 2010-04-21 2017-08-22 Sionyx, Llc Photosensitive imaging devices and associated methods
US9762830B2 (en) 2013-02-15 2017-09-12 Sionyx, Llc High dynamic range CMOS image sensor having anti-blooming properties and associated methods
US9761739B2 (en) 2010-06-18 2017-09-12 Sionyx, Llc High speed photosensitive devices and associated methods
US9905599B2 (en) 2012-03-22 2018-02-27 Sionyx, Llc Pixel isolation elements, devices and associated methods
US9911781B2 (en) 2009-09-17 2018-03-06 Sionyx, Llc Photosensitive imaging devices and associated methods
US9939251B2 (en) 2013-03-15 2018-04-10 Sionyx, Llc Three dimensional imaging utilizing stacked imager devices and associated methods
US10244188B2 (en) 2011-07-13 2019-03-26 Sionyx, Llc Biometric imaging devices and associated methods
US10361083B2 (en) 2004-09-24 2019-07-23 President And Fellows Of Harvard College Femtosecond laser-induced formation of submicrometer spikes on a semiconductor substrate
US10374109B2 (en) 2001-05-25 2019-08-06 President And Fellows Of Harvard College Silicon-based visible and near-infrared optoelectric devices
CN113113441A (zh) * 2021-04-13 2021-07-13 中国电子科技集团公司第四十四研究所 一种避免边缘出现杂散信号的背照式ccd结构

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US10374109B2 (en) 2001-05-25 2019-08-06 President And Fellows Of Harvard College Silicon-based visible and near-infrared optoelectric devices
US10361083B2 (en) 2004-09-24 2019-07-23 President And Fellows Of Harvard College Femtosecond laser-induced formation of submicrometer spikes on a semiconductor substrate
US10741399B2 (en) 2004-09-24 2020-08-11 President And Fellows Of Harvard College Femtosecond laser-induced formation of submicrometer spikes on a semiconductor substrate
US20130001729A1 (en) * 2008-03-06 2013-01-03 Sionyx, Inc. High Fill-Factor Laser-Treated Semiconductor Device on Bulk Material with Single Side Contact Scheme
US9911781B2 (en) 2009-09-17 2018-03-06 Sionyx, Llc Photosensitive imaging devices and associated methods
US10361232B2 (en) 2009-09-17 2019-07-23 Sionyx, Llc Photosensitive imaging devices and associated methods
US9673243B2 (en) 2009-09-17 2017-06-06 Sionyx, Llc Photosensitive imaging devices and associated methods
US10229951B2 (en) 2010-04-21 2019-03-12 Sionyx, Llc Photosensitive imaging devices and associated methods
US9741761B2 (en) 2010-04-21 2017-08-22 Sionyx, Llc Photosensitive imaging devices and associated methods
US9761739B2 (en) 2010-06-18 2017-09-12 Sionyx, Llc High speed photosensitive devices and associated methods
US10505054B2 (en) 2010-06-18 2019-12-10 Sionyx, Llc High speed photosensitive devices and associated methods
US10269861B2 (en) 2011-06-09 2019-04-23 Sionyx, Llc Process module for increasing the response of backside illuminated photosensitive imagers and associated methods
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