WO1991006924A1 - Generateur de caracteres rapide - Google Patents

Generateur de caracteres rapide Download PDF

Info

Publication number
WO1991006924A1
WO1991006924A1 PCT/US1990/006212 US9006212W WO9106924A1 WO 1991006924 A1 WO1991006924 A1 WO 1991006924A1 US 9006212 W US9006212 W US 9006212W WO 9106924 A1 WO9106924 A1 WO 9106924A1
Authority
WO
WIPO (PCT)
Prior art keywords
font
character
bit
memory means
identifier code
Prior art date
Application number
PCT/US1990/006212
Other languages
English (en)
Inventor
David J. Statt
Original Assignee
Eastman Kodak Company
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Eastman Kodak Company filed Critical Eastman Kodak Company
Publication of WO1991006924A1 publication Critical patent/WO1991006924A1/fr

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K15/00—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers
    • G06K15/02—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers
    • G06K15/12—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers by photographic printing, e.g. by laser printers
    • G06K15/128—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers by photographic printing, e.g. by laser printers generating or processing printable items, e.g. characters
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K15/00—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers
    • G06K15/02—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/393—Arrangements for updating the contents of the bit-mapped memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K2215/00—Arrangements for producing a permanent visual presentation of the output data
    • G06K2215/0002—Handling the output data
    • G06K2215/002—Generic data access
    • G06K2215/0028—Generic data access characterised by the format per se

Definitions

  • This invention relates to all points addressable printers and, more particularly, to a bit map character generator for generating the printing signals that are supplied to a marking engine in such a printer.
  • FIGS. 2 and 3 show typical bit maps of a letter "A" in both normal portrait and normal landscape mode respectively.
  • the traditional em square storage format is indicated by solid line 10, compared with a reduced storage format indicated by dashed line 12 of the type described in the Rider et al patent.
  • Each bit within the character is represented in memory as a 1, and each bit outside the character within the rectangular boundary of the character is represented as a zero.
  • the storage requirements for the characters can be considerably reduced by eliminating surrounding areas that would consist only of zeros.
  • FIG. 4 is a simplified block diagram of a prior art character generator of the type shown in U.S. Patent 4,079,458 employing the reduced format bit map fonts.
  • the character generator includes a master processor 20 that receives print commands from an input device (not shown) , such as a personal computer.
  • the master processor 20 typically comprises a programmed microprocessor.
  • a look-up table 22 contains font parameters such as character height, width, and font address, and font statistics such as the character alignment ( ⁇ x, ⁇ y) .
  • ⁇ x, ⁇ y define the alignment of the lower left corner of the reduced format bit map with respect to the baseline location of where the character should be placed.
  • the master processor 20 retrieves the character parameters and statistics from the look-up table 22 by addressing the look-up table with a character identifier (ID) such as ASCII code.
  • ID character identifier
  • the master processor 20 computes the x,y page location for the character, using the character statistics, and sends the height, width, font address, and the x,y page location of the character to a bit map character generator 24.
  • the bit map character generator 24 employs the font address and the character height and width, to retrieve the character bit map from a font memory 26 and sends the bit map to a buffer memory 27 and from there to a marking engine (not shown) .
  • the buffer memory 27 may comprise a line or page buffer, depending on the design of the character generator. Since the master processor 20 is a programmed microprocessor, each font parameter look-up takes a separate sequence of machine instructions, which consume processor time and limit the speed of character generation. It is therefore the object of the present invention to provide an improved character generator of the type employing a reduced font.
  • the object is achieved according to the present invention by providing a memory containing width, height and font address data for each character to be generated by the character generator.
  • the random access memory is addressed by the master processor with a character identifier code, and in response directly supplies the character width, height and font address information to the bit map character generator, thereby increasing the overall speed of character generation.
  • a separate random access memory is provided for width, height and font address data, and the memories are addressed in parallel with the character identifier.
  • the font memory associated with the bit map character generator contains a plurality of fonts, and the font address information is generated by combining a font selection code with a standard character code such as ASCII to produce a composite character identifier which become the address applied to the random access memories.
  • the random access memories are dual ported so that their contents can be altered by the master processor to accommodate new fonts.
  • FIG. 1 is a schematic diagram showing a bit map character generator according to the present invention
  • FIG. 2 is a diagram comparing a traditional em square font with the reduced font employed by the present invention in the normal portrait mode
  • FIG. 3 is a diagram comparing a traditional em square font with the reduced font in the landscape mode
  • FIG. 4 is a schematic diagram illustrating a bit map character generator representative of the prior art.
  • FIG. 5 is a schematic diagram illustrating the apparatus for switching between font modes according to the present invention.
  • FIG. 1 a character generator according to the present invention is shown, where elements similar to those in FIG. 4 are similarly numbered.
  • the look-up table 22 associated with the master processor 20 contains only the font statistics
  • ⁇ x, ⁇ y, and character space employed in calculating the x,y location where the reduced storage bit map should be printed and which are sent to the bit map character generator 24.
  • the font parameters required by the bit map character generator 24 are provided by random access memories (RAM) 28, 30, and 32 which contain the character width W (in bits), character height (H in words), and the character starting address (FA) in the font memory 26 respectively.
  • RAMs 28, 30 and 32 are simultaneously addressed by the master processor 20 with a character identifier (ID) .
  • ID character identifier
  • the outputs of RAMs 28, 30 and 32 are supplied directly to the bit map character generator 24, along with the x,y character location information calculated as described above.
  • the bit map character generator 24 Upon receiving the font parameters, the bit map character generator 24 retrieves the first word of the character stored in the font memory 26 at the location FA, and sends the word to page memory at location x,y.
  • bit map character generator 24 retrieves the word of the character at location FA+1 in the font memory and sends it to location x+16,y in the page memory.
  • font memory 26 In a preferred embodiment of the present invention, several character fonts are stored in font memory 26.
  • a font identification code is combined with a character identification code and the combined identifier is applied to the width, height and font address RAMs 28, 30 and 32.
  • a seven bit ASCII character identifier is combined with a six bit font identifier to form a thirteen bit ID that is applied to the RAMs. Since the font identifier is changed relatively infrequently with respect to the character identifier, the font identifier is generated once by the master processor 20 and stored in a latch until changed. Provision is also made for switching between the seven bit ASCII character identifier commonly employed in the U.S., and the eight bit extended ASCII character identifier commonly employed in Europe.
  • FIG. 5 is a schematic diagram illustrating the apparatus for latching the font identifier and switching between the seven bit ASCII mode and the eight bit ASCII mode.
  • An eight bit character identifier signal is supplied from the master processor 20 on lines 40 to a bit combiner 42.
  • In the eight bit extended ASCII mode all eight bits are used.
  • In the seven bit ASCII mode only the first seven bits are used.
  • a six bit font identifier is supplied on line 44 to a latch 46. All •six bits of the font identifier may be employed with the seven bit ASCII code, but only five bits of the font identifier are employed with the eight bit extended ASCII code.
  • a mode switch 48 controlled by the master processor 20 is switchable between the eighth bit of the character identifier code and the sixth bit of the font identifier code.
  • the mode switch is employed to select the appropriate character and font identifier bits depending on the type of fonts stored in the font memory 26.
  • the RAMs 28, 30 and 32 and the font memory 26 are dual ported to the master processor 20 so that new fonts can be easily loaded into the memory.
  • the character generator according to the present invention is useful in an all points addressable printer and is advantageous in that characters can be rapidly generated for higher printing speeds.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Optics & Photonics (AREA)
  • Controls And Circuits For Display Device (AREA)

Abstract

On décrit une amélioration relative à un générateur de caractères rapide du type qui utilise des caractères de police réduits. Les paramètres de la police sont contenus dans une mémoire à accès sélectif que l'on adresse à l'aide d'un processeur maître et qui envoie les paramètres de la police directement à un générateur de caractères en mode point.
PCT/US1990/006212 1989-11-02 1990-10-31 Generateur de caracteres rapide WO1991006924A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US43054289A 1989-11-02 1989-11-02
US430,542 1989-11-02

Publications (1)

Publication Number Publication Date
WO1991006924A1 true WO1991006924A1 (fr) 1991-05-16

Family

ID=23707975

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1990/006212 WO1991006924A1 (fr) 1989-11-02 1990-10-31 Generateur de caracteres rapide

Country Status (3)

Country Link
EP (1) EP0451250A1 (fr)
JP (1) JP2872808B2 (fr)
WO (1) WO1991006924A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0901116A2 (fr) * 1997-09-03 1999-03-10 Nec Corporation Appareil et méthode de traitement graphique

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4079458A (en) * 1976-08-11 1978-03-14 Xerox Corporation High resolution character generator
US4234931A (en) * 1977-08-11 1980-11-18 Canon Kabushiki Kaisha Information output apparatus for putting out a character dot pattern
US4694405A (en) * 1985-07-09 1987-09-15 Office Automation Systems, Inc. Laser printer controller data alignment device
US4843405A (en) * 1987-06-12 1989-06-27 Minolta Camera Kabushiki Kaisha Method of controlling reproduction of image in bit-map controlled laser printer
US4845656A (en) * 1985-12-12 1989-07-04 Kabushiki Kaisha Toshiba System for transferring data between memories in a data-processing apparatus having a bitblt unit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4079458A (en) * 1976-08-11 1978-03-14 Xerox Corporation High resolution character generator
US4234931A (en) * 1977-08-11 1980-11-18 Canon Kabushiki Kaisha Information output apparatus for putting out a character dot pattern
US4694405A (en) * 1985-07-09 1987-09-15 Office Automation Systems, Inc. Laser printer controller data alignment device
US4845656A (en) * 1985-12-12 1989-07-04 Kabushiki Kaisha Toshiba System for transferring data between memories in a data-processing apparatus having a bitblt unit
US4843405A (en) * 1987-06-12 1989-06-27 Minolta Camera Kabushiki Kaisha Method of controlling reproduction of image in bit-map controlled laser printer

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0901116A2 (fr) * 1997-09-03 1999-03-10 Nec Corporation Appareil et méthode de traitement graphique
EP0901116A3 (fr) * 1997-09-03 2000-03-29 Nec Corporation Appareil et méthode de traitement graphique
US6166747A (en) * 1997-09-03 2000-12-26 Nec Corporation Graphics processing method and apparatus thereof
CN1118040C (zh) * 1997-09-03 2003-08-13 日本电气株式会社 图形处理方法与装置

Also Published As

Publication number Publication date
EP0451250A1 (fr) 1991-10-16
JPH04503037A (ja) 1992-06-04
JP2872808B2 (ja) 1999-03-24

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