WO1990008402A1 - Fet transistor and liquid crystal display device obtained by using the same - Google Patents

Fet transistor and liquid crystal display device obtained by using the same Download PDF

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Publication number
WO1990008402A1
WO1990008402A1 PCT/JP1990/000017 JP9000017W WO9008402A1 WO 1990008402 A1 WO1990008402 A1 WO 1990008402A1 JP 9000017 W JP9000017 W JP 9000017W WO 9008402 A1 WO9008402 A1 WO 9008402A1
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Prior art keywords
film
semiconductor layer
liquid crystal
conjugated polymer
electrode
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PCT/JP1990/000017
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French (fr)
Japanese (ja)
Inventor
Toshihiko Tanaka
Syuji Doi
Hiroshi Koezuka
Akira Tsumura
Hiroyuki Fuchigami
Original Assignee
Mitsubishi Denki Kabushiki Kaisha
Sumitomo Chemical Company, Limited
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Application filed by Mitsubishi Denki Kabushiki Kaisha, Sumitomo Chemical Company, Limited filed Critical Mitsubishi Denki Kabushiki Kaisha
Publication of WO1990008402A1 publication Critical patent/WO1990008402A1/en
Priority to US09/228,936 priority Critical patent/US6060338A/en
Priority to US09/228,937 priority patent/US6060333A/en

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having a potential-jump barrier or a surface barrier
    • H10K10/40Organic transistors
    • H10K10/46Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having a potential-jump barrier or a surface barrier
    • H10K10/40Organic transistors
    • H10K10/46Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462Insulated gate field-effect transistors [IGFETs]
    • H10K10/466Lateral bottom-gate IGFETs comprising only a single gate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K19/00Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00
    • H10K19/10Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00 comprising field-effect transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/10Organic polymers or oligomers
    • H10K85/111Organic polymers or oligomers comprising aromatic, heteroaromatic, or aryl chains, e.g. polyaniline, polyphenylene or polyphenylene vinylene
    • H10K85/113Heteroaromatic compounds comprising sulfur or selene, e.g. polythiophene
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/10Organic polymers or oligomers
    • H10K85/111Organic polymers or oligomers comprising aromatic, heteroaromatic, or aryl chains, e.g. polyaniline, polyphenylene or polyphenylene vinylene
    • H10K85/114Poly-phenylenevinylene; Derivatives thereof
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/133302Rigid substrates, e.g. inorganic substrates

Definitions

  • the present invention relates to a field-effect transistor using an organic semiconductor (hereinafter abbreviated as an FET element) and a liquid crystal display device using the same as a driving element.
  • an FET element organic semiconductor
  • FET devices using silicon or GaAs single crystal as a semiconductor layer have been known and have been put to practical use. In these devices, not only is the material used expensive, but also the device fabrication process is very complicated. However, the area in which devices can be incorporated is limited by the size of the wafer. For example, in the case of manufacturing an active drive element used for a large-screen liquid crystal display element, as long as the above-described wafer is used, there are significant restrictions on price, surface area, and area. There is. Due to such restrictions, at present, as a FET element used as a driving element in a liquid crystal display element, a thin film transistor using amorphous silicon is used as an FET element.
  • a ⁇ -conjugated polymer has a chemical structure skeleton consisting of conjugated double bonds and triple bonds.
  • the valence band and conduction band formed by the overlapping of 7 ⁇ -electron orbitals, and It is thought to have a band structure consisting of a forbidden band separating them.
  • the forbidden band varies depending on the material, but is in the range of 1 to 4 eV for most 7 ⁇ -conjugated polymers. For this reason, 7 ⁇ -conjugated polymers themselves show only an insulator or a near-conductivity to it.
  • the removal of electrons from the valence band (oxidation) or the injection of electrons into the conduction band (reduction) by chemical, electrochemical, or physical methods.
  • doping is described as producing a carrier (carrier) that carries charges.
  • carrier carrier
  • the amount of doping can be controlled. Therefore, the conductivity can be arbitrarily changed over a wide range from the insulator region to the metal region.
  • the 7 ⁇ -conjugated polymer obtained when doping is oxidized becomes p-type, and in the case of reduction, it becomes n-type. This is similar to impurity addition in inorganic semiconductors. For this reason, various semiconductor devices using a 7 ⁇ -conjugated polymer as a semiconductor material can be manufactured.
  • F ⁇ element using a ⁇ -conjugated polymer as a semiconductor polyacetylene (Journal of Applied Physics, J. Appl.
  • FIG. 15 is a sectional view of a conventional FET device using polyacetylene.
  • 1 is a glass serving as a substrate
  • 2 is an aluminum film serving as a gate electrode
  • 3 is a polysiloxane film serving as an insulating film
  • 4 is a semiconductor layer.
  • 5 and 6 are gold films serving as a source electrode and a drain electrode, respectively.
  • FIG. 16 is a cross-sectional view of an FET element having a semiconductor layer of poly (N-methylpyrrole) or polyphene.
  • reference numeral 3 denotes a silicon oxide film serving as an insulating film
  • 4 denotes a poly (N-methylpyrrole) film or a polyolefin film serving as a semiconductor layer
  • 5 and Reference numeral 6 denotes a gold film serving as a source electrode and a drain electrode
  • 1 denotes a silicon plate serving both as a substrate and a gate electrode
  • 2 denotes a silicon plate 7 in sonic contact. It is a metal for removing When poly (N-methylpyrrole) is used as the semiconductor layer, the current flowing between the source electrode 5 and the drain electrode 6 through the semiconductor layer 4 (conductivity) Since it can be controlled only slightly by the gate voltage, there is no practical value.
  • the source and the source can be modulated by the gate voltage. Drain-to-drain current is too low. Furthermore, in the case of an FET device using a porophene as a semiconductor layer, the source-drain current that can be modulated by the gate voltage is large, and the stability is further improved.
  • the FET element is manufactured by means of manufacturing a polyolefin film directly on the element substrate by the electrolytic polymerization method, the number of elements in the element manufacturing process is large. It was difficult to fabricate the same FET element simultaneously on a large-area substrate at the same time, which was a problem in manufacturing.
  • the FET element according to the present invention comprises a 7 ⁇ -conjugated polymer film, which acts as a semiconductor layer, and a 7 ⁇ ⁇ -conjugated polymer precursor that is first soluble in a solvent; A body film is manufactured, and then, the precursor polymer film is manufactured by changing it to a monoconjugated polymer film.
  • liquid crystal display device uses the above-mentioned FET element as an active drive element.
  • a 7 ⁇ -conjugated polymer precursor from a solvent-soluble 7 ⁇ -conjugated polymer precursor is used. After preparing a film, this precursor polymer film was converted to a 71-conjugated polymer film.
  • this ⁇ -conjugated polymer film as a semiconductor layer, the device fabrication process becomes remarkable and easy, and many FET devices can be simultaneously formed on a large-area substrate. Just before it can be made at a price, all the fabricated F ⁇ ⁇ elements operate stably, and the gate-to-source current increases the source-to-drain current. ⁇ to be able to modulate
  • the F element according to another aspect of the present invention functions as a semiconductor layer.
  • LB film of a ⁇ -conjugated polymer precursor is prepared using a 7 ⁇ -conjugated polymer precursor that is soluble in a solvent.
  • the LB film is made by changing the precursor polymer LB film to a 7 ⁇ ⁇ -conjugated polymer LB film (this LB film is an organic thin film, but is broadly called an LB film). That is how it was done.
  • a liquid crystal display device uses the above-mentioned FET element as an active drive element.
  • a region sandwiched between a source electrode and a drain electrode is formed of a 7 ⁇ -conjugated polymer obtained from a solvent-soluble precursor.
  • a 7 ⁇ ⁇ -conjugated polymer is obtained by forming a laminated film of an acid-donating film for donating an acid.
  • the molecular precursor film can be efficiently converted into a r-conjugated polymer film, and the source-drain current can be more greatly modulated by the gate voltage.
  • FIG. 1 is a cross-sectional view showing an embodiment of an FET device according to the present invention
  • FIG. 2 is a cross-sectional view showing a portion corresponding to one pixel of an embodiment of a liquid crystal display device according to the present invention
  • FIG. 3 and 4 are cross-sectional views each showing another embodiment of the FET device according to the present invention
  • FIG. 5 is a portion corresponding to one pixel in another embodiment of the liquid crystal display device according to the present invention.
  • FIG. 6 is a cross-sectional view showing source / drain at each gate voltage of the FET element according to the first embodiment.
  • Figure 7, Figure 8, Figure 9, and Figure 9 show the characteristics of the current between the source and the source-drain voltage, respectively, in Example 2, Example 3, and Example 4.
  • FIG. 10 shows the relationship between the source and drain of each of the FET elements of Example 1 and Example 4 and the FET element of the comparative example when a 50 V source-drain voltage is applied.
  • Fig. 11 shows the same characteristics of each of the FET elements in Examples 2 and 3 and the comparative example
  • Fig. 12 shows the FET in the liquid crystal display device of Example 5.
  • Figures 13 and 14 show the characteristics of Example 6
  • FIG. 15 is a cross-sectional view showing an FET device using conventional polyacetylene as a semiconductor layer
  • FIG. 16 is a cross-sectional view showing a conventional poly (N-type) device.
  • Le bi ⁇ Lumpur) or port Li Chiofu E down is a sectional view showing an FET device using as a semiconductor layer.
  • FIG. 1 is a configuration diagram showing an example of the FET element according to the present invention.
  • 1 is a substrate
  • 2 is a gate electrode provided on the substrate 1
  • 3 is an insulating film
  • 4 is a 7 ⁇ -conjugated polymer film or its LB film that functions as a semiconductor layer
  • 5 and 6 Are the source and drain electrodes, respectively.
  • FIG. 2 is a sectional view showing an example of the liquid crystal display device according to the present invention.
  • 1 is the substrate and 2 is the base.
  • Gate electrode provided on one side of plate 1 3 is an insulating film provided on substrate 1 and gate electrode 2
  • 5 is a source electrode provided on insulating film 3
  • 6 is the same.
  • the drain electrode 4 is provided on the insulating film 3 separately from the source electrode 5, and the drain electrode 4 is provided on the insulating film 3, the source electrode 5, and the drain electrode 6.
  • 7 ⁇ — A conjugated polymer or a semiconductor layer consisting of its LB film strength, which is in contact with the drain electrode 6 and the drain electrode 6, respectively.
  • These 2 to 6 are FETs in the liquid crystal display device. It is part 11 of the element.
  • 7 is an electrode connected to the drain electrode 6 of the FET element 11
  • 8 is a liquid crystal layer
  • 9 is a transparent electrode
  • 10 is a glass plate with a polarizing plate.
  • the electrodes 7 and 9 are subjected to an orientation treatment.
  • 7 to 10 are liquid crystal display portions 12 of the liquid crystal display device.
  • the materials used for the FET element and the liquid crystal display device according to the present invention include the following.
  • the substrate 1 can be made of any insulating material. Specifically, the substrate 1 can be made of glass, aluminum sintered body, polyimide, or polyester. Inolem, Polyethylene film, Polyethylene film, Polyno. Various insulating plastics such as laxylene film can be used. In the case of a liquid crystal display device, it is preferable that the substrate 1 is transparent.
  • the gate electrode 2, the source electrode 5 and the drain electrode 6 are gold, platinum, chromium, and gold.
  • Methods for providing these electrodes here include methods such as vapor deposition, sputtering, plating, and various types of CVD growth.
  • a conductive organic low-molecular compound or 7: -conjugated polymer may be used. In that case, the LB method can be applied.
  • a p-type silicon and an n-type silicon are connected to the gate electrode 2 and the substrate I. It may be used as a function. In this case, the substrate 1 can be omitted. In this case, the volume resistivity of the p-type silicon or the n-type silicon may be any value. However, in practice, the 7 ⁇ -conjugated polymer film 4 used as a semiconductor layer may be used. It is preferable to be smaller. Further, depending on the purpose of use of the FET element, a conductive plate or film such as a stainless steel plate or a copper plate can be used as the gate electrode 2 and the substrate 1.
  • an insulating film 3 as long as also the insulating inorganic state, and are also available in any material of an organic, generally the acid oak Li co down (S i 0 2), nitrided Li Con, aluminum oxide, Polyethylene, Polyester, Polyimide, Polyphenylene Sulfide, Polyparaxylene, Polyacrylonitrile, Various Insulation A LB film or the like is used. Of course, two or more of these materials may be used in combination.
  • the method for producing these insulating films and examples thereof include a CVD method, a plasma CVD method, a plasma polymerization method, a vapor deposition method, a spin-coating method, and a datetime method.
  • the insulating film 3 may be formed by a method such as thermal oxidation of silicon. The silicon oxide film thus obtained is preferably used.
  • the electrode 7 short-circuited with the drain electrode 6 of the FET element in the liquid crystal display section 12 has sufficient electric conductivity and is insoluble in the liquid crystal.
  • Metal such as gold, gold, white gold, chromium, and aluminum, and transparent electrodes such as tin oxide, indium oxide, indium tin oxide (IT IT), etc.
  • transparent electrodes such as tin oxide, indium oxide, indium tin oxide (IT IT), etc.
  • an organic polymer having conductivity may be used. Of course, two or more of these materials may be used in combination.
  • a transparent electrode such as tin oxide, indium oxide / tin oxide (I ⁇ 0) is generally used.
  • a conductive organic polymer having appropriate transparency may be used.
  • two or more of these materials may be used in combination.
  • the electrodes 7 and 9 need to be subjected to an orientation treatment such as oblique deposition or rubbing of Si 2 .
  • the liquid crystal layer 8 includes a guest-host type liquid crystal, a TN type liquid crystal, or a smectic.
  • a liquid crystal such as a C-phase liquid crystal can be used.
  • a glass is used for the substrate 1 and a transparent electrode is used for the electrode 7, the contrast can be improved by attaching a polarizing plate to the substrate 1.
  • the ratio increases.
  • the material of the 7 ⁇ -conjugated polymer film or its LB film 4 acting as a semiconductor layer it can be used as long as the precursor of the 7 ⁇ -conjugated polymer is soluble in a solvent.
  • two or more kinds may be used in combination.
  • a material having amphipathic properties is preferably used for the preparation of a precursor LB film. 7 _ Among the compounds whose precursors are soluble in the solvent, especially the general formula (1)
  • R and R 2 are —H, an alkyl group or an alkoxy group, and n is an integer of 10 or more).
  • a 7 ⁇ -conjugated polymer in which R, and R 2 are ⁇ ⁇ ⁇ is preferably used because of easy synthesis of a ⁇ - conjugated polymer precursor.
  • the solvent refers to various organic solvents, water, and mixtures thereof. What was said.
  • an organic solvent which has a lower specific gravity than water, is less soluble in water, and easily evaporates is preferably used for the preparation of a precursor LB film.
  • R 3 is a hydrocarbon group having 1 to 10 carbon atoms
  • any of R 3 in the general formula (2) can be used as long as it is a hydrocarbon group having 1 to 10 carbon atoms.
  • methyl, ethyl, propyl, Isopropyl, n-butynole, 2-ethylhexyl, and cyclopihexyl groups are examples, but hydrocarbon groups having 1 to 6 carbon atoms, particularly methyl and ethyl groups, are practical.
  • the method for synthesizing the polymer precursor used in the present invention is not particularly limited, but a polymer precursor obtained by a sulfonium salt decomposition method described below is preferred from the viewpoint of stability. .
  • the ion A is not particularly limited, and examples thereof include halogen, a hydroxyl group, boron tetrafluoride, perchloric acid, carboxylic acid, and sulfonate ion. Among them, halogens such as chlorine and bromine and hydroxyl ions are preferable.
  • the reaction solution is preferably an alkaline solution, and the alkaline solution is preferably a strong basic solution having a pH of 11 or more.
  • New Alkali that can be used is sodium hydroxide, hydroxide hydration, calcium hydroxide, quaternary ammonium salt hydroxide, sulfonium.
  • Sulfonium salts are unstable under heat, light, especially ultraviolet light, and strong basic conditions. After condensation polymerization, sulfonium chloride is gradually removed, and the sulfonium salt is converted to the alkoxy group. It is desirable to carry out the condensation polymerization reaction at a relatively low temperature, that is, at a temperature of not more than ° C, particularly not more than 5 ° C, and more preferably not more than -10 ° C, since the conversion of the compound cannot be effectively performed.
  • the reaction time may be appropriately determined depending on the polymerization temperature and is not particularly limited, but is usually in the range of 10 minutes to 50 hours.
  • the precursor of the 7 ⁇ -conjugated polymer is initially a sulfonium salt, that is, a high molecular weight having one S + (A—) in the side chain.
  • the sulfonium side chain In the reaction in which the sulfonium side chain is replaced with an alkoxy group, the sulfonium side chain can be effectively converted to an alkoxy group by raising the condensation polymerization temperature in a solvent containing alcohol after the condensation polymerization. Can be replaced by
  • the substitution reaction of the alkoxy group can be performed following the polymerization.
  • the solvent for the polymerization is water or the like and does not contain alcohol, the same procedure can be performed by mixing the alcohol after polymerization.
  • 0 to 50 ° C is preferable from the viewpoint of the reaction rate, and 0 to 25 ° C is more preferable.
  • the polymer having an alkoxy group in the side chain is insoluble in a commonly used mixed solvent, it precipitates as the reaction proceeds. Therefore, it is effective to carry out the reaction time until precipitation is sufficiently generated.
  • the reaction time is preferably 15 minutes or more, but from the viewpoint of yield, it is preferably 1 hour or more. In this way, the -conjugated polymer precursor having an alkoxy group in the side chain is separated by filtering the precipitated product.
  • the molecular weight is sufficiently large, and at least the repetition of the 7 ⁇ -conjugated polymer precursor of the general formula (2) is preferable.
  • the r-conjugated polymer precursor has excellent solubility and is soluble in many organic solvents.
  • organic solvents include dimethylformamide, dimethylacetamide, dimethylsulfoxyd, dioxane, black mouth holm, and tetrahydrofura. And the like.
  • an organic solvent which has a lower specific gravity than water, is hardly soluble in water, and easily evaporates is preferred.
  • a spin coat using a 7 ⁇ -conjugated polymer precursor solution dissolved in a solvent is used.
  • Method, cast method, dating method, c-coat method, ⁇ -report method, etc. are used.
  • the solvent is evaporated to obtain a 7 ⁇ -conjugated polymer precursor thin film, and the 7 ⁇ -conjugated polymer precursor thin film is heated to act as a semiconductor by heating the 7 ⁇ -conjugated polymer precursor thin film.
  • the heating conditions for forming the 7 ⁇ -conjugated polymer film are not particularly limited, but are practical. In the following, it is desirable to carry out the reaction under an inert gas atmosphere. Of course,
  • a pure or salt aqueous solution or the like is converted into a subphase and dissolved in a solvent—a conjugated polymer.
  • a vertical immersion method using a Kuhn-type trough, a horizontal deposition method, and an LB film production method using a mu- ing-wall type trough are used.
  • LB film of conjugated polymer By heating the LB film of a monoconjugated polymer precursor, there is no particular limitation on the heating conditions for forming a 7 ⁇ -conjugated polymer LE film, but practically 200 e C above, below 300 ° C, arbitrary and desired this carried out in an inert gas atmosphere. Of course, it is possible to convert the 7 ⁇ -conjugated polymer precursor LB film into a 7 ⁇ -conjugated polymer LB film even with heating of 200 ⁇ or less.
  • the LB film of 7 ⁇ ⁇ -conjugated polymer When heated in an atmosphere of an inert gas containing protonic acids such as HC1 and HBr, the LB film of 7 ⁇ ⁇ -conjugated polymer is converted to the LB film of 7 ⁇ -conjugated polymer. Conversion often proceeds smoothly.
  • the precursor before preparing the precursor LB film, before the 7 ⁇ -conjugated polymer If the precursor is solvent-soluble but does not have sufficient amphipathic properties, it may be combined with a good amphipathic compound such as stearic acid arachidic acid. It is possible to produce an LB film using the developing solution prepared by mixing. In addition, it is possible to prepare an LB film by adsorbing the above-mentioned 7-conjugated high molecular weight precursor to a monomolecular film of an amphipathic compound on a subphase.
  • a good amphipathic compound such as stearic acid arachidic acid
  • FIGS. 3 and 4 are cross-sectional views showing another embodiment of the FET device according to the present invention.
  • FIG. 3 is a cross-sectional views showing another embodiment of the FET device according to the present invention.
  • the acid donor film is used to promote the conversion reaction from the precursor film of the 7 ⁇ ⁇ -conjugated polymer 4 to the ⁇ -conjugated polymer film, since they are laminated on the substrate 1 and the gate electrode 2 respectively. It is.
  • the positions of the 7 ⁇ -conjugated polymer film 4 and the acid donor film 13 are exchanged, that is, the acid donor film 13 is placed on the insulating film 3, the source electrode 5 and the drain electrode 6. Even if the 7 FET-conjugated polymer film is laminated on the acid donor film 13, the fabricated FET device controls the source-drain current by applying the gate voltage. You can do it.
  • FIG. 5 is a cross-sectional view showing another embodiment of the liquid crystal display device according to the present invention, in which 13 is laminated on a 7 ⁇ -conjugated polymer film 4 and is a precursor film of ⁇ -conjugated polymer 4. It is an acid donor film that promotes the conversion reaction to ⁇ -conjugated polymers.
  • FIGS. 3, 4 and 5 are the same as the corresponding parts in FIGS. 1 and 2 described above, and the manufacturing method is also the same.
  • the acid-donating layer 13 is not particularly limited as long as it is capable of injecting an acid for promoting a conversion reaction from a 7 ⁇ -conjugated polymer precursor to a 7 ⁇ -conjugated polymer 4. .
  • the acid donor film itself be an insulator from the viewpoint of FET device characteristics.
  • poly film poly Estino-Finnorem, 'Polyethylene-Phizo-Resolem', 'Poly-Eno-Res-No-Film', 'Polyno-Rex-No-Film' Acid-impregnated polymer membranes using lime, etc., amic acid'amine complexes, tertiary amines, diazonium diluate salt.
  • Diaryliodonium diluate salt Polymer membrane containing an acid generator such as sulfonium sulphate, sulphonic acid salt, etc., reaction of p-xylylene-bis (sulfonium ⁇ -genide) or a derivative thereof
  • an acid generator such as sulfonium sulphate, sulphonic acid salt, etc.
  • a film capable of easily desorbing an acid can be used.
  • the method for obtaining the acid donor film There is no particular limitation on the method for obtaining the acid donor film. Examples of the method include a CVD method, a plasma CVD method, a plasma polymerization method, an evaporation method, a class ion beam evaporation method, and an organic molecular beam epitaxy. Evening growth method, spin coating method, dating method, LB method, etc. can be used, all of which can be used
  • the ⁇ -conjugated polymer represented by the general formula (1) is used for the semiconductor layer, and the general formula (4)
  • R s is one of H, an alkyl group or an alkoxy group
  • R 7 and R 8 are a hydrocarbon group having 1 to 10 carbon atoms
  • X ⁇ is a halogen such as Br, C 1, (n is an integer of 10 or more).
  • the general formula (5) is water-soluble and can be easily prepared by the spin coating method, casting method, dating method, knuckle coating method, roll coating method, etc. A film can be formed.
  • a stack consisting of a ⁇ -conjugated polymer thin film precursor (general formula (2)) to be a semiconductor layer and a 7 ⁇ -conjugated polymer precursor film (general formula (5)) to be an acid donor film
  • a ⁇ -conjugated polymer thin film precursor generally formula (2)
  • a 7 ⁇ -conjugated polymer precursor film generally formula (5)
  • the spin-coating method, casting method, and date-forming method using a 7 ⁇ -active polymer precursor solution dissolved in a solvent There is no particular limitation on the method of obtaining the film, but the spin-coating method, casting method, and date-forming method using a 7 ⁇ -active polymer precursor solution dissolved in a solvent. 7 ⁇ -conjugated polymer precursor film (single-branch type) that becomes a semiconductor by a method such as the bar coating method and the roll coating method.
  • an acid-donating film (general formula (5)) by the same method as described above from the viewpoint of fabricating the F-element.
  • a spin-coating method using a 7 ⁇ ⁇ -conjugated polymer precursor solution dissolved in a solvent is performed.
  • the semiconductor layer is formed by a cast method, a dating method, a one-coat method, a roll-coat method, or the like.
  • a ⁇ -conjugated polymer precursor film (general formula (2)) is obtained, and may be used as a laminated film. Of course, the above lamination may be repeated.
  • the 71-conjugated high molecular film (general formula (1)) and the insulating film (general formula (4 ))) Is obtained.
  • a laminated film composed of a 7 ⁇ -conjugated polymer precursor thin film (general formula (2)) and an acid donor film (general formula (5)) By heating a laminated film composed of a 7 ⁇ -conjugated polymer precursor thin film (general formula (2)) and an acid donor film (general formula (5)), the -conjugated polymer film (general formula (5)) is heated.
  • the heating conditions for obtaining a laminated film composed of the formula (1)) and the insulating film (general formula (4)) are not particularly limited, but are practically not less than 100 and not more than 300 and an inert gas atmosphere. It is desirable to work in an atmosphere.
  • the 7 ⁇ -conjugated polymer precursor film (general formula (5)) which is an acid-donating layer, is converted to a monoconjugated polymer (general formula (4)) by heating.
  • -An acid is provided by diffusing into a conjugated polymer precursor film (general formula (2)).
  • the insulator of the acid donor film can be used as both the acid donor film and the gate insulating film in the FET device (FIG. 4). In this case, the FET element fabrication process can be simplified.
  • the depletion formed on the ⁇ -conjugated polymer film 4 or its L ⁇ film side at the interface between the 7 ⁇ -conjugated polymer film or its LB film 4 and the insulating film 3 The width of the layer is controlled by the voltage applied between the gate electrode 2 and the source electrode 5, and the width of the layer is controlled by the effective carrier channel cross-sectional area. It is considered that the current flowing between the drain electrodes 6 changes. At this time, if the 7 ⁇ -conjugated polymer film 4 or its L ⁇ film has only a ⁇ -type semiconductor with low conductivity, the gate electrode 2 is not a metal electrode.
  • the F-element section 11 and the liquid crystal display section 12 are connected in series. If the monoconjugated high molecular film 4 or its L-type film exhibits ⁇ -type semiconductivity, a negative voltage is applied to the transparent electrode 9 with respect to the source electrode 5 and the gate electrode 2 When a negative voltage is applied to the liquid crystal, the liquid crystal will light up 8 times. This is because, as described above, the resistance between the source and drain electrodes of the F ⁇ element decreases due to the application of a negative voltage to the gate electrode 2, and the voltage is applied to the liquid crystal display section 12. Take This is considered to be the reason.
  • the driving of the liquid crystal display section 12 can be controlled by changing the gate voltage applied to the attached FET element.
  • the gate electrode 2 is provided on the substrate 1.
  • a 7 ⁇ -conjugated polymer film or LB film is provided on the substrate, and the source electrode and the LB film are provided thereon.
  • a drain electrode may be provided separately from the source electrode, a gate electrode may be provided on the insulating film with an insulating film interposed between the source electrode and the drain electrode. good.
  • a gate electrode is provided on a substrate, a 7 ⁇ ⁇ -conjugated polymer film or an LB film is provided thereon with an insulating film interposed, and a source electrode and the source electrode are further provided thereon.
  • a drain electrode may be provided separately from the above.
  • a source electrode is provided on the substrate and a drain electrode is provided separately from the source electrode, and a 7 ⁇ -conjugated polymer film or LB film is provided thereon. Further, a gate electrode may be provided with an insulating film interposed.
  • the acid donor film 13 is provided on the 7-conjugated polymer film 4 serving as the semiconductor layer.
  • the gate electrode 2 is provided on the substrate 1 and the insulating film is provided. 3 intervening and Alternatively, a source electrode 5 and a drain electrode 6 may be provided, an acid donor film 13 may be provided thereon, and a 7-conjugated high molecular film 4 which is a semiconductor layer may be provided thereon.
  • a gate electrode 2 is provided on a substrate 1, an acid supply layer 13 is provided thereon, and a source electrode 5 and a drain electrode are provided thereon.
  • a 7 ⁇ ⁇ -conjugated polymer film 4 which is a semiconductor layer may be provided thereon, and the acid donor film 13 and the gate insulating film 3 may be used together.
  • a gate electrode 2 is provided on a substrate 1, an acid donor layer 13 also serving as an insulating film 3 is provided thereon, and a semiconductor layer is provided thereon. 4 may be provided, on which the source electrode 5 and the drain electrode 6 may be provided.
  • a gate electrode 2 is provided on a substrate 1, an insulating film 3 is interposed, a 7 4-conjugated polymer film 4 is provided thereon, and an acid donor film 13 is provided thereon, and furthermore, Further, a source electrode 5 and a drain electrode 6 may be provided. Alternatively, a source electrode 5 and a drain electrode 6 are provided on the substrate 1, and a 7 ⁇ — conjugated polymer film 4 is provided thereon, and furthermore, an insulating layer serving also as the acid donor film 13 is provided. The gate electrode 2 may be provided with the film 3 interposed therebetween.
  • the FET element section 11 and the liquid crystal display section 12 are formed on the same substrate, but they may be formed on separate substrates and then connected. .
  • a 3-inch n-type silicon with a resistivity of 4 to 8 ⁇ cm was heated in an oxygen stream and covered with a 3000 A thick silicon oxide film.
  • a 200 A thick copper film was formed on one side of the silicon oxide film by using ordinary vacuum deposition, photolithography, and etching techniques.
  • Five pairs of 300 A-thick gold electrodes were provided on the ground. These five pairs of gold electrodes serve as source and drain electrodes in the FET element.
  • the width of the pair of gold electrodes, that is, the channel width was 2 mm
  • the distance between the two electrodes, that is, the channel length was 6 ⁇ m.
  • the substrate fabricated in this manner is hereinafter referred to as a FET element substrate.
  • the temperature of the FET element substrate and the ambient temperature were set at about 60 ° C, and the poly (2,
  • DMF dimethylformamide
  • the poly (2,5-diphenylvinylene) precursor The film-coated FET element substrate was heated in an infrared image furnace at 270 ° C. for about 2 hours under a nitrogen stream. As a result, the color of the precursor film changed from light yellow to brown. By the above heat treatment, the poly (2,5 phenylene vinylene) precursor film is converted into the poly (2,5 phenylene vinylene) film. In line with this, infrared
  • the silicon oxide film on the other surface of the FET element substrate covered with the film obtained as described above was mechanically separated from the bare silicon surface. Rhodium and indium alloys were applied to make ohmic contact.
  • the silicon plate itself functions as a common gate electrode for the five FET elements, and the silicon oxide film on the silicon plate forms the five FET elements. It works as a common gate insulating film.
  • the FET element shown in FIG. I was obtained.
  • 1 and 2 are silicon plates which are both a substrate and a gate electrode
  • 3 is a silicon oxide film which is an insulating film
  • 4 is a poly (poly) which works as a semiconductor layer.
  • Poly (2,5—Chenylenevinylene) films obtained from 2,5—Chenylenevinylene) precursor films, 5 and 6 are source and drain, respectively.
  • the FET element substrate manufactured in Example 1 is used. Savoff By setting the temperature of AIDS (water) to about 2 CTC,
  • the FET element substrate covered with the LB film was heated in an infrared image furnace for about 2 hours under a nitrogen stream at 210 ° C.
  • the color of the precursor LB film changed from light yellow to brown.
  • the LB film of the poly (2,5—Chenylenevinylene) precursor is converted to the LB film of the Poly (2,5—Chenylenevinylene). And, with this, red
  • the silicon oxide film on the other surface of the FET element substrate covered with the LB film obtained as described above is mechanically separated from the bare silicon surface to remove the gallium. Alloy of aluminum and aluminum The coating was applied to make an omic contact.
  • the silicon ⁇ itself acts as a common gate electrode of the five FET elements, and the silicon oxide film on the silicon ⁇ has five FET elements. It works as a common gate insulating film.
  • the FET element shown in FIG. 1 was obtained.
  • 1 and 2 are silicon plates which are both a substrate and a gate electrode
  • 3 is a silicon oxide film which is an insulating film
  • 4 is a poly (poly) which works as a semiconductor layer.
  • the LB film of poly (2,5—Chenylene vinylene) obtained from the precursor LB film, and 5 and 6 are the source respectively. It is a gold film that works as a source and drain electrode.
  • Example 2 Another embodiment using a heat treatment different from that of the second embodiment for obtaining the FET element having the structure shown in FIG. 1 will be described below.
  • a poly (2,5-divinylvinylene) LB film 100 layers was obtained on the FET element substrate by the LB method.
  • the gold electrode on the FET element substrate is replaced by a platinum electrode having a thickness of 300 A and a chromium having a thickness of 200 A as a base.
  • the FET element substrate coated with the LB film of poly (2,5-divinylvinylene) precursor was placed in an infrared image furnace and contained hydrogen chloride gas for about 1.5 hours.
  • Heat treatment was performed under a nitrogen stream at 9 CTC.
  • the color of the precursor LB film changed from pale yellow to a purple with a metallic luster.
  • the LB film of the poly (2.5-chlorovinylene) precursor is completely transformed into the LB film of the poly (2,5-chlorovinylene).
  • the silicon plate itself functions as a common gate electrode for the five FET elements, and the silicon oxide film on the silicon plate becomes By acting as a common gate insulating film for the two FET elements, an FET element having the structure shown in Fig. 1 was obtained.
  • 1 and 2 are silicon plates which are both a substrate and a gate electrode
  • 3 is a silicon oxide film which is an insulating film
  • 4 is a poly (poly) which acts as a semiconductor layer.
  • 2,5—Chenylene hinylene The LB film of poly (2,5-chlorobenzene) obtained from the precursor LB film, and 5 and 6 are the LB films, respectively. O with platinum film acting as source and drain electrodes
  • the temperature and ambient temperature of the FET element substrate similar to that used in Example 1 were set to about 60, and the following chemical structure was obtained.
  • Poly (p-vinylenevinylene) precursor poly (p-vinylenevinylene) precursor is prepared by the spin-cast method using about 2% aqueous solution of the poly (p-vinylenevinylene) precursor.
  • the film was obtained on a poly (2,5-diphenylvinylene) precursor. At this time, the number of revolutions of the spinner was set to 2000 revolutions per minute.
  • the film thickness of the obtained precursor film was 700 A.
  • the FET device substrate was heated in an infrared image furnace under a nitrogen stream at 210 ° C for about 2 hours.As a result, the color of the film changed from pale yellow to dark brown or dark purple. I did.
  • the poly (2,51-vinylenevinyl) precursor film and the poly '(p- The multi-layered film consisting of the poly (enylenevinylene) precursor film is composed of a poly (2,5—Chenylenevinylene) film and a poly (p—film), respectively.
  • the silicon oxide film on the other side of the FET element substrate covered with the film obtained as described above is mechanically separated from the bare silicon surface to form a gallium.
  • An alloy of um and indium was applied to make an ohmic contact.
  • the silicon plate itself acts as a common gate electrode for the five FET elements, and the silicon oxide film on the silicon plate forms the five FET elements. It works as a common gate insulating film.
  • the FET device shown in FIG. 3 was obtained.
  • 1 and 2 are silicon plates which are both a substrate and a gate electrode
  • 3 is a silicon oxide film which is an insulating film
  • 4 is a poly (poly) which acts as a semiconductor layer.
  • 5 and 6 are source and drain, respectively.
  • a gold film that works as an in-electrode, and 13 works as an acid donor film (p-f (P-phenylene vinylene) This is a poly (p-phenylene vinylene) film obtained from the precursor film.
  • the channel width is set to 2 and the channel length is set to 3 II m.
  • the electrode 7 has an effective area of 17 ⁇ 19 mm 2 .
  • this substrate is referred to as a liquid crystal display device substrate.
  • a DMF solution of about 2 wt% of the poly (2,5-divinylvinylene) precursor in the same manner as in Example 1, the above liquid was applied onto the display substrate. 2,5—Chenylenevinylene) A precursor film was obtained.
  • the poly (2,5-divinylvinylene) precursor film other than the FET element portion of the liquid crystal display device substrate is washed with chloroform, and then cleaned.
  • the substrate was heated at 200 ° C. for about 1 hour in a nitrogen stream containing about 1% hydrogen chloride gas using an infrared image furnace.
  • FE Only the T element part was covered with a poly (2,5-divinylvinylene) film, and the FET element part 11 in Fig. 2 of the liquid crystal display was completed.
  • a solution obtained by mixing a DMF solution (0.5%) of a poly (2,5—Chenylenevinylene) precursor of about 2 wt% and a cross-sectional form 9.5 was used.
  • an LB film (100 layers) of a poly (2,5-chlorobenzene) precursor was obtained on the liquid crystal display device substrate.
  • the substrate is removed.
  • the sample was heated at 90 ° C. for 1.5 hours in a nitrogen stream containing about 1% hydrogen chloride gas using an infrared image furnace.
  • the S i 0 2 obliquely deposited on glass plate 10 formed with a liquid crystal display device substrate therewith and IT 0 9 causes the opposite orientation of the liquid crystal subjected to the alignment treatment
  • a 10 m thick polyester film is provided between the liquid crystal display device substrate and the glass plate 10 on which the ITO 9 is formed so as to face the liquid crystal display device so that the liquid crystal display portion becomes an opening. Sealing was carried out with epoxy resin, leaving only a part, and surrounding the same part.
  • a guest-host liquid crystal (trade name: ZL11841, manufactured by Merck) is injected from the unsealed portion, sealed with epoxy resin, and a polarizing plate is mounted on the glass plate 10.
  • the liquid crystal display section 12 of the liquid crystal display device was completed.
  • Example 7 An example of a method for manufacturing a liquid crystal display device having the structure shown in FIG. 5 is described below.
  • a DMF solution of about 2 wt% of a poly (2,5-divinylvinylene) precursor was used on the above liquid crystal display device substrate, and the poly (2,5,4-vinylene) precursor was used in the same manner as in Example 4.
  • 5—Chenrenbiniren) A precursor film was obtained.
  • about 2 wt% of the poly (Nora-phenylenevinylene) precursor is placed on the poly (2,5-divinylvinylene) precursor film.
  • a poly (paraphenylenevinylene) precursor film was obtained in the same manner as in Example 4.
  • the poly (2,5-divinylvinylene) precursor and the poly (paravinylenevinylene) precursor other than the FET element portion of this liquid crystal display device substrate After cleaning the film using a cloth hood, the substrate was washed for about 1 hour in a nitrogen stream using an infrared image furnace.
  • Example 5 Heated at 200 ° C.
  • the FET element is covered with poly (2,5-divinyl vinylene) and poly (para-phenylenevinylene), and the liquid crystal display Of these, the FEB element section 11 in FIG. 5 was completed.
  • the liquid crystal display unit 12 of the liquid crystal display device was completed. Further, a liquid crystal display device was completed in the same manner as in Example 5.
  • the device of the comparative example was produced according to the above-mentioned document (Appl. Phys. Lett., Vol. 49, p. 1210, 1986). In other words, 75 acetonitrile nozzles have 2,2'-dithiophene as monomers. 0.15 g of benzene was dissolved, 0.55 g of tetraethylammonium perchlorate was dissolved as an electrolyte, and this was used as a reaction solution.High-purity nitrogen gas was passed through the reaction solution. After sufficient degassing, the FET element substrate obtained in Example 1 was immersed in this.
  • a constant current 100 A Zcrf
  • a platinum electrode 10 X 20 mm
  • electrolytic polymerization a polysilicon film with a thickness of about 1400 A was obtained on the paired gold electrodes and on the silicon oxide film around the gold electrodes. Since a large amount of perchloric acid ion is doped into the polyolefin film at the same time as the electrolytic polymerization, the potential of the five pairs of gold electrodes is immediately saturated after the electrolytic polymerization. The voltage was set to 0 V to perform dedoping, and the poly- finin film was given conductivity similar to that of a semiconductor. The obtained FET device was washed twice with acetonitril, and then dried in a vacuum desiccator.
  • FIG. 6 shows the electrical characteristics of one of the five FET elements obtained in Example 1.
  • the horizontal axis is the Soviet Union over the scan 'de Rei down between the voltage (V D s) Der Ri vertical axis source over the scan-de Tray down between the current (I s) Ru Der.
  • V G gate voltage
  • I s hardly flows even if VD s increases, but large I s flows when a negative V c is applied.
  • V G gate voltage
  • I s hardly flows even if VD s increases, but large I s flows when a negative V c is applied.
  • areas where V D s is large saturation of I s was observed, and the electrical characteristics of a typical enhancement-type field-effect transistor were obtained.
  • the source-drain current can be greatly modulated by the applied gate voltage.
  • the characteristics in Fig. 6 are the characteristics of one of the five fabricated FET elements, but when the characteristics of the remaining FET elements were measured, the characteristics were almost the same as the characteristics in Fig. 6. showed that. When these elements were left in the air for about one month, and their electrical characteristics were measured again, the characteristics were hardly changed, and the elements obtained in this example had extremely high stability. Next, the electrical characteristics of one of the five FET elements obtained in Example 2 and the five FET elements obtained in Example 3 were found to be excellent. The electrical characteristics of one of the FET elements are shown in FIGS. 7 and 8, respectively.
  • the horizontal axis Resona over scan de Tray down voltage (V D s) Der the vertical axis represents source over scan 'de Tray down between current (I s) Ru der.
  • V G gate voltage
  • I Ni I'm flows large I s when the V D s is I s even One Do rather than size was applied ⁇ etc. flow of Iga, a negative VG You.
  • saturation of 1 s was observed, and the electrical characteristics of a typical enhancement-type effect-type transistor were obtained.
  • the source-drain current can be greatly modulated by the applied gate voltage. The characteristics shown in Figs.
  • FIG. 7 and 8 show the characteristics of the five FET elements fabricated in each example. Although the characteristics of one of the elements were measured, the characteristics of the remaining FET elements were also measured. The characteristics were almost the same as those in Figs. 7 and 8. Further, when these elements were left in the air for about one month, and their electrical characteristics were measured again, the characteristics were hardly changed, and the elements obtained in this example had extremely excellent stability. I understood.
  • FIG. 9 shows the electric characteristics of one of the five FET devices manufactured in Example 4 of the FET device.
  • the horizontal axis represents the source-drain distance between the source and the drain (VD s ), and the vertical axis represents the source-drain current (I s).
  • the electric characteristics of a typical enhancement-type field-effect transistor were obtained.
  • the source-to-drain current can be greatly modulated by the applied gate power E as compared to FIG. 6 of the first embodiment.
  • FIG. 10 shows the constant source-drain voltage of one of the five FET elements manufactured in Example 1 and Example 4 and the FET element manufactured in the comparative example. It shows the source-drain current-gate voltage characteristics under the condition of 50 V).
  • the horizontal axis represents Ri Ah at gate conductive E (V G)
  • the vertical axis represents Ru source over scan de Tray down between current (I s) der.
  • the source-drain current that can be modulated by the gate voltage is more than four digits.
  • the source / drain that can be modulated is used.
  • the gate-to-source current which can be modulated by the gate voltage, is only two and a half digits, while the in-current reaches five digits or more. .
  • the characteristics of the FET elements obtained in Examples 1 and 4 were greatly improved as compared with the conventional FET elements.
  • Fig. 11 shows one of the five FET elements fabricated in Example 2, one of the five FET elements fabricated in Example 3, and a comparative example.
  • the figure shows the source-drain current-gate voltage characteristics of the FET device under the condition of constant source-drain voltage (50 V).
  • the horizontal axis represents the gate voltage (V c) der is
  • the vertical axis represents source over scan de Rei down between current (I s) Ru der.
  • the source-drain current that can be modulated by the gate voltage in the FET devices obtained in the second and third embodiments.
  • the conventional FET device of the comparative example has only two and a half digits of the source-drain current that can be modulated by the gate voltage, while the current reaches four digits or more.
  • the characteristics of the FET devices obtained in Examples 2 and 3 were greatly improved as compared with the conventional FET device.
  • FIG. 12 shows the source-drain current-source-drain current when the gate voltage of the FET element in the liquid crystal display device obtained in Example 5 is changed.
  • FIG. 4 is a characteristic diagram illustrating voltage characteristics.
  • the horizontal axis represents the source-drain voltage (VDs)
  • the vertical axis represents the source-drain current (Is).
  • VDs source-drain voltage
  • Is source-drain current
  • a liquid crystal is connected between the transparent electrode 9 on the glass plate 10 of the liquid crystal display and the source electrode 5 of the F ⁇ element.
  • a sufficient voltage is applied for driving and a negative voltage is applied to the gate electrode 2
  • a voltage is applied to the liquid crystal display, and the liquid crystal 8 is oriented and the liquid crystal is aligned.
  • the display was driven, but when the gate voltage was set to 0 V, no voltage was applied to the liquid crystal display and the liquid crystal display stopped driving. That is, the driving of the liquid crystal could be controlled by the attached FET element using the 7 ⁇ -conjugated polymer film as the semiconductor layer. In terms of stability, the liquid crystal display device of this example operated stably even after one month or more.
  • FIG. 13 shows the source-drain current-source drain when the gate voltage of the F ⁇ element in the liquid crystal display device obtained in Example 6 was changed.
  • FIG. 4 is a characteristic diagram showing an inter-voltage characteristic.
  • the liquid crystal drive could be controlled by the attached FET device using the attached 7 ⁇ -conjugated polymer LB film as the semiconductor layer. Further, in terms of stability, the liquid crystal display device of this example operated stably even after more than one month.
  • FIG. 14 shows the current between the source and the drain when the gate voltage of the F ⁇ element in the liquid crystal display device obtained in Example 7 was changed, and the source and drain.
  • FIG. 4 is a characteristic diagram showing an inter-electrode voltage characteristic.
  • the horizontal axis shows the source-drain voltage (VDS), and the vertical axis shows the source-drain current (Is).
  • VDS source-drain voltage
  • Is source-drain current
  • Example 5 to 7 only one FET element and liquid crystal display section were manufactured to form a liquid crystal display device.However, a plurality of FET elements and liquid crystal display sections were manufactured using the same method to form a liquid crystal display. It can also be a device. However, in that case, processing such as patterning using a photo register is required.
  • the present invention relates to a field-effect transistor using an organic semiconductor and a liquid crystal display device using the same, and the field-effect transistor and the driving element using the same. Applied to liquid crystal display devices.

Abstract

A field-effect transistor (FET element) wherein a pi-conjugated polymer film that serves as a semiconductor layer of the element is obtained by first preparing a pi-conjugated polymer precursor film by the use of a pi-conjugated polymer precursor soluble in a solvent and then converting the precursor film into the pi-conjugated film. A liquid crystal display device is obtained by using the FET elements as active drive elements. A large number of the FET elements can be fabricated simultaneously on a substrate having a large area at a low cost and stably operate, thus making it possible to greatly vary the current between the source and the drain by the gate voltage.

Description

明 細 書  Specification
電界効果型 ト ラ ン ジ ス タ 及びこ れを用 いた液晶表示装置 技術分野  Field-effect transistor and liquid crystal display device using the same
こ の発明は、 有機半導体を用 いた電界効果型 ト ラ ン ジ ス 夕 (以下、 F E T素子 と略称する ) 、 及びそれを駆動 素子 と して用 いた液晶表示装置に関する も のであ る。  The present invention relates to a field-effect transistor using an organic semiconductor (hereinafter abbreviated as an FET element) and a liquid crystal display device using the same as a driving element.
背景技術  Background art
従来、 F E T素子と しては、 半導体層と して シ リ コ ン や GaA s単結晶を用いた も のが知 られてお り 、 実用 に供さ れてレ、る。 し力、 し、 こ れ らの素子においては、 用 い られ る材料が高価であ る ばか り か、 素子作成プロ セ スが大変 複雑であ る。 しか も、 素子を組み込むこ とのでき る面積 はウェハーの大き さで制限さ れる。 例えば、 大画面液晶 表示素子に用い られる ァ ク テ ィ ブ駆動素子を作製する場 合においては、 上記ウェハ一を用 いている 限 り 、 価格面 力、 ら も、 その面積か ら も著 しい制約がある。 こ の よ う な 制約のため、 現在では、 液晶表示素子において駆動素子 と して用 レ、 られる F E T素子 と しては、 ア モ ル フ ァ ス シ リ コ ン を用いた薄膜 ト ラ ン ジス タ が実用 に供さ れている, し力、 し、 アモルフ ァ ス シ リ コ ンを用 いた薄膜 ト ラ ン ジス 夕 も、 表示素子面積の増大化に伴い、 低価格で、 多 く の 素子を一平面上に、 しか も均一に作製する のが困難 とな り つつあ る。 こ の様な背景の下に、 最近では有機半導体 を用いて F E T素子を作製 し ょ う とする試みがな さ れて いる。 有機半導体の中で も ΤΓ 一共役系高分子を用いた も のが、 高分子材料の特徵である加工性に優れ大面積化が 容易な こ とか ら、 特に注目 されている (特開昭 62- 8 5224 号公報) 。 Conventionally, FET devices using silicon or GaAs single crystal as a semiconductor layer have been known and have been put to practical use. In these devices, not only is the material used expensive, but also the device fabrication process is very complicated. However, the area in which devices can be incorporated is limited by the size of the wafer. For example, in the case of manufacturing an active drive element used for a large-screen liquid crystal display element, as long as the above-described wafer is used, there are significant restrictions on price, surface area, and area. There is. Due to such restrictions, at present, as a FET element used as a driving element in a liquid crystal display element, a thin film transistor using amorphous silicon is used as an FET element. In addition, thin-film transistors using amorphous silicon, which are used in practical applications, are also inexpensive and require a large number of devices as the display device area increases. It is becoming difficult to fabricate a single, uniform surface. Against this background, attempts have recently been made to fabricate FET devices using organic semiconductors. I have. Among organic semiconductors, those using mono-conjugated polymers have attracted particular attention because of their excellent processability and easy area enlargement, which are the characteristics of polymer materials (Japanese Patent Laid-Open No. Sho 62). -855222).
π -共役系高分子 とは化学構造の骨格が共役二重結合 や三重結合からな ってお り 、 7Γ —電子軌道の重な り によ つ て形成される価電子帯と伝導帯お よびこ れを隔てる禁 制帯か らなるバン ド構造を有 している もの と考え られて いる。 禁制帯幅は材料によ っ て異なるが、 殆 どの 7Γ —共 役系高分子では 1 〜 4 e Vの範囲にある。 こ のために 7Γ — 共役系高分子は、 それ自身では絶縁体、 ま たはそれに近 ぃ電導度しか示さない。 しかし、 化学的方法, 電気化学 的方法, 物理的方法等によ っ て価電子帯か ら電子を引 き 去っ た り (酸化) 、 ま たは伝導帯に電子を注入 (還元) する こ と (以下、 ドー ピ ン グとい う ) に よ っ て、 電荷を 運ぶキ ヤ リ ヤー (担体) が生 じる もの と説明 されている その結果、 ドー ピ ン グの量を制御する こ とによ って、 電 導度は絶縁体領域から金属領域に至る幅広い範囲に渡つ て任意に変える こ とが可能である。 ドー ピ ン グが酸化反 応の と き に得られる 7Γ —共役系高分子は p 型、 還元反応 の場合には n 型になる。 こ れは無機半導体における不純 物添加に似ている。 こ のために 7Γ —共役系高分子を半導 体材料と して用いた、 色々 な半導体素子を作製する こ と ができ る。 π -共役系高分子を半導体 と して用 いた F Ε Τ素子 と しては、 ポ リ アセチ レ ン ( ジ ャ ーナル ォ ブ ア プラ イ イ ド フ イ ジ ク ス ( J. Appl. Phys. ) 54巻, 3255頁, 1983年) を用 いた も のが知 られている。 第 15図は、 従来 のポ リ ァセチ レ ンを用いた F E T素子の断面図であ る。 こ の図において、 1 は基板 とな る ガラ ス、 2 はゲー ト 電 極とな る ア ル ミ ニウ ム膜、 3 は絶縁膜 とな る ポ リ シロ キ サ ン膜、 4 は半導体層 と して働 く ポ リ アセチ レ ン膜、 5 お よ び 6 はそれぞれソ ー ス電極お よ び ド レ イ ン電極 と な る金膜であ る。 A π-conjugated polymer has a chemical structure skeleton consisting of conjugated double bonds and triple bonds. The valence band and conduction band formed by the overlapping of 7Γ-electron orbitals, and It is thought to have a band structure consisting of a forbidden band separating them. The forbidden band varies depending on the material, but is in the range of 1 to 4 eV for most 7Γ-conjugated polymers. For this reason, 7Γ-conjugated polymers themselves show only an insulator or a near-conductivity to it. However, the removal of electrons from the valence band (oxidation) or the injection of electrons into the conduction band (reduction) by chemical, electrochemical, or physical methods. (Hereinafter referred to as doping) is described as producing a carrier (carrier) that carries charges. As a result, the amount of doping can be controlled. Therefore, the conductivity can be arbitrarily changed over a wide range from the insulator region to the metal region. The 7Γ-conjugated polymer obtained when doping is oxidized becomes p-type, and in the case of reduction, it becomes n-type. This is similar to impurity addition in inorganic semiconductors. For this reason, various semiconductor devices using a 7Γ-conjugated polymer as a semiconductor material can be manufactured. As an F Ε element using a π-conjugated polymer as a semiconductor, polyacetylene (Journal of Applied Physics, J. Appl. Phys. 54, p. 3255, 1983). FIG. 15 is a sectional view of a conventional FET device using polyacetylene. In this figure, 1 is a glass serving as a substrate, 2 is an aluminum film serving as a gate electrode, 3 is a polysiloxane film serving as an insulating film, and 4 is a semiconductor layer. The polyacetylene film that functions as a metal film, and 5 and 6 are gold films serving as a source electrode and a drain electrode, respectively.
こ のポ リ アセチ レ ンを半導体層に用 いた F E T素子の 動作について説明する。 ソ ー ス電極 5 と ド レ イ ン電極 6 の間に電圧をかける と、 ポ リ アセチ レ ン膜 4 を通 して ソ — ス電極 5 と ド レ イ ン電極 6 の間に電流が流れる。 こ の と き、 ガラ ス基板 1 上に設け られ、 かつ絶縁膜 3 に よ り ポ リ アセチ レ ン膜 4 と隔て られたゲー ト 電極 2 に電圧を 印加する と、 電界効果によ っ てポ リ アセチ レ ン膜 4 の電 導度を変え る こ とができ、 従っ て ソ ース ' ド レ イ ン間の 電流を制御する こ とができ る。 こ れは絶縁膜 3 に近接す る ポ リ アセチ レ ン膜 4 内の空乏層の幅がゲー ト 電極 2 に 印加する電圧に よ っ て変化 し、 実効的な正のキ ヤ リ ャ 一 か らな る チ ャ ネル断面積が変化する ため と考え られてい る。 し力、 し、 こ の F E T素子ではゲー ト 電圧に よ っ て変 える こ と のでき る ソ ース · ド レ イ ン間の電流は極めて小 さ レ、 o The operation of the FET device using this polyacetylene for the semiconductor layer will be described. When a voltage is applied between the source electrode 5 and the drain electrode 6, a current flows between the source electrode 5 and the drain electrode 6 through the polyacetylene film 4. At this time, when a voltage is applied to the gate electrode 2 which is provided on the glass substrate 1 and is separated from the polyacetylene film 4 by the insulating film 3, the electric field effect The conductivity of the acetylene film 4 can be changed, and accordingly, the current between the source and the drain can be controlled. This is because the width of the depletion layer in the polyacetylene film 4 close to the insulating film 3 changes depending on the voltage applied to the gate electrode 2, and is an effective positive carrier. This is thought to be due to a change in the cross-sectional area of the resulting channel. In this FET device, the source-drain current that can be changed by the gate voltage is extremely small. O, o
π —共役系高分子を半導体と して用いた F Ε Τ素子の 他の例と しては、 ポ リ ( Ν — メ チル ピロ ール) (ケ ミ ス ト リ ー レ 夕 一ズ (Chem. Lett. ) 863頁, 1986年) およ びポ リ チォフ ェ ン (アプラ イ ド フ イ ジ ク ス レ タ —ズ (Appl, Phys. Lett. ) 49巻, 1210頁, 1986年) を 適用 した も のが知 られている。 第 16図に、 ポ リ ( N — メ チル ピロ 一ル) またはポ リ チォフ ェ ンを半導体層 とする F E T素子の断面図を示す。 こ の図において、 3 は絶縁 膜となる酸化シ リ コ ン、 4 は半導体層と して働 く ポ リ ( N— メ チル ピロ 一ル) 膜ま たはポ リ チォフ ェ ン膜、 5 および 6 はそれぞれソ ース電極お よ び ド レイ ン電極とな る金膜、 1 は基板兼ゲー ト電極となる シ リ コ ン板、 2 は シ リ コ ン板 7 とォ一 ミ ッ ク接触を と る ための金属であ る。 ポ リ ( N — メ チル ピロ 一ル) を半導体層 と して用いた場 合には、 半導体層 4 を通して ソ ース電極 5 と ド レ イ ン電 極 6 の間を流れる電流 (電導度) をゲー ト電圧でわずか に制御でき る だけであ り 、 実用的価値はない。  Another example of an F-type element using a π-conjugated polymer as a semiconductor is poly (Ν-methylpyrrole) (Chemistry). Lett.) P. 863, 1986) and Polyphen (Appl. Phys. Lett.) 49, 1210, 1986). What is known is known. FIG. 16 is a cross-sectional view of an FET element having a semiconductor layer of poly (N-methylpyrrole) or polyphene. In this figure, reference numeral 3 denotes a silicon oxide film serving as an insulating film, 4 denotes a poly (N-methylpyrrole) film or a polyolefin film serving as a semiconductor layer, and 5 and Reference numeral 6 denotes a gold film serving as a source electrode and a drain electrode, 1 denotes a silicon plate serving both as a substrate and a gate electrode, and 2 denotes a silicon plate 7 in sonic contact. It is a metal for removing When poly (N-methylpyrrole) is used as the semiconductor layer, the current flowing between the source electrode 5 and the drain electrode 6 through the semiconductor layer 4 (conductivity) Since it can be controlled only slightly by the gate voltage, there is no practical value.
—方、 ポ リ チォフ ェ ンを半導体層に適用 した場合には、 半導体層 4 を通 して ソ ー ス電極 5 と ド レ イ ン電極 6 の間 を流れる電流 (電導度) をゲー ト電圧で、 100〜 1000倍 も変調する こ とができ る。 し力、 しながら、 従来はポ リ チ オフ ヱ ン を電解重合法によ っ て作製 している ために、 多 く の F E T素子を同時に、 しか も均一に作る場合には甚 だ問題が多い。 On the other hand, when a porphyrene is applied to the semiconductor layer, the current (conductivity) flowing between the source electrode 5 and the drain electrode 6 through the semiconductor layer 4 is applied to the gate voltage. Thus, it is possible to modulate 100 to 1000 times. In the past, however, since poly-olefins were conventionally produced by the electrolytic polymerization method, it was extremely difficult to fabricate many FET elements simultaneously and uniformly. There are many problems.
こ の よ う に、 ポ リ ア セ チ レ ン並びに ポ リ ( N — メ チ ル ピロ ール) を半導体層に用いた F E T素子では、 ゲー ト 電圧に よ っ て変調でき る ソ ー ス · ド レ イ ン間電流は、 小 さすぎる。 更に、 ポ リ チォ フ ェ ン を半導体層 と して用い た F E T素子の場合には、 ゲー ト 電圧によ っ て変調でき る ソ ー ス · ド レ イ ン間電流は大き く 、 更に安定性に も優 れるが、 ポ リ チォ フ ェ ン膜を電解重合法に よ っ て直接素 子基板上に作製する手段で F E T素子を作製 してい る た めに、 素子作製プロ セス上、 多 く の F E T素子を大面積 基板上に同時に均一に作製する こ と は難 し く 、 製造上問 題 とな っ ていた。  As described above, in an FET element using polyacetylene and poly (N-methylpyrrole) for the semiconductor layer, the source and the source can be modulated by the gate voltage. Drain-to-drain current is too low. Furthermore, in the case of an FET device using a porophene as a semiconductor layer, the source-drain current that can be modulated by the gate voltage is large, and the stability is further improved. However, since the FET element is manufactured by means of manufacturing a polyolefin film directly on the element substrate by the electrolytic polymerization method, the number of elements in the element manufacturing process is large. It was difficult to fabricate the same FET element simultaneously on a large-area substrate at the same time, which was a problem in manufacturing.
発明の開示  Disclosure of the invention
本発明に係 る F E T素子は、 半導体層 と して働 く 7Γ — 共役系高分子膜を、 最初に溶剤可溶な ; Γ -共役系高分子 前駆体を用 いて 7Γ -共役系高分子前駆体膜を作製 し、 そ の後、 こ の前駆体高分子膜を 一共役系高分子膜に変え る こ と によ って作製する よ う に した も のであ る。  The FET element according to the present invention comprises a 7Γ-conjugated polymer film, which acts as a semiconductor layer, and a 7 溶 剤 -conjugated polymer precursor that is first soluble in a solvent; A body film is manufactured, and then, the precursor polymer film is manufactured by changing it to a monoconjugated polymer film.
ま た、 本発明に係る液晶表示装置は、 上記の よ う な F E T素子をァ ク テ ィ ブ駆動素子.と して用いた も のであ る。  Further, the liquid crystal display device according to the present invention uses the above-mentioned FET element as an active drive element.
本発明においては、 電解重合等の方法の よ う に直接 7Γ 一共役系高分子膜を作る 代わ り に、 溶剤可溶な 7Γ -共役 系高分子前駆体か ら 7 -共役系高分子前駆体膜を作製 し、 その後、 こ の前駆体高分子膜を 71 -共役系高分子膜に変 え、 こ の ττ —共役系高分子膜を半導体層 どして用いる こ とによ り 、 素子作製プロセスが著し く 容易 とな り 、 多 く の F E T素子を同時に大面積基板上に、 低価格で作る こ とができ る よ う になつ たばか り か、 作製した全ての F Ε Τ素子が安定に動作 し、 ゲー ト電圧によ っ て、 ソ ース ' ド レイ ン間電流を大き く 変調させる こ とができ る よ う に つ に ο In the present invention, instead of directly forming a 7Γ-conjugated polymer film as in a method such as electrolytic polymerization, a 7 可 -conjugated polymer precursor from a solvent-soluble 7Γ-conjugated polymer precursor is used. After preparing a film, this precursor polymer film was converted to a 71-conjugated polymer film. By using this ττ-conjugated polymer film as a semiconductor layer, the device fabrication process becomes remarkable and easy, and many FET devices can be simultaneously formed on a large-area substrate. Just before it can be made at a price, all the fabricated F Ε Τ elements operate stably, and the gate-to-source current increases the source-to-drain current. Ο to be able to modulate
ま た、 上記のよ う に作製 した F Ε Τ素子を液晶表示装 置の駆動素子と して用いる こ とによ り 、 大面積化が容易 であ り 、 優れた性能を有する低価格な液晶表示装置を得 る こ とができ る よ う にな っ た。  In addition, by using the F-type element fabricated as described above as a driving element of a liquid crystal display device, a large-area, easy-to-use, inexpensive liquid crystal having excellent performance can be obtained. A display device can now be obtained.
又 の発明に係る F Ε Τ素子は、 半導体層 と して働 く The F element according to another aspect of the present invention functions as a semiconductor layer.
7Γ -共役系高分子膜を、 最初に溶剤可溶な 7Γ -共役系高 分子前駆体用いて π 一共役系高分子前駆体の Langmuir - Blodgett (以下 L B と略す) 膜を作製し、 その後こ の前 駆体高分子の L B膜を 7Γ —共役系高分子の L B膜 ( こ の L B膜は、 有機薄膜であ るが、 広義に L B膜と い う ) に 変える こ とによ って作製する よ う に した ものであ る。 First, a Langmuir-Blodgett (hereinafter abbreviated as LB) film of a π-conjugated polymer precursor is prepared using a 7Γ-conjugated polymer precursor that is soluble in a solvent. The LB film is made by changing the precursor polymer LB film to a 7 共 役 -conjugated polymer LB film (this LB film is an organic thin film, but is broadly called an LB film). That is how it was done.
また、 別の発明に係る液晶表示装置は、 上記のよ う な F E T素子をァ ク ティ ブ駆動素子と して用いた も のであ o  Further, a liquid crystal display device according to another invention uses the above-mentioned FET element as an active drive element.
これ らの別の発明で も、 上記の発明 と同様の効果があ り 、 素子作製プロ セスが著し く 容易 とな り 、 多 く の F E T素子を同時に大面積基板上に、 低価格で作る こ とがで き る よ う にな つ たばか り か、 作製 した全ての F E T素子 が安定に動作 し、 ゲー ト 電圧に よ っ て ソ 7 ス ' ド レ イ ン 間電流を大き く 変調させる こ とができ る よ う にな っ た。 These other inventions also have the same effect as the above invention, significantly simplifying the device fabrication process, and simultaneously fabricating many FET devices on a large-area substrate at low cost. With As soon as possible, all fabricated FET elements operate stably, and the gate-to-source current can be greatly modulated by the gate voltage. It became so.
ま た、 上記の よ う に作製 した F E T素子を液晶表示装 置の駆動素子と して用いる こ と によ り 、 大面積化が容易 であ り 、 優れた性能を有する低価格な液晶表示装置を得 る こ とができ る よ う にな っ た。  In addition, by using the FET element manufactured as described above as a driving element of a liquid crystal display device, a large-area can be easily achieved and a low-cost liquid crystal display device having excellent performance. You can now get
又さ ら に別の発明に係 る F E T素子は、 ソ ース電極 と ド レ イ ン電極に挟 まれた領域を、 溶剤可溶な前駆体か ら 得 られる 7Γ —共役系高分子で形成する半導体層 と、 上記 溶剤可溶な前駆体か ら 7Γ -共役系高分子を得る反応にお いて、 酸を供与する酸供与膜 との積層膜 とする こ と に よ り 、 7Γ -共役系高分子前駆体膜を ; r 一共役系高分子膜に 効率良 く 変える こ とができ、 ゲー ト 電圧に よ っ て ソ ー ス • ド レ イ ン間電流をよ り 大き く 変調さ せる こ とができ る よ つ に 7よ つ 0  Further, in a FET element according to another invention, a region sandwiched between a source electrode and a drain electrode is formed of a 7Γ-conjugated polymer obtained from a solvent-soluble precursor. In the reaction for obtaining a 7Γ-conjugated polymer from the solvent-soluble precursor described above, a 7 共 役 -conjugated polymer is obtained by forming a laminated film of an acid-donating film for donating an acid. The molecular precursor film can be efficiently converted into a r-conjugated polymer film, and the source-drain current can be more greatly modulated by the gate voltage. 7 7 0
図面の簡単な説明 BRIEF DESCRIPTION OF THE FIGURES
第 1 図は本発明に よ る F E T素子の一実施例を示す断 面図、 第 2 図は本発明によ る液晶表示装置の一実施例の 一画素に相当する部分を示す断面図、 第 3 図 と第 4 図は それぞれ本発明に よ る F E T素子の他の実施例を示す断 面図、 第 5 図は本発明に よ る液晶表示装置の他の実施例 の一画素に相当する部分を示す断面図、 第 6 図は、 実施 例 1 の F E T素子の各ゲー ト 電圧における ソ ー ス · ド レ イ ン間電流— ソ ー ス ' ド レ イ ン間電圧特性図、 第 7 図, 第 8 図, および第 9 図はそれぞれ実施例 2 , 実施例 3 , および実施例 4 における同特性図、 第 1 0図は実施例 1 , 実施例 4 の各 F E T素子と比較例の F E T素子の一 50 V の ソ ー ス · ド レ イ ン間電圧を印加 した状態における ソ 一 ス · ド レ イ ン間電流一 ゲー ト電 E特性図、 第 1 1図は実施 例 2 , 実施例 3 の各 F E T素子と比較例の F E T素子の 同特性図、 第 12図は実施例 5 の液晶表示装置中の F E T 素子の各ゲ一 ト電圧における ソ ース · ド レイ ン間電流一 ソ ー ス . ド レ イ ン間電圧特性図、 第 1 3図, 第 1 4図は、 そ れぞれ実施例 6 , 実施例 7 における 同特性図、 第 15図は 従来のポ リ ア セ チ レ ンを半導体層 と して用いた F E T素 子を示す断面図、 第 1 6図は従来のポ リ ( N — メ チル ビ π ール) またはポ リ チォフ ェ ンを半導体層 と して用いた F E T素子を示す断面図である。 FIG. 1 is a cross-sectional view showing an embodiment of an FET device according to the present invention, FIG. 2 is a cross-sectional view showing a portion corresponding to one pixel of an embodiment of a liquid crystal display device according to the present invention, and FIG. 3 and 4 are cross-sectional views each showing another embodiment of the FET device according to the present invention, and FIG. 5 is a portion corresponding to one pixel in another embodiment of the liquid crystal display device according to the present invention. FIG. 6 is a cross-sectional view showing source / drain at each gate voltage of the FET element according to the first embodiment. Figure 7, Figure 8, Figure 9, and Figure 9 show the characteristics of the current between the source and the source-drain voltage, respectively, in Example 2, Example 3, and Example 4. Fig. 10 shows the relationship between the source and drain of each of the FET elements of Example 1 and Example 4 and the FET element of the comparative example when a 50 V source-drain voltage is applied. Fig. 11 shows the same characteristics of each of the FET elements in Examples 2 and 3 and the comparative example, and Fig. 12 shows the FET in the liquid crystal display device of Example 5. Source-to-drain current vs. source-drain voltage characteristics at each gate voltage of the device. Figures 13 and 14 show the characteristics of Example 6, FIG. 15 is a cross-sectional view showing an FET device using conventional polyacetylene as a semiconductor layer, and FIG. 16 is a cross-sectional view showing a conventional poly (N-type) device. Le bi π Lumpur) or port Li Chiofu E down is a sectional view showing an FET device using as a semiconductor layer.
なお図中同一符号は同一又は相当部分を示す。  In the drawings, the same reference numerals indicate the same or corresponding parts.
発明を実施する ための最良の形態 BEST MODE FOR CARRYING OUT THE INVENTION
第 1 図は、 この発明によ る F E T素子の一例を示す構 成図であ る。 図中、 1 は基板、 2 は基板 1 上に設け られ たゲー ト電極、 3 は絶縁膜、 4 は半導体層 と して働 く 7Γ 一共役系高分子膜又はその L B膜、 5 お よび 6 はそれぞ れソ ースお よび ド レイ ン電極であ る。  FIG. 1 is a configuration diagram showing an example of the FET element according to the present invention. In the figure, 1 is a substrate, 2 is a gate electrode provided on the substrate 1, 3 is an insulating film, 4 is a 7Γ-conjugated polymer film or its LB film that functions as a semiconductor layer, and 5 and 6 Are the source and drain electrodes, respectively.
ま た、 第 2 図はこ の発明によ る液晶表示装置の一例を 示す断面図であ る。 こ の図において、 1 は基板、 2 は基 板 1 の片側に設け られたゲー ト 電極、 3 は基板 1 お よ び ゲー ト 電極 2 上に設け られた絶縁膜、 5 は絶縁膜 3 上に 設け られた ソ ース電極、 6 は同 じ く 絶縁膜 3 上に ソ ース 電極 5 と分離 して設け られた ド レ イ ン電極、 4 は絶縁膜 3 , ソ ース電極 5 , お よ び ド レイ ン電極 6 上に設け られ ソ ー ス電極 5 と ド レイ ン電極 6 にそれぞれ接触する 7Γ — 共役系高分子又はそ の L B膜力、 らな る半導体層であ り 、 こ れ ら 2 ない し 6 は液晶表示装置の内、 F E T素子の部 分 1 1であ る。 ま た、 7 は F E T素子 1 1の ド レ イ ン電極 6 と接続 した電極、 8 は液晶層、 9 は透明電極、 1 0は偏光 板付き ガラ ス板であ る。 電極 7 お よ び電極 9 には配向処 理を施 している。 上記 7 ない し 1 0は液晶表示装置の内、 液晶表示の部分 1 2であ る。 FIG. 2 is a sectional view showing an example of the liquid crystal display device according to the present invention. In this figure, 1 is the substrate and 2 is the base. Gate electrode provided on one side of plate 1, 3 is an insulating film provided on substrate 1 and gate electrode 2, 5 is a source electrode provided on insulating film 3, and 6 is the same. The drain electrode 4 is provided on the insulating film 3 separately from the source electrode 5, and the drain electrode 4 is provided on the insulating film 3, the source electrode 5, and the drain electrode 6. 7Γ — A conjugated polymer or a semiconductor layer consisting of its LB film strength, which is in contact with the drain electrode 6 and the drain electrode 6, respectively. These 2 to 6 are FETs in the liquid crystal display device. It is part 11 of the element. Further, 7 is an electrode connected to the drain electrode 6 of the FET element 11, 8 is a liquid crystal layer, 9 is a transparent electrode, and 10 is a glass plate with a polarizing plate. The electrodes 7 and 9 are subjected to an orientation treatment. 7 to 10 are liquid crystal display portions 12 of the liquid crystal display device.
こ こ で こ の発明に よ る F E T素子お よ び液晶表示装置 に用いる材料と しては、 以下に述べる も のがあ る。  Here, the materials used for the FET element and the liquid crystal display device according to the present invention include the following.
基板 1 は絶縁性の材料であればいずれ も使用可能であ り 、 具体的には、 ガラ ス, アル ミ ナ焼結体やポ リ イ ミ ド フ イ ノレ ム, ポ リ エ ス テ ル フ ィ ノレ ム , ポ リ エチ レ ン フ ィ ル 厶 , ポ リ フ エ 二 レ ン ス ゾレ フ イ ド膜, ポ リ ノ、。 ラ キ シ レ ン 膜 な どの各種絶縁性プラ スチ ッ ク な どが使用可能であ る。 ま た、 液晶表示装置の場合には基板 1 と しては透明であ る こ とが好ま しい。  The substrate 1 can be made of any insulating material. Specifically, the substrate 1 can be made of glass, aluminum sintered body, polyimide, or polyester. Inolem, Polyethylene film, Polyethylene film, Polyno. Various insulating plastics such as laxylene film can be used. In the case of a liquid crystal display device, it is preferable that the substrate 1 is transparent.
ゲー ト 電極 2 , ソ ー ス電極 5 およ び ド レ イ ン電極 6 と しては、 金, 白金, ク ロ ム, ノ、。ラ ジウ ム, アル ミ ニ ウ ム, イ ン ジウ ム, モ リ ブデン等の金属や、 低抵抗ポ リ シ リ コ ン, 低抵抗アモルフ ァ ス シ リ コ ン, 錫酸化物, 酸化イ ン ジゥ ム, イ ン ジウ ム , 錫酸化物 ( I T O ) 等を用いる の が一般的であ るが、 勿論これらの材料に限 られる訳では な く 、 またこ れ らの材料を 2 種以上用いて も差 し支えな い。 こ こ でこ れ ら電極を設ける方法と しては、 蒸着, ス パ ッ タ リ ン グ, め っ き, 各種 C V D成長等の方法がある。 更に導電性の有機系低分子化合物や 7: -共役系高分子を 用いて も差 し支え.ない。 その場合は L B法も適用可能で め る。 The gate electrode 2, the source electrode 5 and the drain electrode 6 are gold, platinum, chromium, and gold. Radium, aluminum, Metals such as indium and molybdenum, low-resistance polysilicon, low-resistance amorphous silicon, tin oxide, indium oxide, indium, and tin oxide It is common to use (ITO) or the like, but of course, it is not limited to these materials, and two or more of these materials can be used. Methods for providing these electrodes here include methods such as vapor deposition, sputtering, plating, and various types of CVD growth. Furthermore, a conductive organic low-molecular compound or 7: -conjugated polymer may be used. In that case, the LB method can be applied.
なお、 第 1 図に示す F E T素子や、 第 2 図に示す F E T素子を駆動部 とする液晶表示装置においては、 p 型シ リ コ ンゃ n型シ リ コ ンをゲー ト電極 2 と基板 I を兼ねて 用いて も よ い。 こ の場合には、 基板 1 を省略する こ とが でき る。 また、 こ の場合には p 型シ リ コ ンや n 型シ リ コ ンの体積固有抵抗率は幾らで も良いが、 実用上は半導体 層 と して用いる 7Γ —共役系高分子膜 4 のそれよ り も小さ いこ とが好ま しい。 また、 F E T素子の使用 目 的に応じ て、 ゲー ト電極 2 と基板 1 を兼ね、 ステ ン レ ス板, 銅板 な どの導電性の板またはフ ィ ルムを用いる こ と も可能で の る。  In a liquid crystal display device using the FET element shown in FIG. 1 or the FET element shown in FIG. 2 as a driving portion, a p-type silicon and an n-type silicon are connected to the gate electrode 2 and the substrate I. It may be used as a function. In this case, the substrate 1 can be omitted. In this case, the volume resistivity of the p-type silicon or the n-type silicon may be any value. However, in practice, the 7Γ-conjugated polymer film 4 used as a semiconductor layer may be used. It is preferable to be smaller. Further, depending on the purpose of use of the FET element, a conductive plate or film such as a stainless steel plate or a copper plate can be used as the gate electrode 2 and the substrate 1.
また絶縁膜 3 と しては絶縁性の も のであれば、 無機, 有機のいずれの材料でも使用可能であ り 、 一般的には酸 化シ リ コ ン ( S i 0 2 ) , 窒化シ リ コ ン, 酸化アル ミ ニウ ム, ポ リ エチ レ ン, ポ リ エステル, ポ リ イ ミ ド, ポ リ フ エ 二 レ ン ス ル フ イ ド, ポ リ パラ キ シ レ ン, ポ リ ア ク リ ロ ニ ト リ ル, 各種絶縁性 L B膜等が用 い られる。 勿論、 こ れ ら の材料を 2 つ以上併せて用いて も良い。 こ れ ら の絶縁膜 の作製方法 と しては特に制限はな く 、 例えば C V D 法, プラ ズマ C V D 法, プラ ズマ重合法, 蒸着法, ス ピ ン コ —テ ィ ン グ法, デイ ツ ビ ン グ法, ク ラ ス タ ーイ オ ン ビー 厶蒸着法, L B 法な どが挙げ られるがいずれ も使用可能 であ る。 ま た、 p 型 シ リ コ ンや n 型シ リ コ ンをゲー ト 電 極 2 と基板 1 を兼ねて用いる場合には、 絶縁膜 3 と して は シ リ コ ン の熱酸化法等によ っ て得 られる酸化シ リ コ ン 膜が好んで用 い られる。 Also as an insulating film 3 as long as also the insulating inorganic state, and are also available in any material of an organic, generally the acid oak Li co down (S i 0 2), nitrided Li Con, aluminum oxide, Polyethylene, Polyester, Polyimide, Polyphenylene Sulfide, Polyparaxylene, Polyacrylonitrile, Various Insulation A LB film or the like is used. Of course, two or more of these materials may be used in combination. There is no particular limitation on the method for producing these insulating films, and examples thereof include a CVD method, a plasma CVD method, a plasma polymerization method, a vapor deposition method, a spin-coating method, and a datetime method. , A cluster ion beam evaporation method, an LB method, etc., all of which can be used. When p-type silicon or n-type silicon is used for both the gate electrode 2 and the substrate 1, the insulating film 3 may be formed by a method such as thermal oxidation of silicon. The silicon oxide film thus obtained is preferably used.
液晶表示装置の内、 液晶表示部 1 2において F E T素子 の ド レ イ ン電極 6 と短絡 した電極 7 は充分な電導度を有 し、 液晶に不溶であ る も のな らばなんで も良 く 、 金, 白 金, ク ロ ム, アル ミ ニウ ムな どの金属や錫酸化物, 酸化 イ ン ジ ウ ム, イ ン ジ ウ ム · 錫酸化物 ( I T 〇) な どの透 明電極、 あ る いは導電性を有する有機系高分子を用 いて も良い。 勿論、 こ れ らの材料を 2 つ以上組み合わせて用 いて も良い。 ガラ ス板 1 0上の電.極 9 と しては錫酸化物, 酸化イ ン ジ ウ ム · 錫酸化物 ( I Τ 0 ) な どの透明電極を 用いる のが一般的であ る。 ま た、 適度の透明度を有する 導電性有機系高分子を用いて も良い。 あ る いは こ れ ら の 材料を 2 つ以上併せて用いて も良い。 ただ し、 こ れ ら電 極 7 お よび電極 9 には、 S iひ 2の斜め蒸着またはラ ビン グ 等の配向処理を施 してお く 必要があ る。 液晶層 8 にはゲ ス ト · ホ ス ト型液晶, T N型液晶, ま たはス メ ク チ ッ クIn the liquid crystal display device, the electrode 7 short-circuited with the drain electrode 6 of the FET element in the liquid crystal display section 12 has sufficient electric conductivity and is insoluble in the liquid crystal. Metal, such as gold, gold, white gold, chromium, and aluminum, and transparent electrodes such as tin oxide, indium oxide, indium tin oxide (IT IT), etc. Alternatively, an organic polymer having conductivity may be used. Of course, two or more of these materials may be used in combination. As the electrode 9 on the glass plate 10, a transparent electrode such as tin oxide, indium oxide / tin oxide (IΤ0) is generally used. Alternatively, a conductive organic polymer having appropriate transparency may be used. Alternatively, two or more of these materials may be used in combination. However, these The electrodes 7 and 9 need to be subjected to an orientation treatment such as oblique deposition or rubbing of Si 2 . The liquid crystal layer 8 includes a guest-host type liquid crystal, a TN type liquid crystal, or a smectic.
C相液晶等の液晶が用レ、 られるが、 基板 1 においてガラ スを用い、 電極 7 に透明電極を用いる場合には、 基板 1 に偏光板を取り 付ける こ とによ り コ ン ト ラ ス ト比が上が る。 偏光板付きガラ ス板 1 0の偏光板は偏光する も のであ ればなんで も良い o A liquid crystal such as a C-phase liquid crystal can be used. However, when a glass is used for the substrate 1 and a transparent electrode is used for the electrode 7, the contrast can be improved by attaching a polarizing plate to the substrate 1. The ratio increases. Glass plate with polarizing plate 10 Any polarizing plate is acceptable as long as it is polarized o
また、 半導体層と して働 く 7Γ —共役系高分子膜又はそ の L B膜 4 の材料と しては、 その 7Γ —共役系高分子の前 駆体が溶剤に可溶であれば使用可能であ り 、 2 種以上を 併せて用いて も良い。 また前駆体の L B膜の作製には、 両親媒性を有している も のが好んで用 い られる。 7 _共 役系高分子の前囅体が溶剤に可溶であ る も のの内、 特に 一般式(1)  In addition, as the material of the 7 く -conjugated polymer film or its LB film 4 acting as a semiconductor layer, it can be used as long as the precursor of the 7Γ-conjugated polymer is soluble in a solvent. However, two or more kinds may be used in combination. For the preparation of a precursor LB film, a material having amphipathic properties is preferably used. 7 _ Among the compounds whose precursors are soluble in the solvent, especially the general formula (1)
Figure imgf000014_0001
Figure imgf000014_0001
(但し、 R , および R 2 は— H , アルキル基, アルコキ シ基の内の一種、 n は 1 0以上の整数) で表される 7Γ —共 役系高分子が F E T素子の特性上優れている。 更に、 π 一共役系高分子前駆体の合成の容易 さか ら、 R , およ び R 2 がー Ηの 7Γ —共役系高分子が好んで用い られる。 こ こ で溶剤 と は、 各種有機溶媒, 水、 お よびそれらの混合 さ れた も のをい う 。 (Where R and R 2 are —H, an alkyl group or an alkoxy group, and n is an integer of 10 or more). I have. Furthermore, a 7Γ-conjugated polymer in which R, and R 2 are ら れ る is preferably used because of easy synthesis of a π- conjugated polymer precursor. Here, the solvent refers to various organic solvents, water, and mixtures thereof. What was said.
特に前駆体の L B膜の作製には、 水よ り も比重が軽 く 水に溶けに く く 、 かつ蒸発 しやすい有機溶媒が好んで用 レ、 られる。  In particular, an organic solvent which has a lower specific gravity than water, is less soluble in water, and easily evaporates is preferably used for the preparation of a precursor LB film.
次に一般式(1)において、 R , お よ び R 2 が共に 一 Hで あ る 7Γ —共役系高分子の前駆体について説明する。 一般 式(1 )において、 R , お よ び R 2 が共に 一 Hであ る 7Γ —共 役系高分子の前駆体 と しては、 一般式(2)Next, a precursor of a 7Γ-conjugated polymer in which R and R 2 are both 1 H in the general formula (1) will be described. In the general formula (1), the precursor of the 7Γ-conjugated polymer in which R and R 2 are both 1 H is represented by the general formula (2)
Figure imgf000015_0001
Figure imgf000015_0001
(但 し、 R 3 は炭素数 1 〜 1 0の炭化水素基) で表さ れる も のが保存安定性の観点か ら好んで用 い られる。 こ こ で 、 一般式(2)の中の R 3 と しては、 炭素数 1 〜 1 0の炭化水 素基であればいずれ も使用可能であ り 、 例えば メ チル, ェチル, プロ ピル, イ ソ プロ ピル, n — プチノレ, 2 — ェ チルへキ シ ル, シ ク πへキ シル基等が挙げ られるが、 炭 素数 1 〜 6 の炭化水素基、 特に メ チル、 ェチル基が実用 上好ま れる。 本発明に用い られる高分子前駆体の合成法 については、 特に制限はないが、 以下に述べる スルホ二 ゥ ム塩分解法に よ っ て得 られる高分子前駆体が、 安定性 の上か ら好ま しい。 (Wherein R 3 is a hydrocarbon group having 1 to 10 carbon atoms) is preferably used from the viewpoint of storage stability. Here, any of R 3 in the general formula (2) can be used as long as it is a hydrocarbon group having 1 to 10 carbon atoms. For example, methyl, ethyl, propyl, Isopropyl, n-butynole, 2-ethylhexyl, and cyclopihexyl groups are examples, but hydrocarbon groups having 1 to 6 carbon atoms, particularly methyl and ethyl groups, are practical. Preferred. The method for synthesizing the polymer precursor used in the present invention is not particularly limited, but a polymer precursor obtained by a sulfonium salt decomposition method described below is preferred from the viewpoint of stability. .
一般式(2)をスルホニゥ 厶塩分解法に よ っ て得る場合の モ ノ マ と しては、 般式(3) When the general formula (2) is obtained by a sulfonium salt decomposition method For the monomer, the general formula (3)
R 4 R 4
S + - CH 2 C H - S + · 2 A一 (3)S + -CH 2 CH-S + 2 A-one (3)
R s '
Figure imgf000016_0001
R s'
Figure imgf000016_0001
(但し、 R 4 およ び R 5 は炭素数 ! 〜 1 0の炭化水素基、 A - は^"イ オ ン) で表される 2 , 5 - チ ェ二 レ ン ジアル キルスルホニゥ ム塩が用い られる。 こ こで一般式(3)中の R 4 およ び R 5 と しては、 炭素数 1 〜 1 0の炭化水素基で あればいずれも使用可能であ り 、 例えばメ チル, ェチル, プロ ル, イ ソ プロ ピル, n — プチル, 2 —ェチルへキ シル, シク ロへキシル, ベン ジル基等が挙げ られるが、 炭素数 1 〜 6 の炭化水素基、 特に メ チル, ェチル基が好 んで用い られる。 対ィ ォ ン A — と しては特に制限がない が、 例えばハ ロ ゲ ン, 水酸基, 4 フ ッ 化ホウ素, 過塩素 酸, カ ルボン酸, スルホ ン酸イ オ ン等が挙げ られるが、 そのなかで も塩素, 臭素等のハロ ゲンおよ び水酸基ィ ォ ンが好ま しい。 (However, R 4 and R 5 are a hydrocarbon group having from 10 to 10 carbon atoms, and A-is a 2,5-dialkylalkylsulfonium salt represented by ^ "ion). Here, as R 4 and R 5 in the general formula (3), any one can be used as long as it is a hydrocarbon group having 1 to 10 carbon atoms, for example, methyl and ethyl. , Prol, iso-propyl, n-butyl, 2-ethylhexyl, cyclohexyl, benzyl, etc., and a hydrocarbon group having 1 to 6 carbon atoms, especially methyl and ethyl groups. The ion A is not particularly limited, and examples thereof include halogen, a hydroxyl group, boron tetrafluoride, perchloric acid, carboxylic acid, and sulfonate ion. Among them, halogens such as chlorine and bromine and hydroxyl ions are preferable.
—股式は)を綰合重合 して一般式(2)を得る場合の溶媒と しては、 水, アルコ ール単独、 並びに水および/または ア ルコ ールを含む混合溶媒な どが用い られる。 縮合重合 させる場合には、 反応溶液はア ルカ リ 溶液であ る こ とが 好ま し く 、 ア ル力 リ 溶液 と しては p H 1 1以上の強い塩基 性溶液であ る こ とが好ま しい。 用レ、 られる ア ルカ リ と し ては、 水酸化ナ ト リ ゥ 厶, 水酸化力 リ ゥ ム, 水酸化カ ル シゥ ム, 第 4 級ア ンモニゥ 厶塩水酸化物, スルホニゥ 厶 塩水酸化物, 強塩基性イ オ ン交換樹脂 ( 0 H型) 等が挙 げ られるが、 特に水酸化ナ ト リ ウ ム, 水酸化カ リ ウ ム, 第 4 級ア ンモニ ゥ ム塩水酸化物, 強塩基性イ オ ン交換樹 脂が好んで用 い られる。 Water, alcohol alone, or a mixed solvent containing water and / or alcohol may be used as a solvent for obtaining general formula (2) by polymerization of). Can be In the case of performing condensation polymerization, the reaction solution is preferably an alkaline solution, and the alkaline solution is preferably a strong basic solution having a pH of 11 or more. New Alkali that can be used is sodium hydroxide, hydroxide hydration, calcium hydroxide, quaternary ammonium salt hydroxide, sulfonium. Salt hydroxide, strong basic ion exchange resin (OH type), etc., especially sodium hydroxide, potassium hydroxide, quaternary ammonium salt hydroxide , Strongly basic ion exchange resin is preferred.
スルホニゥ 厶塩が熱、 光、 特に紫外線, 強塩基性な ど の条件下では不安定であ る ために、 縮合重合の後、 徐々 に脱スルホニゥ 厶塩化が生 じ、 ア ル コ キ シ基への変換が 有効に行えな く な く ため、 縮合重合反応は比較的低温、 即ち、 °C以下、 特に 5 °C以下、 更に - 1 0 °C以下の温度で 反応を行う のが望ま しい。 反応時間は重合温度に よ り適 宜決めればよ く 、 特に限定さ れないが、 通常 1 0分〜 50時 間の範囲にあ る。  Sulfonium salts are unstable under heat, light, especially ultraviolet light, and strong basic conditions. After condensation polymerization, sulfonium chloride is gradually removed, and the sulfonium salt is converted to the alkoxy group. It is desirable to carry out the condensation polymerization reaction at a relatively low temperature, that is, at a temperature of not more than ° C, particularly not more than 5 ° C, and more preferably not more than -10 ° C, since the conversion of the compound cannot be effectively performed. The reaction time may be appropriately determined depending on the polymerization temperature and is not particularly limited, but is usually in the range of 10 minutes to 50 hours.
ス ルホニゥ ム塩分解法に よれば、 重合後、 最初 に 7Γ — 共役系高分子の前駆体はスルホニ ゥ 厶塩、 即ち 一 S + ( A — ) を側鎖に有する高分子量 According to the sulfonium salt decomposition method, after polymerization, the precursor of the 7Γ-conjugated polymer is initially a sulfonium salt, that is, a high molecular weight having one S + (A—) in the side chain.
s R 5  s R 5
の高分子電解質 (高分子スルホニゥ 厶塩) と して生成す るが、 スルホ二ゥ ム塩側鎖が溶液中のア ルコ ール ( R 3 0 H ) と反応 し、 アルコ ールのア ル コ キ シ基 〔(2)式中の 0 R 3 に相当する〕 が側鎖 とな る。 従っ て、 用 いる溶媒 は上記の R 3 〇 Hのアルコ ールを含むこ とが必要であ る, こ れ らのア ルコ ー ルは単独ま たは他の溶媒 と併用 して用 いて も良い。 混合 して用 いる溶媒はア ル コ ールに可溶で あれば特に制限はないが、 実用上水が好んで用 い られる, 混合溶媒を用いる と きの混合比についてはアルコ ールが 存在しておれば良いが、 アルコ ールは 5 重量パーセ ン 卜 以上であ るのが好ま しい。 Polyelectrolyte but that generates as a (polymer Suruhoniu厶塩) sulfonyl © unsalted side chains react with A Turkey Lumpur in the solution (R 3 0 H), alcohol in A Le The oxy group [corresponding to 0 R 3 in the formula (2)] is a side chain. Therefore, it is necessary that the solvent used contains the alcohol of R 3 〇H described above. These alcohols may be used alone or in combination with other solvents. good. The solvent used for mixing is not particularly limited as long as it is soluble in alcohol, but water is preferred for practical use. As for the mixing ratio when the mixed solvent is used, it is sufficient that alcohol is present, but it is preferable that the alcohol be 5 weight percent or more.
スルホニゥ ム側鎖をアルコ キシ基に置換する反応にお いては、 縮合重合後アルコ ールを含む溶媒中で縮合重合 温度よ り 高 く する こ とで、 有効にスルホニゥ ム側鎖をァ ルコキシ基に置換させる こ とができ る。 重合の溶媒が上 記アルコ ールを含む場合、 重合に引 き続いてアルコキシ 基の置換反応を行わせる こ とができ る。 一方、 重合の溶 媒が水な どで、 アルコ ールを含まない場合には、 重合後 アルコ ールを混合 して同様に行う こ とができ る。 アルコ キシ基への置換反応では、 反応速度の観点か ら 0 か ら 5 0 °Cが好ま し く 、 0 でか ら 25 °Cがよ り好ま しい。 アルコ キシ基を側鎖に有する高分子は、 一般的に用いた混合溶 媒に不溶であ る ので、 反応の進行と共に沈澱する。 従つ て反応時間は沈澱が充分生 じる まで行う のが効果てきで あ り 、 1 5分以上が好ま しいが、 収量の観点か らは 1 時間 以上が好ま しい。 こ のよ う に して側鎖にアルコキシ基を 有する - 共役系高分子前駆体は沈澱生成物をろ過する こ と によ って分離される。  In the reaction in which the sulfonium side chain is replaced with an alkoxy group, the sulfonium side chain can be effectively converted to an alkoxy group by raising the condensation polymerization temperature in a solvent containing alcohol after the condensation polymerization. Can be replaced by When the solvent for the polymerization contains the above-mentioned alcohol, the substitution reaction of the alkoxy group can be performed following the polymerization. On the other hand, when the solvent for the polymerization is water or the like and does not contain alcohol, the same procedure can be performed by mixing the alcohol after polymerization. In the substitution reaction with an alkoxy group, 0 to 50 ° C is preferable from the viewpoint of the reaction rate, and 0 to 25 ° C is more preferable. Since the polymer having an alkoxy group in the side chain is insoluble in a commonly used mixed solvent, it precipitates as the reaction proceeds. Therefore, it is effective to carry out the reaction time until precipitation is sufficiently generated. The reaction time is preferably 15 minutes or more, but from the viewpoint of yield, it is preferably 1 hour or more. In this way, the -conjugated polymer precursor having an alkoxy group in the side chain is separated by filtering the precipitated product.
塗布性の高い 7Γ - 共役系高分子前駆体を得る ためには 分子量が充分大きいこ とが好ま し く 、 少な く と も一般式 (2)の 7Γ - 共役系高分子前駆体の繰 り 返 し単位 n を 1 0以上 好ま し く は 20ない し 5 00 00を有する も の、 例えば分画分 子量 35 00以上の透析膜に よ る透析処理で透析さ れない分 子量を有する よ う な ものが効果的に用い られる。 In order to obtain a 7Γ-conjugated polymer precursor having high coatability, it is preferable that the molecular weight is sufficiently large, and at least the repetition of the 7Γ-conjugated polymer precursor of the general formula (2) is preferable. Having a unit n of 10 or more, preferably 20 to 500,000, such as a fraction A material having a molecular weight that cannot be dialyzed by dialysis treatment with a dialysis membrane having a molecular weight of 3500 or more is effectively used.
一般式(2)で しめ さ れる ア ル コ キ シ基な どの脱離基 側 鎖に有する ; r -共役系高分子前駆体は溶解性に優れ、 多 く の有機溶媒に可溶であ り 、 こ れ らの有機溶媒 と しては ジ メ チルホルムア ミ ド, ジ メ チルァ セ ト ア ミ ド, ジ メ チ ルス ルホキ シ ド, ジォキサ ン, ク ロ 口 ホ ルム, テ ト ラ ヒ ドロ フ ラ ン等が挙げ られる。  Has a leaving group side chain such as an alkoxy group represented by the general formula (2); the r-conjugated polymer precursor has excellent solubility and is soluble in many organic solvents. Examples of these organic solvents include dimethylformamide, dimethylacetamide, dimethylsulfoxyd, dioxane, black mouth holm, and tetrahydrofura. And the like.
又前駆体の L B膜の作製には、 水よ り も比重が軽 く 、 水に溶けに く く 、 かつ蒸発 しやすい有機溶媒が好 ま しレ、。  For the preparation of the precursor LB film, an organic solvent which has a lower specific gravity than water, is hardly soluble in water, and easily evaporates is preferred.
本発明において用 い られる 7Γ -共役系高分子前駆体薄 膜を得る方法 と しては、. 溶剤に溶か した 7Γ —共役系高分 子前駆体溶液を用いて、 ス ピ ン コ ー ト 法, キ ャ ス ト 法, デイ ツ ビ ン グ法, ハ'' '一 コ ー ト 法, α —ルコ ー ト 法等が用 い られる。 その後、 溶剤を蒸発 させて 7Γ -共役系高分子 前駆体薄膜を得、 こ の 7Γ -共役系高分子前駆体薄膜を加 熱する こ と に よ っ て半導体を して働 く Γ -共役系高分子 膜を得る。 7Γ —共役系高分子前駆体薄膜を加熱する こ と に よ っ て、 7Γ —共役系高分子膜にする と き の加熱条件と しては特に制限がないが、 実用.上 20 CTC以上、 3 00て以 下で、 不活性気体雰囲気下で行う こ とが望ま しい。 勿論、 As a method for obtaining a 7Γ-conjugated polymer precursor thin film used in the present invention, a spin coat using a 7Γ-conjugated polymer precursor solution dissolved in a solvent is used. Method, cast method, dating method, c-coat method, α-report method, etc. are used. Thereafter, the solvent is evaporated to obtain a 7Γ-conjugated polymer precursor thin film, and the 7Γ-conjugated polymer precursor thin film is heated to act as a semiconductor by heating the 7Γ-conjugated polymer precursor thin film. Obtain a polymer membrane. By heating the 7Γ-conjugated polymer precursor thin film, the heating conditions for forming the 7Γ-conjugated polymer film are not particularly limited, but are practical. In the following, it is desirable to carry out the reaction under an inert gas atmosphere. Of course,
20 0て以下の加熱において も、 7Γ -共役系高分子前駆体 薄膜を 一共役系高分子膜にする こ と は可能であ る。 ま た、 H C 1 や H B r な どのプロ ト ン酸を含む不活性気体 雰囲気下で加熱する と、 Γ 一共役系高分子前駆体薄膜か ら 7Γ -共役系高分子薄膜への変換がス ム ー ズに進む場合 が多い。 Even when the heating is performed at a temperature of 200 or less, it is possible to convert the 7-conjugated polymer precursor thin film into a monoconjugated polymer film. In addition, inert gas containing protonic acids such as HC1 and HBr When heated in an atmosphere, the conversion from a Γ-conjugated polymer precursor thin film to a 7Γ-conjugated polymer thin film often proceeds smoothly.
一方本発明において用い られる 7Γ —共役系高分子前駆 体の L B膜を得る方法と しては、 純粋ま たは塩の水溶液 等をサブフ エ イ ズと し溶剤に溶か した —共役系高分子 前駆体溶液を展開液と して用いて、 Ku hn型 トラフ を用い た垂直浸漬法, 水平付着法, およびム一 ビ ン グウ ォ ール 型 ト ラ フ を用 いた L B膜作製法等に よ る L B 法を用い、 基板に堆積する。 その後、 水分を蒸発させて乾燥した 7Γ 一共役系高分子前駆体の L B膜を得、 こ の 7Γ —共役系高 分子前駆体の L B膜を加熱する こ とによ っ て半導体と し て働 く —共役系高分子の L B膜を得る。 一共役系高 分子前駆体の L B膜を加熱する こ と によ っ て、 7Γ —共役 系高分子の L E膜にする と きの加熱条件と しては特に制 限はないが、 実用上 200 eC以上、 300 °C以下で、 不活性 気体雰囲気下で行う こ とが望ま しい。 勿論、 200て以下 の加熱において も、 7Γ —共役系高分子前駆体の L B膜を 7Γ —共役系高分子の L B膜にする こ とは可能であ る。 ま た、 H C 1 や H B r な どのプロ ト ン酸を含む不活性気体 雰囲気下で加熱する と、 7Γ —共役系高分子前駆体の L B 膜か ら 7Γ —共役系高分子の L B膜への変換がス ムーズに 進む場合が多い。 On the other hand, as a method for obtaining an LB film of a 7Γ-conjugated polymer precursor used in the present invention, a pure or salt aqueous solution or the like is converted into a subphase and dissolved in a solvent—a conjugated polymer. Using the precursor solution as a developing solution, a vertical immersion method using a Kuhn-type trough, a horizontal deposition method, and an LB film production method using a mu- ing-wall type trough are used. Deposit on the substrate using the LB method. After that, water is evaporated to obtain a dried 7Γ-conjugated polymer precursor LB film, and the 7Γ-conjugated polymer precursor LB film is heated to act as a semiconductor. -Obtain LB film of conjugated polymer. By heating the LB film of a monoconjugated polymer precursor, there is no particular limitation on the heating conditions for forming a 7Γ-conjugated polymer LE film, but practically 200 e C above, below 300 ° C, arbitrary and desired this carried out in an inert gas atmosphere. Of course, it is possible to convert the 7Γ-conjugated polymer precursor LB film into a 7Γ-conjugated polymer LB film even with heating of 200 て or less. When heated in an atmosphere of an inert gas containing protonic acids such as HC1 and HBr, the LB film of 7 共 役 -conjugated polymer is converted to the LB film of 7Γ-conjugated polymer. Conversion often proceeds smoothly.
なお前駆体の L B膜の作製上、 7Γ -共役系高分子の前 駆体が溶剤可溶であ っ て も、 充分な両親媒性を有 してい ない場合には、 こ れをステア リ ン酸ゃァ ラ キ ジ ン酸な ど の良好な両親媒性化合物 と混合 して調整 した展開液を用 いて L B膜を作製する こ とが可能であ る。 ま たサブフ エ ィ ズ上の両親媒性化合物の単分子膜に上記 7Γ -共役系高 分子の前駆体を吸着させて L B膜を作製する こ とが可能 であ る。 In addition, before preparing the precursor LB film, before the 7Γ-conjugated polymer If the precursor is solvent-soluble but does not have sufficient amphipathic properties, it may be combined with a good amphipathic compound such as stearic acid arachidic acid. It is possible to produce an LB film using the developing solution prepared by mixing. In addition, it is possible to prepare an LB film by adsorbing the above-mentioned 7-conjugated high molecular weight precursor to a monomolecular film of an amphipathic compound on a subphase.
こ の よ う に、 7Γ —共役系高分子膜を、 従来の電解重合 等の よ う に直接 π -共役系高分子膜又はそ の L Β膜を作 る のではな く 、 最初に溶剤可溶な 7Γ —共役系高分子前駆 体を用 いて高分子前駆体膜又はその L B膜を作製 し、 こ れを 7Γ —共役系高分子膜又はその L Β膜に変える よ う に すれば、 7Γ -共役系高分子膜又はそ の L B膜を大面積基 板上に均一に作製する こ とが容易 とな る。  In this way, instead of forming a 7Γ-conjugated polymer film directly into a π-conjugated polymer film or its L film as in conventional electrolytic polymerization, a solvent is first used. By preparing a polymer precursor film or its LB film using a soluble 7Γ-conjugated polymer precursor and converting it to a 7Γ-conjugated polymer film or its L-film, 7 、 -It is easy to uniformly produce a conjugated polymer film or its LB film on a large area substrate.
7: —共役系高分子は、 ドー ピ ン グ処理を施さ な て も 電導度は低い ものの、 一般的には半導体 と しての性質を 示す も のは多い。 しか し、 F Ε Τ素子の特性の向上のた めに、 しば しば ドー ピ ン グ処理が行われる。 こ の ド一ピ ン グの方法 と しては化学的方法と物理的方法があ る。 (工業材料, 34巻, 第 4 号, 55頁, 1 986年) 。 前者には ①気相か らの ドー ピ ング, ②液相か らの ド一ビ ン グ, ③ 電気化学的 ド一 ビ ン グ, ④光開始 ド一 ピ ン グ等の方法が あ り 、 後者ではイ オ ン注入法があ り 、 いずれ も使用可能 であ る。 次に、 第 3 図 と第 4 図はそれぞれ本発明によ る F E T 素子の他の実施例を示す断面図で、 13は第 3 図では 7Γ - 共役系高分子膜 4 上に積層 し、 第 4 図では基板 1 とゲ— 卜電極 2 上に積層 した も ので、 それぞれ 7Γ -共役系高分 子 4 の前駆体膜か ら π -共役系高分子膜への変換反応を 促進させる酸供与膜であ る。 第 3 図において、 7Γ —共役 系高分子膜 4 と酸供与膜 1 3の位置を交換し、 すなわち絶 緣膜 3 、 ソ ー ス電極 5 と ド レイ ン電極 6 上に酸供与膜 1 3 を積層 し、 酸供与膜 1 3上に 7Γ -共役系高分子膜を積層 し た構成と して も、 作製された F E T素子はゲー ト電圧の 印加に よ り 、 ソース ' ド レイ ン電流を制御する こ とがで ぎ る。 7: —Conjugated polymers have low electrical conductivity even after doping, but generally exhibit properties as semiconductors. However, doping processing is often performed in order to improve the characteristics of the FΕ element. The doping method includes a chemical method and a physical method. (Industrial Materials, Vol. 34, No. 4, p. 55, 1986). For the former, there are methods such as (1) doping from the gas phase, (2) doping from the liquid phase, (3) electrochemical doping, and (4) light-start doping. In the latter, there is an ion injection method, and any of them can be used. Next, FIGS. 3 and 4 are cross-sectional views showing another embodiment of the FET device according to the present invention. In FIG. 3, 13 is laminated on the 7-conjugated polymer film 4 in FIG. In FIG. 4, the acid donor film is used to promote the conversion reaction from the precursor film of the 7 共 役 -conjugated polymer 4 to the π-conjugated polymer film, since they are laminated on the substrate 1 and the gate electrode 2 respectively. It is. In FIG. 3, the positions of the 7Γ-conjugated polymer film 4 and the acid donor film 13 are exchanged, that is, the acid donor film 13 is placed on the insulating film 3, the source electrode 5 and the drain electrode 6. Even if the 7 FET-conjugated polymer film is laminated on the acid donor film 13, the fabricated FET device controls the source-drain current by applying the gate voltage. You can do it.
第 5 図は本発明に よ る液晶表示装置の他の実施例を示 す断面図で、 13は 7Γ —共役系高分子膜 4 上に積層 し、 π 一共役高分子 4 の前駆体膜か ら π -共役系高分子への変 換反応を促進させる酸供与膜であ る。  FIG. 5 is a cross-sectional view showing another embodiment of the liquid crystal display device according to the present invention, in which 13 is laminated on a 7Γ-conjugated polymer film 4 and is a precursor film of π-conjugated polymer 4. It is an acid donor film that promotes the conversion reaction to π-conjugated polymers.
第 3 図, 第 4 図及び第 5 図におけるその他の部分は、 上述した第 1 図及び第 2 図の相当部分と同様な ものであ り 、 作製法も同様であ る。  The other parts in FIGS. 3, 4 and 5 are the same as the corresponding parts in FIGS. 1 and 2 described above, and the manufacturing method is also the same.
酸供与層 1 3は、 7Γ —共役系高分子前駆体か ら 7Γ —共役 系高分子 4 への変換反応を促進させる ための酸を洪与す る も のであれば良 く 、 特に制限はない。  The acid-donating layer 13 is not particularly limited as long as it is capable of injecting an acid for promoting a conversion reaction from a 7Γ-conjugated polymer precursor to a 7Γ-conjugated polymer 4. .
但し、 F E T素子特性上、 酸供与膜自体は絶縁体であ あ る方が望ま しい。 例えば、 ポ リ イ ミ ドフ ィ ル厶, ポ リ エ ス テ ノレ フ イ ノレ ム , ' ポ リ エ チ レ ン フ ィ ゾレ ム , ポ リ フ エ二 レ ン ス ノレ フ ィ ド フ ィ ル ム, ポ リ ノく ラ キ シ レ ン フ ィ ル ム等 を用いた酸含浸高分子膜、 ル イ ス酸 ' ア ミ ン錯体, 第三 ア ミ ン類, ルイ ス酸ジァ ゾニゥ 厶塩. ルイ ス酸ジァ リ ル ィ ォ ドニゥ ム塩, ルイ ス酸スルホ二ゥ ム塩等の酸発生剤 を含有 した上記高分子膜, p —キ シ リ レ ン 一 ビ ス ( ス ル ホニゥ ム ハ π ゲナイ ド) あ る いはその誘導体等反応に よ り 容易に酸を脱離する膜等があげ られる。 酸供与膜を 得る方法 と しては特に制限はないが、 例えば C V D 法、 プラ ズマ C V D法、 プラ ズマ重合法、 蒸着法、 ク ラ ス 夕 一イ オ ン ビーム蒸着法、 有機分子線ェ ピ夕 キ シ ャ ル成長 法、 ス ピ ン コ ーテ ィ ン グ法、 デイ ツ ビ ン グ法、 L B 法な どが挙げ られるがいずれ も使用可能であ る However, it is desirable that the acid donor film itself be an insulator from the viewpoint of FET device characteristics. For example, poly film, poly Estino-Finnorem, 'Polyethylene-Phizo-Resolem', 'Poly-Eno-Res-No-Film', 'Polyno-Rex-No-Film' Acid-impregnated polymer membranes using lime, etc., amic acid'amine complexes, tertiary amines, diazonium diluate salt. Diaryliodonium diluate salt Polymer membrane containing an acid generator such as sulfonium sulphate, sulphonic acid salt, etc., reaction of p-xylylene-bis (sulfonium π-genide) or a derivative thereof Thus, a film capable of easily desorbing an acid can be used. There is no particular limitation on the method for obtaining the acid donor film. Examples of the method include a CVD method, a plasma CVD method, a plasma polymerization method, an evaporation method, a class ion beam evaporation method, and an organic molecular beam epitaxy. Evening growth method, spin coating method, dating method, LB method, etc. can be used, all of which can be used
以下、 一例 と して、 一般式(1)で表される π 一共役系高 分子を半導体層に用 い、 一般式(4)  Hereinafter, as an example, the π-conjugated polymer represented by the general formula (1) is used for the semiconductor layer, and the general formula (4)
Figure imgf000023_0001
Figure imgf000023_0001
(但 し、 R 6 は、 — H , アルキル基, アル コ キ シ基の内 の一種、 n は 1 0以上の整数) で表 さ れる 7Γ —共役系高分 子を酸供与膜に用 いた も の について説明する。 一般式(4) は、 一般式(5)
Figure imgf000024_0001
(Where R 6 is —H, an alkyl group or an alkoxy group, and n is an integer of 10 or more). A 7Γ-conjugated polymer represented by A description will be given of the object. The general formula (4) is
Figure imgf000024_0001
(但し、 R s は、 一 H , アルキル基, アル コキシ基の内 一種, R 7 及び R 8 は炭素数 1 〜 1 0の炭化水素基、 X - は B r , C 1 等のハロ ゲン、 n は 1 0以上の整数) で表さ れる 7Γ —共役系高分子前駆体を有する。 一般式(5)は水溶 性であ り 、 ス ピンコ ー ト法、 キャ ス ト法、 デイ ツ ビ ン グ 法、 ノく一 コ ー ト法、 ロ ールコ ー ト法等を用いて、 容易に 膜を形成でき る。 したがって半導体層 とな る π 一共役系 高分子薄膜前駆体 (一般式(2) ) と酸供与膜とな る 7Γ -共 役系高分子前駆体膜 (一般式 (5) ) か らなる積層膜を得る 方法と しては特に制限はないが、 溶剤に溶かした 7Γ —共 役高分子前駆体溶液を用いて、 ス ピ ン コ ー ト法, キ ャ ス ト法, デイ ツ ビ ン グ法, バー コ ー ト法, ロ ールコ ー ト法 等によ り 半導体とな る 7Γ -共役高分子前駆体膜 (一股式(However, R s is one of H, an alkyl group or an alkoxy group, R 7 and R 8 are a hydrocarbon group having 1 to 10 carbon atoms, X − is a halogen such as Br, C 1, (n is an integer of 10 or more). The general formula (5) is water-soluble and can be easily prepared by the spin coating method, casting method, dating method, knuckle coating method, roll coating method, etc. A film can be formed. Therefore, a stack consisting of a π-conjugated polymer thin film precursor (general formula (2)) to be a semiconductor layer and a 7Γ-conjugated polymer precursor film (general formula (5)) to be an acid donor film There is no particular limitation on the method of obtaining the film, but the spin-coating method, casting method, and date-forming method using a 7Γ-active polymer precursor solution dissolved in a solvent. 7Γ-conjugated polymer precursor film (single-branch type) that becomes a semiconductor by a method such as the bar coating method and the roll coating method.
(2) ) を得、 溶剤を蒸発させた後、 上記同様の手法によ り 酸供与膜 (一般式(5) ) を積層するのが F Ε Τ素子作製上 好ま しい。 あ る いは上記の ご と く 酸供与膜 (一般式(5) ) を得た後に、 溶剤に溶かした 7Γ -共役系高分子前駆体溶 液を用いて、 ス ピ ン コ ー ト法, キ ャ ス ト法, デイ ツ ピ ン グ法, 、一 コ ー ト 法, ロ ールコ ー ト法等に よ り 半導体層 とな る ττ -共役系高分子前駆体膜 (一般式(2) ) を得、 積 層膜 と して も よ い。 も ち ろん、 上記積層は繰 り 返 し行つ て も構わない。 その後、 上記の ご と く 得 られた積層膜を 加熱する こ と に よ っ て、 半導体 と して働 く 71 —共役系高 分子膜 (一般式(1) ) と絶縁膜 (一般式(4) ) の積層膜を得 る。 7Γ -共役系高分子前駆体薄膜 (一般式(2) ) と酸供与 膜 (一般式(5) ) か らなる積層膜を加熱する こ と に よ っ て、 -共役系高分子膜 (一般式(1) ) と絶縁膜 (一般式 (4) ) か らな る積層膜を得る加熱条件 と しては特に制限はない が、 実用上 100て以上、 300て以下で、 不活性気体雰囲 気下で行 う 事が望ま しい。 After obtaining (2)) and evaporating the solvent, it is preferable to laminate an acid-donating film (general formula (5)) by the same method as described above from the viewpoint of fabricating the F-element. Alternatively, after obtaining the above-described acid donor film (general formula (5)), a spin-coating method using a 7 し た -conjugated polymer precursor solution dissolved in a solvent is performed. The semiconductor layer is formed by a cast method, a dating method, a one-coat method, a roll-coat method, or the like. A ττ-conjugated polymer precursor film (general formula (2)) is obtained, and may be used as a laminated film. Of course, the above lamination may be repeated. Then, by heating the laminated film obtained above, the 71-conjugated high molecular film (general formula (1)) and the insulating film (general formula (4 ))) Is obtained. By heating a laminated film composed of a 7Γ-conjugated polymer precursor thin film (general formula (2)) and an acid donor film (general formula (5)), the -conjugated polymer film (general formula (5)) is heated. The heating conditions for obtaining a laminated film composed of the formula (1)) and the insulating film (general formula (4)) are not particularly limited, but are practically not less than 100 and not more than 300 and an inert gas atmosphere. It is desirable to work in an atmosphere.
上記の よ う に酸供与膜 と して 7Γ —共役系前駆体膜 (一 般式(5) ) を用 いた と き の酸供与法について説明する。 酸 供与層であ る 7Γ -共役系高分子前駆体膜 (一般式(5) ) は、 加熱に よ り 、 ;: 一共役系高分子 (一般式(4) ) へ変換 し、  An acid donating method using a 7-conjugated precursor film (general formula (5)) as the acid donating film as described above will be described. The 7Γ-conjugated polymer precursor film (general formula (5)), which is an acid-donating layer, is converted to a monoconjugated polymer (general formula (4)) by heating.
R τ  R τ
そ の際に、 ス ルホニ ゥ ム ( ) 及び酸 ( H At this time, sulfonium () and acid (H
R 8  R 8
X ) を脱離する。 こ の脱離 した酸が、 半導体層 とな る 7: X). The released acid becomes a semiconductor layer 7:
-共役系高分子前駆体膜 (一般式 (2) ) へ拡散する こ と に よ り 酸が供与さ れる。 なお、 酸供与膜の う ち、 絶縁体の も のは、 F E T素子 において、 酸供与膜 と ゲー ト絶縁膜を兼ねる こ とがで き る (第 4 図) 。 こ の場合は、 F E T素子作製プロ セ スを 簡略化で き る。 -An acid is provided by diffusing into a conjugated polymer precursor film (general formula (2)). The insulator of the acid donor film can be used as both the acid donor film and the gate insulating film in the FET device (FIG. 4). In this case, the FET element fabrication process can be simplified.
上記の よ う に構成さ れた F E T素子並びに こ の F E T 素子を駆動素子とする液晶表示装置の動作機構について、 液晶表示装置の動作機構を述べる こ とによ って説明する。 FET element configured as above and this FET The operation mechanism of the liquid crystal display device using the element as a driving element will be described by describing the operation mechanism of the liquid crystal display device.
動作機構については未だ不明の点が多いが、 7Γ -共役 系高分子膜又はその L B膜 4 と絶縁膜 3 の界面において、 π 一共役系高分子膜 4 又はその L Β膜側に形成した空乏 層の幅がゲ一 ト電極 2 と ソ ース電極 5 との間にかけた電 圧で制御され、 実効的なキヤ リ ヤ ーのチ ャ ネル断面積が 変化する ために ソ ース電極 5 と ド レ イ ン電極 6 の間を流 れる電流が変化する と考え られる。 こ の と き、 7Γ —共役 系高分子膜 4 又はその L Β膜と して電導度の低い ρ 型半 導体性しか持たせていない場合には、 ゲー ト電極 2 と し ては金属電極以外に Ρ型シ リ コ ンや η 型シ リ コ ン、 あ る いは導電性を有する有機系高分子な どの電導度の高い材 料を用いて も、 7Γ —共役系高分子膜 4 又はその L B膜中 に充分大きな幅の空乏層が形成されて電界効果が現れる と考え られる。  Although there are still many unclear points about the operation mechanism, the depletion formed on the π-conjugated polymer film 4 or its LΒ film side at the interface between the 7Γ-conjugated polymer film or its LB film 4 and the insulating film 3 The width of the layer is controlled by the voltage applied between the gate electrode 2 and the source electrode 5, and the width of the layer is controlled by the effective carrier channel cross-sectional area. It is considered that the current flowing between the drain electrodes 6 changes. At this time, if the 7Γ-conjugated polymer film 4 or its LΒ film has only a ρ-type semiconductor with low conductivity, the gate electrode 2 is not a metal electrode. Even when a highly conductive material such as Ρ-type silicon, η-type silicon, or a conductive organic polymer is used, the 7Γ-conjugated polymer film 4 or its It is considered that a sufficiently large width depletion layer is formed in the LB film and an electric field effect appears.
本発明の液晶表示装置において、 上記 F Ε Τ素子部 1 1 と液晶表示部 12は直列に接続されている。 一共役系高 分子膜 4 又はその L Β膜が ρ 型半導体性を示す場合には、 ソ ース電極 5 を基準と して透明電極 9 に負電圧を印加 し てお き、 ゲー ト 電極 2 に負電圧を印加する と、 液晶 8 力く 点灯する こ とになる。 これは上述したよ う に、 F Ε Τ素 子の ソ ー ス · ド レ イ ン電極間の抵抗がゲー ト電極 2 への 負電圧印加によ り 減少し、 液晶表示部 1 2に電圧がかかる ためであ る と考え られる。 一方、 ソ ー ス電極 5 を基準 と して透明電極 9 に負電圧を印加 した ま ま ゲー ト 電圧を切 る と、 液晶 8 は点灯 しな く な る。 これは F E T素子の ソ ー ス · ド レ イ ン電極間の抵抗が大き く な り 、 液晶表示部 1 2に電圧がかか らな く な るためであ る と考え られる。 以 上の よ う に、 本発明の液晶表示装置では、 付属 させた F E T素子に印加する ゲー ト 電圧を変える こ と に よ り 、 液 晶表示部 1 2の駆動を制御でき る。 In the liquid crystal display device of the present invention, the F-element section 11 and the liquid crystal display section 12 are connected in series. If the monoconjugated high molecular film 4 or its L-type film exhibits ρ-type semiconductivity, a negative voltage is applied to the transparent electrode 9 with respect to the source electrode 5 and the gate electrode 2 When a negative voltage is applied to the liquid crystal, the liquid crystal will light up 8 times. This is because, as described above, the resistance between the source and drain electrodes of the F Ε element decreases due to the application of a negative voltage to the gate electrode 2, and the voltage is applied to the liquid crystal display section 12. Take This is considered to be the reason. On the other hand, if the gate voltage is turned off while a negative voltage is applied to the transparent electrode 9 with reference to the source electrode 5, the liquid crystal 8 does not light. It is considered that this is because the resistance between the source and drain electrodes of the FET element is increased, and the voltage is not applied to the liquid crystal display unit 12. As described above, in the liquid crystal display device of the present invention, the driving of the liquid crystal display section 12 can be controlled by changing the gate voltage applied to the attached FET element.
なお、 第 2 図では基板 1 上にゲー ト 電極 2 が設け られ ているが、 逆に、 基板上に 7Γ —共役系高分子膜又は L B 膜を設け、 その上に ソ ー ス電極及びこ の ソ ー ス電極 と分 離 して ド レ イ ン電極を設け、 上記ソ ー ス電極及び ド レ イ ン電極 との間に絶縁膜を介在させて、 絶縁膜上にゲー ト 電極を設けて も良い。 ま た、 基板上にゲー ト電極を設け、 絶縁膜を介在させて、 その上に 7Γ -共役系高分子膜又は L B膜を設け、 更にその上に ソ ース電極及びこ の ソ ー ス 電極 と分離 して ド レ イ ン電極を設けて も良い。 あ る いは ま た、 基板上に ソ ース電極及びこ の ソ ース電極 と分離 し て ド レ イ ン電極を設け、 こ の上に 7Γ —共役系高分子膜又 は L B膜を設け、 更に絶縁膜を介在させてゲー ト 電極を 設けて も良い。  In FIG. 2, the gate electrode 2 is provided on the substrate 1. Conversely, a 7Γ-conjugated polymer film or LB film is provided on the substrate, and the source electrode and the LB film are provided thereon. A drain electrode may be provided separately from the source electrode, a gate electrode may be provided on the insulating film with an insulating film interposed between the source electrode and the drain electrode. good. In addition, a gate electrode is provided on a substrate, a 7 介 在 -conjugated polymer film or an LB film is provided thereon with an insulating film interposed, and a source electrode and the source electrode are further provided thereon. A drain electrode may be provided separately from the above. Alternatively, a source electrode is provided on the substrate and a drain electrode is provided separately from the source electrode, and a 7Γ-conjugated polymer film or LB film is provided thereon. Further, a gate electrode may be provided with an insulating film interposed.
ま た第 3 図では半導体層 と な る 7Γ -共役系高分子膜 4 の上に酸供与膜 1 3が設け られているが、 逆に、 基板 1 上 にゲー ト 電極 2 を設け、 絶緣膜 3 を介在させて、 その上 にソース電極 5 及び ド レイ ン電極 6 を設け、 その上に酸 供与膜 1 3を設け、 その上に半導体層であ る 7Γ -共役系高 分子膜 4 を設けて も よい。 ある いはまた、 第 4 図に示す よ う に、 基板 1 上にゲー ト電極 2 を設け、 その上に酸供 与層 1 3を設けその上に ソ ース電極 5 及び ド レ イ ン電極 6 設け、 さ ら にその上に半導体層であ る 7Γ —共役系高分子 膜 4 を設け、 酸供与膜 1 3とゲー ト絶縁膜 3 を兼ねて使用 して も よい。 あ る いはまた、 基板 1 上にゲー ト電極 2 を 設け、 その上に絶縁膜 3 を兼ねた酸供与層 1 3を設け、 そ の上に半導体層であ る Γ —共役系高分子膜 4 を設け、 そ の上に ソ ース電極 5 及び ドレイ ン電極 6 を設けて も よい。 In FIG. 3, the acid donor film 13 is provided on the 7-conjugated polymer film 4 serving as the semiconductor layer. Conversely, the gate electrode 2 is provided on the substrate 1 and the insulating film is provided. 3 intervening and Alternatively, a source electrode 5 and a drain electrode 6 may be provided, an acid donor film 13 may be provided thereon, and a 7-conjugated high molecular film 4 which is a semiconductor layer may be provided thereon. Alternatively, as shown in FIG. 4, a gate electrode 2 is provided on a substrate 1, an acid supply layer 13 is provided thereon, and a source electrode 5 and a drain electrode are provided thereon. 6 may be provided, and a 7 共 役 -conjugated polymer film 4 which is a semiconductor layer may be provided thereon, and the acid donor film 13 and the gate insulating film 3 may be used together. Alternatively, a gate electrode 2 is provided on a substrate 1, an acid donor layer 13 also serving as an insulating film 3 is provided thereon, and a semiconductor layer is provided thereon. 4 may be provided, on which the source electrode 5 and the drain electrode 6 may be provided.
あ るいはまた基板 1 上にゲー ト電極 2 を設け、 絶縁膜 3 を介在させて、 その上に 7Γ -共役系高分子膜 4 を設け、 その上に酸供与膜 1 3設け、 更にその上にソ ース電極 5 及 び ド レイ ン電極 6 を設けて も良い。 或はまた基板 1 上に ソ ース電極 5 及び ド レ イ ン電極 6 を設け、 こ の上に 7Γ — 共役系高分子膜 4 を設け、 さ らに酸供与膜 1 3を兼ねた絶 縁膜 3 を介在させて、 その上にゲー ト電極 2 を設けて も 良い。  Alternatively, a gate electrode 2 is provided on a substrate 1, an insulating film 3 is interposed, a 7 4-conjugated polymer film 4 is provided thereon, and an acid donor film 13 is provided thereon, and furthermore, Further, a source electrode 5 and a drain electrode 6 may be provided. Alternatively, a source electrode 5 and a drain electrode 6 are provided on the substrate 1, and a 7Γ — conjugated polymer film 4 is provided thereon, and furthermore, an insulating layer serving also as the acid donor film 13 is provided. The gate electrode 2 may be provided with the film 3 interposed therebetween.
また、 第 2 図及び第 5 図の例では F E T素子部 1 1と液 晶表示部 1 2を同一基板上に作製したが、 こ れ らを別々 の 基板上に作製 した後接続して も良い。  In addition, in the examples of FIGS. 2 and 5, the FET element section 11 and the liquid crystal display section 12 are formed on the same substrate, but they may be formed on separate substrates and then connected. .
以下具体的な実施例にて本発明を詳細に説明するが、 こ れに よ つ て本発明を限定する も のではない。 実施例 1 Hereinafter, the present invention will be described in detail with reference to specific examples, but the present invention is not limited thereto. Example 1
抵抗率が 4 〜 8 Ω cmであ る 3 イ ン チ n 型 シ リ コ ン扳を 酸素気流中で加熱 し、 厚さ 3000 A の酸化 シ リ コ ン膜で被 覆 した。 次に、 片側の酸化 シ リ コ ン膜上に通常の真空蒸 着法, フ ォ ト リ ン グラ フ ィ ー技術, 及 びエ ッ チ ン グ技術 を用 いて、 厚さ 200 A の ク ロ ム を下地 とす る厚 さ 300 A の金電極を 5 対設けた。 こ の 5 対の金電極は、 F E T素 子にお いて ソ ー ス電極 と ド レ イ ン電極 と して働 く 。 こ こ で一対の金電極の幅、 即ち チ ャ ネ ル幅は 2 mmであ り 、 両 電極の間隔、 即 ち チ ャ ネ ル長は 6 〃 m であ る よ う に し た。 こ の よ う に して作製 した基板を以下 F E T素子基板 と 呼 ぶ。  A 3-inch n-type silicon with a resistivity of 4 to 8 Ωcm was heated in an oxygen stream and covered with a 3000 A thick silicon oxide film. Next, a 200 A thick copper film was formed on one side of the silicon oxide film by using ordinary vacuum deposition, photolithography, and etching techniques. Five pairs of 300 A-thick gold electrodes were provided on the ground. These five pairs of gold electrodes serve as source and drain electrodes in the FET element. Here, the width of the pair of gold electrodes, that is, the channel width, was 2 mm, and the distance between the two electrodes, that is, the channel length, was 6 μm. The substrate fabricated in this manner is hereinafter referred to as a FET element substrate.
上記 F E T素子基板の温度及 び雰囲気温度を約 6 0 °C に設定 し、 次の化学構造か ら な る ポ リ ( 2 ,  The temperature of the FET element substrate and the ambient temperature were set at about 60 ° C, and the poly (2,
Figure imgf000029_0001
Figure imgf000029_0001
5 一 チ ヱ 二 レ ン ビニ レ ン) 前駆体の約 2 wt? ジ メ チ ルホ ル厶ア ミ ド ( D M F ) 溶液を用 いて、 ス ピ ン コ ー ト 法に て前駆体 フ ィ ルム を F E T素子基板上に得た。 こ の と き 、 ス ピナ一 の回転数は毎分 2000回転 と し た。 得 ら れた前駆 体 フ イ ル ム の膜厚は、 約 800 A であ っ た。  5 Using a solution of about 2 wt% dimethylformamide (DMF) of the precursor, spin-coat the precursor film by spin coating. Obtained on FET element substrate. At this time, the rotation speed of the spinner was set to 2000 rpm. The thickness of the obtained precursor film was about 800 A.
次に、 ポ リ ( 2 , 5 — チ ヱ 二 レ ン ビニ レ ン ) 前駆体 フ ィ ルムで被覆 した F E T素子基板を赤外線ィ メ 一 ジ炉に て、 約 2 時間、 窒素気流下、 270 °Cの条件で加熱 した。 この結果、 前駆体フ ィ ルムの色は、 淡黄色から褐色に変 わっ た。 上記加熱処理によ って、 ポ リ ( 2 , 5 チ ェニ レ ン ビニ レ ン ) 前駆体フ ィ ル ム は ポ リ ( 2 , 5 — チ ヱ ニ レ ン ビニ レ ン) フ ィ ルムへ と変わ り 、 これに伴い、 赤外線 Next, the poly (2,5-diphenylvinylene) precursor The film-coated FET element substrate was heated in an infrared image furnace at 270 ° C. for about 2 hours under a nitrogen stream. As a result, the color of the precursor film changed from light yellow to brown. By the above heat treatment, the poly (2,5 phenylene vinylene) precursor film is converted into the poly (2,5 phenylene vinylene) film. In line with this, infrared
H υ H υ
吸収スぺ ク トルにおいて、 1590 cm — 1に— C = C — に基づ く 吸収が現れた。 In the absorption spectrum, an absorption based on —C = C—appeared at 1590 cm— 1 .
次に、 上記のよ う に して得られたフ ィ ル厶で被覆 した F E T素子基板の他面の酸化シ リ コ ン膜を機械的に剝離 して、 裸の シ リ コ ン表面にガ リ ウ ム とイ ン ジウ ムの合金 を塗布 してォー ミ ッ ク接触を取っ た。  Next, the silicon oxide film on the other surface of the FET element substrate covered with the film obtained as described above was mechanically separated from the bare silicon surface. Rhodium and indium alloys were applied to make ohmic contact.
以上のよ う に して、 シ リ コ ン板自体が 5 個の F E T素 子の共通ゲー ト電極と して働き、 シ リ コ ン板上の酸化シ リ コ ン膜が 5 個の F E T素子の共通のゲ一 ト絶縁膜と し て働 く よ う に した。 こ の よ う に して、 第 I 図に示す F E T素子を得た。 こ こで 1 及び 2 は基板兼ゲー ト電極であ る シ リ コ ン板であ り 、 3 は絶縁膜であ る酸化シ リ コ ン膜、 4 は半導体層 と して働 く ポ リ ( 2 , 5 —チ ェ二 レ ン ビニ レ ン) 前駆体膜から得られたポ リ ( 2 , 5 —チ ェ二 レ ン ビニ レ ン) 膜、 5 及び 6 はそれぞれソ ース及び ド レイ ン 電極 と して働 く 金膜であ る。  As described above, the silicon plate itself functions as a common gate electrode for the five FET elements, and the silicon oxide film on the silicon plate forms the five FET elements. It works as a common gate insulating film. Thus, the FET element shown in FIG. I was obtained. Here, 1 and 2 are silicon plates which are both a substrate and a gate electrode, 3 is a silicon oxide film which is an insulating film, and 4 is a poly (poly) which works as a semiconductor layer. Poly (2,5—Chenylenevinylene) films obtained from 2,5—Chenylenevinylene) precursor films, 5 and 6 are source and drain, respectively. A gold film that works as an electrode.
実施例 2 Example 2
実施例 1 で作製 した F E T素子基板を用いる。 サブフ エ イ ズ (水) の温度を約 2CTCに設定 し、 次の化学構造力、 らな る ポ リ ( 2 , The FET element substrate manufactured in Example 1 is used. Savoff By setting the temperature of AIDS (water) to about 2 CTC,
Figure imgf000031_0001
Figure imgf000031_0001
5 — チ ェ二 レ ン ビニ レ ン ) 前駆体の約 2 wt% ジ メ チ ルホ ル ム ア ミ ド ( D M F ) 溶液 0. 5 7 ^と ク ロ ロ ホ ノレ ム 9. 5 を混合 した溶液を展開液 と して用 いて、 Kuhn型 ト ラ フ に よ る垂直浸漬法にて前駆体の L B膜を上記 F E T素子基 板上を得た。 こ の と き表面圧 は 20mNZ m と した。 得 ら れた前駆体 L B膜の層数は、 100層であ っ た。  5—Chenylenevinylene) Precursor Approximately 2 wt% dimethylformamide (DMF) solution 0.57 ^ mixed with chlorophonolem 9.5 Using this as a developing solution, a precursor LB film was obtained on the FET element substrate by a vertical dipping method using a Kuhn-type trough. At this time, the surface pressure was 20 mNZ m. The number of layers of the obtained precursor LB film was 100 layers.
次に、 ポ リ ( 2 , 5 — チ ヱ二 レ ン ビニ レ ン) 前駆体の Next, the poly (2,5—divinylvinylene) precursor
L B膜で被覆 した F E T素子基板を赤外線ィ メ 一 ジ炉に て、 約 2 時間、 窒素気流下、 210°Cの条件で加熱処理 し た。 こ の結果、 前駆体 L B膜の色は、 淡黄色か ら褐色に 変わ っ た。 上記加熱処理に よ っ て、 ポ リ ( 2 , 5 — チ ェ 二 レ ン ビニ レ ン ) 前駆体の L B膜はポ リ ( 2 , 5 — チ ェ 二 レ ン ビニ レ ン) の L B膜へ と変わ り 、 こ れに伴い、 赤 The FET element substrate covered with the LB film was heated in an infrared image furnace for about 2 hours under a nitrogen stream at 210 ° C. As a result, the color of the precursor LB film changed from light yellow to brown. By the above heat treatment, the LB film of the poly (2,5—Chenylenevinylene) precursor is converted to the LB film of the Poly (2,5—Chenylenevinylene). And, with this, red
H H  H H
外線吸収スぺ ク ト ルにおいて、 1.590CH1— 1に — C = C — に 基づ く 吸収が現れた。 In external absorption spelling click preparative Le, the 1.590CH1- 1 - C = C - group Dzu rather absorption appeared.
次に、 上記の よ う に して得 られた L B膜で被覆 した F E T素子基板の他面の酸化シ リ コ ン膜を機械的に剝離 し て、 裸の シ リ コ ン表面にガ リ ウ ム と イ ン ジ ウ ムの合金を 塗布してォー ミ ッ ク接触を取っ た。 Next, the silicon oxide film on the other surface of the FET element substrate covered with the LB film obtained as described above is mechanically separated from the bare silicon surface to remove the gallium. Alloy of aluminum and aluminum The coating was applied to make an omic contact.
以上のよ う に して、 シ リ コ ン扳自体が 5 個の F E T素 子の共通ゲー ト電極と して働き、 シ レ コ ン扳上の酸化シ リ コ ン膜が 5 個の F E T素子の共通のゲー ト絶縁膜と し て働 ぐ よ う に した。 このよ う に して、 第 1 図に示す F E T素子を得た。 こ こで 1 及び 2 は基板兼ゲー ト電極であ る シ リ コ ン板であ り 、 3 は絶縁膜であ る酸化シ リ コ ン膜、 4 は半導体層 と して働 く ポ リ ( 2, 5 —チ ェ二 レ ン ビニ レ ン ) 前駆体の L B膜か ら得られたポ リ ( 2 , 5 —チ ェ 二 レ ン ビニ レ ン) の L B膜、 5 及び 6 はそれぞれソ ース 及び ド レイ ン電極と して働く 金膜であ る。  As described above, the silicon 扳 itself acts as a common gate electrode of the five FET elements, and the silicon oxide film on the silicon 扳 has five FET elements. It works as a common gate insulating film. Thus, the FET element shown in FIG. 1 was obtained. Here, 1 and 2 are silicon plates which are both a substrate and a gate electrode, 3 is a silicon oxide film which is an insulating film, and 4 is a poly (poly) which works as a semiconductor layer. 2,5—Chenylene vinylene) The LB film of poly (2,5—Chenylene vinylene) obtained from the precursor LB film, and 5 and 6 are the source respectively. It is a gold film that works as a source and drain electrode.
実施例 3 Example 3
第 1 図に示す構造の F E T素子を得る ための、 実施例 2 とは異な る加熱処理を用いた他の実施例を以下に示す。 実施例 2 と同様に して、 L B法によ り 、 F E T素子基 板上にポ リ ( 2, 5 —チ ヱ二 レ ン ビニ レ ン) の L B膜 (100層) を得た。 ただ し、 この実施例では F E T素子基 板上の金電極を厚さ 200 Aの ク ロ ムを下地とする厚さ 3 ひ 0 Aの白金電極に代えてレ、る。  Another embodiment using a heat treatment different from that of the second embodiment for obtaining the FET element having the structure shown in FIG. 1 will be described below. In the same manner as in Example 2, a poly (2,5-divinylvinylene) LB film (100 layers) was obtained on the FET element substrate by the LB method. However, in this embodiment, the gold electrode on the FET element substrate is replaced by a platinum electrode having a thickness of 300 A and a chromium having a thickness of 200 A as a base.
次に、 ポ リ ( 2 , 5 —チヱ二 レ ン ビニ レ ン ) 前駆体の L B膜で被覆した F E T素子基板を赤外線ィ メ 一ジ炉に て、 約 1. 5 時間、 塩化水素ガスを含む窒素気流下、 9CTC の条件で加熱処理 した。 こ の結果、 前駆体 L B膜の色は、 淡黄色か ら金属光沢を帯びた喑紫色に変わ っ た。 上記加 熱処理に よ っ て、 ポ リ ( 2 . 5 — チ ェ 二 レ ン ビニ レ ン ) 前駆体の L B膜はポ リ ( 2 , 5 — チ ェ 二 レ ン ビニ レ ン ) の L B膜へ と完全に変化 した。 こ れに伴い、 赤外線吸収 Next, the FET element substrate coated with the LB film of poly (2,5-divinylvinylene) precursor was placed in an infrared image furnace and contained hydrogen chloride gas for about 1.5 hours. Heat treatment was performed under a nitrogen stream at 9 CTC. As a result, the color of the precursor LB film changed from pale yellow to a purple with a metallic luster. Above Due to the heat treatment, the LB film of the poly (2.5-chlorovinylene) precursor is completely transformed into the LB film of the poly (2,5-chlorovinylene). Has changed to Accompanying this, infrared absorption
H H  H H
ス ぺ ク ト ル に お いて、 1590 cm— 'に 一 C = C — に基づ く 吸 収が現れ、 1099 cm— 1の — C — 〇 — C In the spectrum, an absorption based on one C = C — appears at 1590 cm — ′, and — C — の — C at 1099 cm — 1
、 に基づ く と思われ る吸収が消失 した。  The absorption, which is believed to be based on, disappeared.
以下、 実施例 2 と同様に して、 シ リ コ ン板自体が 5 個 の F E T素子の共通ゲ一 ト 電極 と して働 き、 シ リ コ ン板 上の酸化 シ リ コ ン膜が 5 個の F E T素子の共通のゲー ト 絶縁膜 と して働 く よ う に し、 第 1 図に示す構造の F E T 素子を得た。 こ こ で 1 及び 2 は基板兼ゲー ト 電極であ る シ リ コ ン板であ り 、 3 は絶縁膜であ る酸化シ リ コ ン膜、 4 は半導体層 と して働 く ポ リ ( 2 , 5 — チ ェ 二 レ ン ヒ ニ レ ン) 前駆体の L B膜か ら得 られたポ リ ( 2 , 5 - チ ェ 二 レ ン ビニ レ ン ) の L B膜、 5 及び 6 はそれぞれ ソ ー ス 及び ド レ イ ン電極 と して働 く 白金膜での o  Thereafter, in the same manner as in Example 2, the silicon plate itself functions as a common gate electrode for the five FET elements, and the silicon oxide film on the silicon plate becomes By acting as a common gate insulating film for the two FET elements, an FET element having the structure shown in Fig. 1 was obtained. Here, 1 and 2 are silicon plates which are both a substrate and a gate electrode, 3 is a silicon oxide film which is an insulating film, and 4 is a poly (poly) which acts as a semiconductor layer. 2,5—Chenylene hinylene) The LB film of poly (2,5-chlorobenzene) obtained from the precursor LB film, and 5 and 6 are the LB films, respectively. O with platinum film acting as source and drain electrodes
実施例 4 Example 4
実施例 1 で用いた もの と同様の F E T素子基板の温度 及び雰囲気温度を約 60てに設定 し、 次の化学構造か らな る  The temperature and ambient temperature of the FET element substrate similar to that used in Example 1 were set to about 60, and the following chemical structure was obtained.
Figure imgf000033_0001
Figure imgf000033_0001
ポ リ ( 2 , 5 — チ ヱ 二 レ ン ビニ レ ン ) 前駆体の約 2 w t <¾ ジ メチルホルムア ミ ド ( D M F ) 溶液を用いてス ピ ンキ ヤ ス ト 法にて前駆体フ ィ ルムを F E T素子基板上に得た こ の と き、 ス ピナ一の回転数は毎分 2000回転と した。 得 られた前駆体フ ィ ルムの膜厚は、 約 800 Aであ っ た。 溶 媒をあ る程度蒸発させた後、 さ らに、 上記 F E T素子基 板の温度及び雰囲気度を約 60°Cに設定し、 次の化学構造 カヽ らな る Approximately 2 wt <¾ of the poly (2,5—divinylvinylene) precursor When a precursor film was obtained on a FET element substrate by the spin cast method using a dimethylformamide (DMF) solution, the spinner rotation speed was 2000 rpm. And The thickness of the obtained precursor film was about 800 A. After evaporating the solvent to a certain extent, set the temperature and ambient temperature of the FET element substrate to about 60 ° C, and obtain the following chemical structure.
Figure imgf000034_0001
Figure imgf000034_0001
ポ リ ( p — フ ヱニ レ ン ビニレ ン ) 前駆体の約 2 \ %水溶 液を用いてス ピ ンキャ ス ト 法にてポ リ ( p — フ ヱニ レ ン ビニ レ ン ) 前駆体フ イ ル ムをポ リ ( 2 , 5 —チ ヱ二 レ ン ビニ レ ン) 前駆体上に得た。 この と き、 ス ピナ一の回転 数は毎分 2000回転と した。 得られた前駆体フ ィ ル 厶 の膜 厚は 700 Aであ っ た。 Poly (p-vinylenevinylene) precursor poly (p-vinylenevinylene) precursor is prepared by the spin-cast method using about 2% aqueous solution of the poly (p-vinylenevinylene) precursor. The film was obtained on a poly (2,5-diphenylvinylene) precursor. At this time, the number of revolutions of the spinner was set to 2000 revolutions per minute. The film thickness of the obtained precursor film was 700 A.
次に、 ポ リ ( 2 , 5 —チ ヱ二 レ ン ビニ レ ン) 前駆体フ イ ルム とポ リ ( p — フ ヱニ レ ン ビニレ ン) 前駆体フ ィ ル ムの 2 層膜で被覆した F E T素子基板を赤外線ィ メ 一 ジ 炉にて、 窒素気流下、 210°Cの条件で約 2 時間加熱した この結果、 フ イ ルムの色は、 淡黄色から暗褐色ない し暗 紫色に変わ っ た。 上記加熱処理に よ っ て、 ポ リ ( 2 , 5 一 チ ヱ二 レ ン ビニレ ン) 前駆体フ イ ル ム とポ リ '( p — フ ェニ レ ン ビニ レ ン) 前駆体フ イ ルムか らな る積層膜は、 それぞれポ リ ( 2 , 5 — チ ェ二 レ ン ビニ レ ン ) フ ィ ル ム と ポ リ ( p — フ ヱニ レ ン ビニ レ ン) か らな る積層膜へ と 変わ り 、 こ れに伴い赤外線吸収スペ ク ト ルにおいて、 1 5 90 cm — 'に ポ リ ( 2 , 5 — チ ェ二 レ ン ビニ レ ン ) の C = C に基づ く 吸収が、 9 70 cm — 'にポ リ ( p — フ ヱニ レ ン ビニ レ ン ) の C = C に基づ く 吸収がそれぞれ現れた。 一方、 加熱処理に よ る反応中、 ポ リ ( 2 , 5 — チ ェ二 レ ン ビニ レ ン ) か ら成る半導体層以外の素子構成部には酸に よ る 腐蝕等の悪影響はなかつ た。 Next, it is coated with a two-layer film of a poly (2,5—divinylvinylene) precursor film and a poly (p—vinylenevinylene) precursor film. The FET device substrate was heated in an infrared image furnace under a nitrogen stream at 210 ° C for about 2 hours.As a result, the color of the film changed from pale yellow to dark brown or dark purple. I did. By the above heat treatment, the poly (2,51-vinylenevinyl) precursor film and the poly '(p- The multi-layered film consisting of the poly (enylenevinylene) precursor film is composed of a poly (2,5—Chenylenevinylene) film and a poly (p—film), respectively. It changes to a laminated film consisting of (Niren vinylene), and accordingly, in the infrared absorption spectrum, the poly (2,5—Chenylene vinyl) is added at 15 90 cm — The absorption based on C = C of ren and the absorption based on C = C of poly (p-phenylene vinylene) appeared at 970 cm-'. On the other hand, during the reaction by the heat treatment, there was no adverse effect such as corrosion due to acid on the element constituent parts other than the semiconductor layer composed of poly (2,5-chloro-vinylene).
次に、 上記のよ う に して得 られた フ ィ ルムで被覆 した F E T素子基板の他面の酸化シ リ コ ン膜を機械的に剝離 して、 裸の シ リ コ ン表面にガ リ ウ ム とイ ン ジウ ムの合金 を塗布 してォー ミ ッ ク接触を取っ た。  Next, the silicon oxide film on the other side of the FET element substrate covered with the film obtained as described above is mechanically separated from the bare silicon surface to form a gallium. An alloy of um and indium was applied to make an ohmic contact.
以上の よ う に して シ リ コ ン板自体が 5 個の F E T素子 の共通のゲー ト 電極 と して働 き、 シ リ コ ン板上の酸化 シ リ コ ン膜が 5 個の F E T素子の共通のゲー ト絶縁膜 と し て働 く よ う に した。 こ の よ う に して、 第 3 図に示す F E T素子を得た。 こ こ で 1 及び 2 は基板兼ゲー ト 電極であ る シ リ コ ン板であ り 、 3 は絶縁膜であ る酸化シ リ コ ン膜、 4 は半導体層 と して働 く ポ リ ( 2 , 5 — チ ヱ二 レ ン ビニ レ ン ) 前駆体膜か ら得 られたポ リ ( 2 , 5 — チ ェ二 レ ン ビニ レ ン ) 膜、 5 及び 6 はそれぞれ ソ ー ス及び ド レ イ ン 電極 と して働 く 金膜、 1 3は酸供与膜 と して働 く ( p — フ ェニレ ン ビニレ ン) 前駆体膜から得 られたボ リ ( p — フ ェニ レ ン ビニ レ ン) 膜である。 As described above, the silicon plate itself acts as a common gate electrode for the five FET elements, and the silicon oxide film on the silicon plate forms the five FET elements. It works as a common gate insulating film. Thus, the FET device shown in FIG. 3 was obtained. Here, 1 and 2 are silicon plates which are both a substrate and a gate electrode, 3 is a silicon oxide film which is an insulating film, and 4 is a poly (poly) which acts as a semiconductor layer. Poly (2,5—Chenylenevinylene) films obtained from 2,5—Chenylenevinylene) precursor films, 5 and 6 are source and drain, respectively. A gold film that works as an in-electrode, and 13 works as an acid donor film (p-f (P-phenylene vinylene) This is a poly (p-phenylene vinylene) film obtained from the precursor film.
実施例 5 Example 5
第 2 図に示す構造の液晶表示装置の作製法の一例を以 下に示す。 抵抗率が 4 〜 8 Ω onであ り 、 厚さ 300 mの n 型シ リ コ ン板 ( 25mm x 40讓 ) を熱酸化して厚さ約 900 Aの酸化膜 ( S i 0 2膜) を両面に形成さ せた。 こ の表面上 に第 2 図における ソ ース電極 5 , ド レ イ ン電極 6 , 及び 電極 7 となるべき金電極 (下地ク ロ ム 200 金 300 A ) を実施例 1 と同様に して設けた。 こ こ で ソ ー ス電極 5 及 び ド レ イ ン電極 6 は、 いずれも有効面積 2 mm X 4 mmであ り 、 3 z m幅で分離されている。 即ち、 F E T素子と し た と きにチ ヤ ネゾレ幅力 2 隱であ り 、 チ ヤ ネ ノレ長力 3 II m になる よ う に した。 また、 電極 7 は有効面積 1 7 X 1 9 mm2単 位である。 以下、 こ の基板を液晶表示装置基板 と呼ぶ。 ポ リ ( 2 , 5 —チ ヱ二 レ ン ビニ レ ン) 前駆体の約 2 wt % の D M F溶液を用いて、 実施例 1 と同様に して、 上記液 曰 表示装置基板上にポ リ ( 2 , 5 —チ ェ二 レ ン ビニ レ ン) 前駆体フ ィ ルムを得た。 An example of a method for manufacturing a liquid crystal display device having the structure shown in FIG. 2 will be described below. Resistivity Ri 4 ~ 8 Ω on der, thickness 300 m of the n-type sheet re co down plate (25 mm x 40 Yuzuru) an oxide film of about 900 A thick thermally oxidized (S i 0 2 film) Was formed on both sides. On this surface, gold electrodes (underlying chrome 200 gold 300 A) to be source electrode 5, drain electrode 6 and electrode 7 in FIG. 2 were provided in the same manner as in Example 1. Was. Here, each of the source electrode 5 and the drain electrode 6 has an effective area of 2 mm × 4 mm, and is separated by a width of 3 zm. That is, when the FET element is used, the channel width is set to 2 and the channel length is set to 3 II m. The electrode 7 has an effective area of 17 × 19 mm 2 . Hereinafter, this substrate is referred to as a liquid crystal display device substrate. Using a DMF solution of about 2 wt% of the poly (2,5-divinylvinylene) precursor, in the same manner as in Example 1, the above liquid was applied onto the display substrate. 2,5—Chenylenevinylene) A precursor film was obtained.
次に、 こ の液晶表示装置基盤の F E T素子部以外のポ リ ( 2 , 5 — チ ヱ二 レ ン ビニ レ ン) 前駆体フ ィ ル厶を ク ロ ロ ホ ルムを用いて洗浄後、 こ の基板を赤外線イ メ ー ジ 炉を用いて、 約 1 %の塩化水素ガスを含む窒素気流中で 約 1 時間、 200 °Cで加熱した。 以上の操作によ り 、 F E T素子部のみポ リ ( 2 , 5 — チ ヱ 二 レ ン ビニ レ ン) フ ィ ルムで被覆 し、 液晶表示装置の内、 第 2 図にお ける F E T素子部 11を完成させた。 Next, the poly (2,5-divinylvinylene) precursor film other than the FET element portion of the liquid crystal display device substrate is washed with chloroform, and then cleaned. The substrate was heated at 200 ° C. for about 1 hour in a nitrogen stream containing about 1% hydrogen chloride gas using an infrared image furnace. By the above operation, FE Only the T element part was covered with a poly (2,5-divinylvinylene) film, and the FET element part 11 in Fig. 2 of the liquid crystal display was completed.
次に、 液晶表示装置基板と こ れ と対向させる I T 0 9 を形成 したガラ ス板 10上に S i 02を斜め蒸着 し液晶の配向 が起こ る よ う に配向処理を施 した。 そ して、 液晶表示装 置基板 と こ れ と対向 させる I T 〇 9 を形成 したガラ ス板 10と の間に 10 m厚のポ リ エステル フ ィ ルムを液晶表示 部が開 口部 とな る よ う に一部分だけ残 しては さみ込み、 その周辺を同 じ く 一部分だけ残 してェポキ シ樹脂で封止 した。 そ して、 こ の未封止部分か らゲス ト · ホス ト液晶 (Merck 社製 商品名 ZLI 1841)を注入 してエポキ シ樹 脂で封止 し、 ガラ ス板 10上に偏光板をは り 合わせ、 液晶 表示装置の内、 液晶表示部 12を完成さ せた。 Was then facilities a liquid crystal display device substrate and This is S i 0 2 oblique vapor deposition alignment treatment Ni Let 's that to put the orientation of the liquid crystal on the glass plate 10 formed with IT 0 9 to face the. Then, a 10 m thick polyester film is formed between the liquid crystal display device substrate and the glass plate 10 on which the IT layer 9 is formed so as to face the liquid crystal display device. In this way, only a part was sandwiched, and the surrounding area was sealed with epoxy resin, leaving the same part. Then, a guest-host liquid crystal (trade name: ZLI 1841, manufactured by Merck) is injected from the unsealed portion, sealed with an epoxy resin, and a polarizing plate is mounted on the glass plate 10. Thus, the liquid crystal display unit 12 of the liquid crystal display device was completed.
最後に、 液晶表示装置基板の裏面の S i 02の一部をはが し、 こ こ に ガ リ ウ ム と イ ン ジ ウ ム の合金を塗布 して、 ォ ー ミ ッ タ コ ン タ ク ト を取 り 、 こ れに銀ペー ス ト で リ ー ド 線を取 り 付けて、 液晶表示装置を完成させた。 Finally, peel off the part of S i 0 2 rear surface of the liquid crystal display device substrate, by applying a gas re U arm and Lee emissions di c arm of alloy here, O over Mi jitter co te Then, the lead wire was attached with silver paste to complete the liquid crystal display device.
実施例 6 Example 6
ポ リ ( 2 , 5 — チ ェ二 レ ン ビニ レ ン) 前駆体の約 2 w t %の D M F 溶液 0. 5 と ク ロ 口 ホルム 9. 5 を混合 した 溶液を展開液 と して用いて、 実施例 1 と同様に して、 上 記液晶表示装置基板上にポ リ ( 2 , 5 — チ ェ二 レ ン ビニ レ ン ) 前駆体の L B膜 ( 100層) を得た。 次に、 こ の液晶表示装置基板の F E T素子部以外のポ リ ( 2, 5 — チ ェ二 レ ン ビニ レ ン) 前駆体の L B膜をク ロ ロ ホルムを用いて洗浄後、 こ の基板を赤外線イ メ ー ジ 炉を用 いて、 約 1 %の塩化水素ガスを含む窒素気流中で 1. 5 時間、 90°Cで加熱した。 以上の操作によ り 、 F E T 素子部のみポ リ ( 2, 5 —チ ェ二 レ ン ビニ レ ン) の L B 膜で被覆 し、 液晶表示装置の内、 第 2 図における F E T 素子部 11を完成させた。 As a developing solution, a solution obtained by mixing a DMF solution (0.5%) of a poly (2,5—Chenylenevinylene) precursor of about 2 wt% and a cross-sectional form 9.5 was used. In the same manner as in Example 1, an LB film (100 layers) of a poly (2,5-chlorobenzene) precursor was obtained on the liquid crystal display device substrate. Next, after cleaning the LB film of the poly (2,5-chlorobenzenevinylene) precursor other than the FET element portion of the liquid crystal display device substrate using chloroform, the substrate is removed. The sample was heated at 90 ° C. for 1.5 hours in a nitrogen stream containing about 1% hydrogen chloride gas using an infrared image furnace. By the above operation, only the FET element part is covered with the poly (2,5-Chenylene vinylene) LB film, and the FET element part 11 in Fig. 2 of the liquid crystal display device is completed. I let it.
次に、 液晶表示装置基板と これ と対向 させる I T 0 9 を形成 したガラ ス板 10上に S i 02を斜め蒸着 し液晶の配向 が起こ る よ う に配向処理を施した。 そ して、 液晶表示装 置基板と これと対向させる I T O 9 を形成 したガラ ス板 10との間に 10 m厚のポ リ エステルフ ィ ルムを液晶表示 部が開 口部 とな る よ う に一部分だけ残 してはさ み込み、 その周辺を同 じ く 一部分だけ残 してェ ピキシ樹脂で封止 した。 そ して、 こ の未封止部分か らゲス ト · ホス ト液晶 (Merck 社製 商品名 ZL 11841 )を注入 してエポキシ樹 脂で封止し、 ガラ ス板 10上に偏光板をは り 合わせ、 液晶 表示装置の内、 液晶表示部 12を完成させた。 Then, the S i 0 2 obliquely deposited on glass plate 10 formed with a liquid crystal display device substrate therewith and IT 0 9 causes the opposite orientation of the liquid crystal subjected to the alignment treatment Ni Let 's that to put. Then, a 10 m thick polyester film is provided between the liquid crystal display device substrate and the glass plate 10 on which the ITO 9 is formed so as to face the liquid crystal display device so that the liquid crystal display portion becomes an opening. Sealing was carried out with epoxy resin, leaving only a part, and surrounding the same part. Then, a guest-host liquid crystal (trade name: ZL11841, manufactured by Merck) is injected from the unsealed portion, sealed with epoxy resin, and a polarizing plate is mounted on the glass plate 10. Thus, the liquid crystal display section 12 of the liquid crystal display device was completed.
最後に、 液晶表示装置基板の裏面の Si02の一部をはが し、 こ こ にガ リ ウ ム とイ ン ジウ ムの合金を塗布 して、 ォ ー ミ ッ ク コ ン タ ク ト を取り 、 これに銀ペース トで リ ー ド 線を取 り 付けて、 液晶表示装置を完成させた。 Finally, peel off the part of the Si0 2 in the rear surface of the liquid crystal display device substrate, by applying a gas re U arm and Lee down Ji beam alloys in here, the O over Mi click co te click DOO Then, a lead line was attached to this with a silver paste to complete the liquid crystal display device.
実施例 7 第 5 図に示す構造の液晶表示装置の作製法の一例を以 下に示す。 上記液晶表示装置基板上にポ リ ( 2 , 5 - チ ヱ二 レ ン ビニ レ ン ) 前駆体の約 2 wt %の D M F 溶液を用 い、 実施例 4 と同様に してポ リ ( 2 , 5 — チ ェ二 レ ン ビ 二 レ ン ) 前駆体フ ィ ル ムを得た。 次に、 こ のポ リ ( 2 , 5 — チ ヱ二 レ ン ビニ レ ン ) 前駆体フ ィ ル ム上にポ リ ( ノ ラ — フ エ二 レ ン ビニ レ ン ) 前駆体の約 2 wt %の水溶液を 用 い、 実施例 4 と同様に してポ リ (パラ ー フ ヱニ レ ン ビ 二 レ ン ) 前駆体フ ィ ル ムを得た。 こ の液晶表示装置基板 の F E T素子部以外のポ リ ( 2 , 5 — チ ヱ 二 レ ン ビニ レ ン) 前駆体な ら びにポ リ (パラ ー フ ヱニ レ ン ビニ レ ン ) 前駆体フ ィ ル ムを ク ロ 口 ホ ル ムを用いて洗浄後、 こ の基 板を赤外線ィ メ 一 ジ炉を用 いて窒素気流中で約 1 時間、Example 7 An example of a method for manufacturing a liquid crystal display device having the structure shown in FIG. 5 is described below. A DMF solution of about 2 wt% of a poly (2,5-divinylvinylene) precursor was used on the above liquid crystal display device substrate, and the poly (2,5,4-vinylene) precursor was used in the same manner as in Example 4. 5—Chenrenbiniren) A precursor film was obtained. Next, about 2 wt% of the poly (Nora-phenylenevinylene) precursor is placed on the poly (2,5-divinylvinylene) precursor film. Using a 1% aqueous solution, a poly (paraphenylenevinylene) precursor film was obtained in the same manner as in Example 4. The poly (2,5-divinylvinylene) precursor and the poly (paravinylenevinylene) precursor other than the FET element portion of this liquid crystal display device substrate After cleaning the film using a cloth hood, the substrate was washed for about 1 hour in a nitrogen stream using an infrared image furnace.
200°Cで加熱 した。 以上の操作によ り 、 F E T素子部の みポ リ ( 2 , 5 — チ ヱ二 レ ン ビニ レ ン ) 及びポ リ (パラ 一 フ エ二 レ ン ビニ レ ン ) で被覆 し、 液晶表示装置の内第 5 図における F E B素子部 11を完成させた。 次いで、 実 施例 5 と同様の操作に よ り 、 液晶表示装置の内、 液晶表 示部 12を完成させた。 さ ら に、 実施例 5 と同様に、 液晶 表示装置を完成さ せた。 Heated at 200 ° C. By the above operation, only the FET element is covered with poly (2,5-divinyl vinylene) and poly (para-phenylenevinylene), and the liquid crystal display Of these, the FEB element section 11 in FIG. 5 was completed. Next, by the same operation as in Example 5, the liquid crystal display unit 12 of the liquid crystal display device was completed. Further, a liquid crystal display device was completed in the same manner as in Example 5.
比較例 Comparative example
比較例の素子は前述の文献 ( Appl. Phys. Lett. , 49 巻 1210頁 1986年) に従っ て作製 した。 即ち、 75 の ァ セ ト ニ ト リ ノレ に、 モ ノ マ ー と し て 2 , 2 ' — ジ チ オ フ ェ ンを 0. 15 g溶か し、 電界質と して過塩素酸テ ト ラエチ ルア ンモニゥ ムを 0.55 g溶か してこれを反応溶液と した こ の反応溶液に高純度窒素ガスを通気 して充分脱気 した 後、 これに実施例 1 で得た F E T素子基板を浸した。 次 に F E T素子基板上の 5 対の金電極を作用極と して対極 の白金電極 ( 10匪 X 20mm ) との間に一定電流 ( 100 A Zcrf ) を 480秒間流して電解重合を行い、 5 対の金電極 上及びその周辺の酸化シ リ コ ン膜上に厚さ約 1400 Aのポ リ チオフ ヱ ン膜を得た。 このポ リ チォフ ェ ン膜には電解 重合と同時に多量の過塩素酸イ オ ンが ドー ピ ン グされて いるため、 電解重合後、 ただちに 5 対の金電極の電位を 飽和力 口 メ ル電極に対して 0 Vに設定して脱 ドー ピン グ を行い、 ポ リ チォフ ニ ン膜に半導体程度の電導度を持た せた。 得られた F E T素子は、 ァセ トニ ト リ ルで 2 回洗 浄 した後、 真空デシケ一夕 に入れて乾燥させた。 The device of the comparative example was produced according to the above-mentioned document (Appl. Phys. Lett., Vol. 49, p. 1210, 1986). In other words, 75 acetonitrile nozzles have 2,2'-dithiophene as monomers. 0.15 g of benzene was dissolved, 0.55 g of tetraethylammonium perchlorate was dissolved as an electrolyte, and this was used as a reaction solution.High-purity nitrogen gas was passed through the reaction solution. After sufficient degassing, the FET element substrate obtained in Example 1 was immersed in this. Next, a constant current (100 A Zcrf) was passed between the five pairs of gold electrodes on the FET element substrate as working electrodes and a platinum electrode (10 X 20 mm) as the working electrode for 480 seconds to perform electrolytic polymerization. A polysilicon film with a thickness of about 1400 A was obtained on the paired gold electrodes and on the silicon oxide film around the gold electrodes. Since a large amount of perchloric acid ion is doped into the polyolefin film at the same time as the electrolytic polymerization, the potential of the five pairs of gold electrodes is immediately saturated after the electrolytic polymerization. The voltage was set to 0 V to perform dedoping, and the poly- finin film was given conductivity similar to that of a semiconductor. The obtained FET device was washed twice with acetonitril, and then dried in a vacuum desiccator.
次に、 実施例 1 〜 7 及び比較例によ って得られたデバ イ スの特性について述べる。  Next, the characteristics of the devices obtained by Examples 1 to 7 and Comparative Example are described.
まず、 実施例 1 にて得られた 5 個の F E T素子の内の —つの F E T素子の電気特性を第 6 図に示す。 こ の図に おいて、 横軸はソ ース ' ド レイ ン間電圧 ( V D s ) であ り 縦軸は ソ ー ス · ド レ イ ン間電流 ( I s ) であ る。 ゲー ト 電圧 ( V G ) 力 0 Vの時には、 V D sが大き く なつて も I s は殆ど流れないが、 負の V c を印加 した時には大き な I s が流れる よ う になる。 しか も、 V D sが大きな領域 では I s の飽和が観 られ、 典型的なェ ンハ ン ス型の電界 効果型 ト ラ ン ジス タ の電気特性が得 られた。 図か ら判る よ う に、 印加する ゲー ト電圧に よ っ て ソ ー ス · ド レ イ ン 間電流を大き く 変調させる こ とができ る。 第 6 図の特性 は作製 した 5 個の F E T素子の内の一つの素子の特性で あ るが、 残 り の F E T素子の特性について も測定 した と こ ろ第 6 図の特性 とほぼ同 じ特性を示 した。 ま た、 こ れ らの素子を空気中に約 1 ヶ月放置 した後、 再びその電気 特性を測定 した と こ ろ、 その特性は殆 ど変化せず本実施 例で得 られた素子が極めて安定性に優れる こ とが判つ た , 次に実施例 2 にて得 られた 5 個の F E T素子の内の一 つの F E T素子の電気特性及び実施例 3 にて得 られた 5 個の F E T素子の内の一つの F E T素子の電気特性をそ れぞれ第 7 図及び第 8 図に示す。 こ れ らの図において、 横軸は ソ ー ス · ド レ イ ン間電圧 ( V D s ) であ り 、 縦軸は ソ ー ス ' ド レ イ ン間電流 ( I s ) であ る。 ゲー ト 電圧 ( V G ) 力 0 Vの時には、 V D sが大き く な つ て も I s は 殆 ど流れな いが、 負の V G を印加 した時には大き な I s が流れる よ う にな る。 しか も、 V D sが大き な領域では 1 s の飽和が観 られ、 典型的なェ ンハ ン ス型の効果型 ト ラ ン ジス 夕 の電気特性が得 られた。 こ れ らの図か ら判る よ う に、 印加する ゲー ト 電圧に よ っ て ソ ース · ド レ イ ン間電 流を大き く 変調さ せる こ とができる。 第 7 図及び第 8 図 の特性はそれぞれの実施例にて作製 した 5 個の F E T素 子の内の一つの素子の特性であ るが、 残 り の F E T素子 の特性について も測定 した と こ ろ ^ 7 図及び第 8 図の特 性とほぼ同 じ特性を示 した。 また、 これらの素子を空気 中に約 1 ケ月放置 した後、 再びその電気特性を测定 した と こ ろ、 その特性は殆ど変化せず本実施例で得 られた素 子が極めて安定性に優れる こ とが判っ た。 First, FIG. 6 shows the electrical characteristics of one of the five FET elements obtained in Example 1. In Fig of this, the horizontal axis is the Soviet Union over the scan 'de Rei down between the voltage (V D s) Der Ri vertical axis source over the scan-de Tray down between the current (I s) Ru Der. When the gate voltage (V G ) is 0 V, I s hardly flows even if VD s increases, but large I s flows when a negative V c is applied. In addition, areas where V D s is large In the figure, saturation of I s was observed, and the electrical characteristics of a typical enhancement-type field-effect transistor were obtained. As can be seen from the figure, the source-drain current can be greatly modulated by the applied gate voltage. The characteristics in Fig. 6 are the characteristics of one of the five fabricated FET elements, but when the characteristics of the remaining FET elements were measured, the characteristics were almost the same as the characteristics in Fig. 6. showed that. When these elements were left in the air for about one month, and their electrical characteristics were measured again, the characteristics were hardly changed, and the elements obtained in this example had extremely high stability. Next, the electrical characteristics of one of the five FET elements obtained in Example 2 and the five FET elements obtained in Example 3 were found to be excellent. The electrical characteristics of one of the FET elements are shown in FIGS. 7 and 8, respectively. In view of this is found, the horizontal axis Resona over scan de Tray down voltage (V D s) Der, the vertical axis represents source over scan 'de Tray down between current (I s) Ru der. When the gate voltage (V G) Power 0 V is, I Ni I'm flows large I s when the V D s is I s even One Do rather than size was applied殆etc. flow of Iga, a negative VG You. In the region where VD s is large, saturation of 1 s was observed, and the electrical characteristics of a typical enhancement-type effect-type transistor were obtained. As can be seen from these figures, the source-drain current can be greatly modulated by the applied gate voltage. The characteristics shown in Figs. 7 and 8 show the characteristics of the five FET elements fabricated in each example. Although the characteristics of one of the elements were measured, the characteristics of the remaining FET elements were also measured. The characteristics were almost the same as those in Figs. 7 and 8. Further, when these elements were left in the air for about one month, and their electrical characteristics were measured again, the characteristics were hardly changed, and the elements obtained in this example had extremely excellent stability. I understood.
第 9 図には、 実施例 4 で作製 した 5 個の F E T素子の 内の一つの F E T.素子の電気特性を示す。 こ の図におい て、 横軸は ソ ース · ド レ イ ン間て、、んあつ ( V D s ) であ り 、 縦軸は ソ ース · ド レイ ン間電流 ( I s ) である。 実施例 1 と同様典型的なェ ンハ ン ス型の電界効果型 ト ラ ン ジ ス 夕 の電気特性が得られた。 図か ら判る よ う に、 実施例 1 の第 6 図 と比較し、 印加する ゲー ト電 Eによ って ソ ー ス • ド レ イ ン間電流を大き く 変調でき る。 FIG. 9 shows the electric characteristics of one of the five FET devices manufactured in Example 4 of the FET device. In this figure, the horizontal axis represents the source-drain distance between the source and the drain (VD s ), and the vertical axis represents the source-drain current (I s). As in Example 1, the electric characteristics of a typical enhancement-type field-effect transistor were obtained. As can be seen from the figure, the source-to-drain current can be greatly modulated by the applied gate power E as compared to FIG. 6 of the first embodiment.
第 10図には実施例 1 及び実施例 4 で作製 した 5 個の F E T素子の内の一つの F E T素子と比較例において作製 した F E T素子の、 ソ ース ' ド レ イ ン間電圧一定 (一 50 V ) 条件下の ソ ース ' ド レ イ ン間電流一 ゲー ト 電圧特性 を示す。 こ の図において、 横軸はゲー ト電 E ( V G ) で あ り 、 縦軸は ソ ー ス · ド レ イ ン間電流 ( I s ) であ る。 第 1 0図か ら明 らかなよ う に、 実施例 1 で得られた F E T 素子においてはゲー ト電圧によ っ て変調でき る ソ ー ス · ド レ イ ン間電流は 4 桁以上に逢し、 さ らに実施例 4 で得 られた F E T素子においては、 変調でき る ソ ース . ド レ イ ン電流は 5 桁以上に達 したのに対 し、 比較例の従来 F E T素子では、 ゲー ト 電圧によ っ て変調でき る ソ ー ス ' ド レ イ ン間電流は 2 桁半にすぎない。 こ の よ う に、 実施 例 1 及び実施例 4 で得 られる F E T素子は従来 F E T素 子に比べ特性が大幅に向上 した。 FIG. 10 shows the constant source-drain voltage of one of the five FET elements manufactured in Example 1 and Example 4 and the FET element manufactured in the comparative example. It shows the source-drain current-gate voltage characteristics under the condition of 50 V). In view of this, the horizontal axis represents Ri Ah at gate conductive E (V G), the vertical axis represents Ru source over scan de Tray down between current (I s) der. As is clear from FIG. 10, in the FET device obtained in Example 1, the source-drain current that can be modulated by the gate voltage is more than four digits. Further, in the FET device obtained in the fourth embodiment, the source / drain that can be modulated is used. In contrast to the conventional case, the gate-to-source current, which can be modulated by the gate voltage, is only two and a half digits, while the in-current reaches five digits or more. . As described above, the characteristics of the FET elements obtained in Examples 1 and 4 were greatly improved as compared with the conventional FET elements.
次に第 11図は、 実施例 2 で作製 した 5 個の F E T素子 の内の一つの F E T素子と実施例 3 で作製 した 5 個の F E T素子の内の一つの F E T素子及び比較例において作 製 した F E T素子の、 ソ ース ' ド レイ ン間電圧一定( 50 V ) の条件下の ソ ース ' ド レイ ン間電流— ゲー ト 電圧特 性を示す。 こ の図において、 横軸はゲー ト 電圧 ( V c ) であ り 、 縦軸は ソ ース · ド レイ ン間電流 ( I s ) であ る。 第 11図か ら明 らかな よ う に、 実施例 2 及び実施例 3 で得 られた F E T素子のおいてはゲー ト電圧に よ っ て変調で き る ソ ース · ド レ イ ン間電流は 4 桁以上に達 したのに対 し、 比較例の従来 F E T素子では、 ゲー ト 電圧に よ っ て 変調でき る ソ ース · ド レ イ ン間電流は 2 桁半にす ぎない。 こ のよ う に、 実施例 2 及び実施例 3 で得 られる F E T素 子は従来 F E T素子に比べ特性が大幅に向上 した。 Next, Fig. 11 shows one of the five FET elements fabricated in Example 2, one of the five FET elements fabricated in Example 3, and a comparative example. The figure shows the source-drain current-gate voltage characteristics of the FET device under the condition of constant source-drain voltage (50 V). In view of this, the horizontal axis represents the gate voltage (V c) der is, the vertical axis represents source over scan de Rei down between current (I s) Ru der. As can be seen from FIG. 11, the source-drain current that can be modulated by the gate voltage in the FET devices obtained in the second and third embodiments. In contrast, the conventional FET device of the comparative example has only two and a half digits of the source-drain current that can be modulated by the gate voltage, while the current reaches four digits or more. As described above, the characteristics of the FET devices obtained in Examples 2 and 3 were greatly improved as compared with the conventional FET device.
第 12図は実施例 5 で得 られた液晶表示装置中の F E T 素子のゲ一 ト 電圧を変えた と き の ソ ース · ド レ イ ン間電 流— ソ ー ス · ド レ イ ン間電圧特性を示す特性図であ る。 こ の図において、 横軸は ソ ース · ド レ イ ン間電圧 ( V D s ) 縦軸は ソ ー ス · ド レ イ ン間電流 ( I s ) を示す。 図にお いて F E T素子のゲー ト電圧を ひ Vに している時には ソ ース電極と ド レ イ ン電極の間に電圧を印加 して も、 ツ ー ス , ド レ イ ン間電流は殆ど流れないが、 負のゲー ト電 Ε を印加すればする ほ ど大きな ソ ース · ド レ イ ン間電流が 流れた。 こ の F Ε Τ素子と液晶表示部は直列に接続して いるため、 液晶表示部のガラ ス板 1 0上の透明電極 9 と F Ε Τ素子の ソ ース電極 5 の間に液晶 & を駆動するのに充 分な電圧を印加 しておき、 ゲー ト電極 2 に負電圧を印加 する と液晶表示部に電圧がかか り 、 液晶 8 が配向 して液 FIG. 12 shows the source-drain current-source-drain current when the gate voltage of the FET element in the liquid crystal display device obtained in Example 5 is changed. FIG. 4 is a characteristic diagram illustrating voltage characteristics. In this figure, the horizontal axis represents the source-drain voltage (VDs), and the vertical axis represents the source-drain current (Is). In the figure Therefore, when the gate voltage of the FET element is set to high, even if a voltage is applied between the source electrode and the drain electrode, almost no current flows between the tooth and the drain. However, a larger source-drain current flowed as the negative gate voltage was applied. Since the FΕ element and the liquid crystal display are connected in series, a liquid crystal is connected between the transparent electrode 9 on the glass plate 10 of the liquid crystal display and the source electrode 5 of the FΕ element. When a sufficient voltage is applied for driving and a negative voltage is applied to the gate electrode 2, a voltage is applied to the liquid crystal display, and the liquid crystal 8 is oriented and the liquid crystal is aligned.
表示部が駆動 したが、 ゲー ト電 Εを 0 V にする と液晶 表示部に電圧がかからず、 液晶表示部の駆動は止ま った。 即ち、 液晶の駆動を、 付属させた 7Γ —共役系高分子膜を 半導体層 とする F E T素子で制御する こ とができた。 ま た、 安定性の面でも本実施例の液晶表示装置は 1 カ月以 上経過して も安定に動作 した。  The display was driven, but when the gate voltage was set to 0 V, no voltage was applied to the liquid crystal display and the liquid crystal display stopped driving. That is, the driving of the liquid crystal could be controlled by the attached FET element using the 7Γ-conjugated polymer film as the semiconductor layer. In terms of stability, the liquid crystal display device of this example operated stably even after one month or more.
第 1 3図は実施例 6 で得られた液晶表示装置中の F Ε Τ 素子のゲー ト電圧を変えた と きの ソ ース · ド レ イ ン間電 流一ソ ース · ド レイ ン間電圧特性を示す特性図である。  FIG. 13 shows the source-drain current-source drain when the gate voltage of the F Ε element in the liquid crystal display device obtained in Example 6 was changed. FIG. 4 is a characteristic diagram showing an inter-voltage characteristic.
こ の図において、 横軸は ソ ース ' ド レ イ ン間電圧 ( V D s ) 、 縦軸はソ ース ' ド レイ ン間電流 ( I s ) を示す。 図にお いて F E T素子のゲー ト電圧を 0 Vに している時にはソ ース電極と ド レ イ ン電極の間に電 Eを印加 して も、 ソ一 ス ' ド レイ ン間電流は殆 ど流れないが、 負のゲー ト電圧 を印加すればする ほ ど大きな ソ ース · ド レイ ン間電流力 流れた。 こ の F E T素子 と液晶表示部は直列に接続 して いる ため、 液晶表示部のガラ ス板 1 0上の透明電極 9 と F Ε Τ素子の ソ ース電極 5 の間に液晶 8 を駆動する のに充 分な電圧を印加 しておき、 ゲー ト電極 2 に負電圧を印加 する と液晶表示部に電圧がか り 、 液晶 8 が配向 して液晶 表示部が駆動 したが、 ゲー ト電圧を 0 Vにする と液晶表 示部に電圧がかか らず、 液晶表示部の駆動は止ま っ た。 In view of this, the horizontal axis represents source over scan 'de Tray down voltage (V D s), the vertical axis represents source over scan' shows the de lay down between current (I s). In the figure, when the gate voltage of the FET element is set to 0 V, even if voltage E is applied between the source electrode and the drain electrode, the current between the source and drain is almost zero. Source-drain current force is greater when negative gate voltage is applied flowed. Since the FET element and the liquid crystal display are connected in series, the liquid crystal 8 is driven between the transparent electrode 9 on the glass plate 10 of the liquid crystal display and the source electrode 5 of the FΕ element. When a negative voltage is applied to the gate electrode 2, a voltage is applied to the liquid crystal display, and the liquid crystal 8 is oriented and the liquid crystal display is driven. When the voltage was set to 0 V, no voltage was applied to the liquid crystal display and the driving of the liquid crystal display stopped.
即ち、 液晶駆動を、 付属 させた 7Γ —共役系高分子の L B 膜を半導体層 とする F E T素子で制御する こ とができ た。 ま た、 安定性の面で も本実施例の液晶表示装置は 1 力月 以上経過 して も安定に動作 した。 That is, the liquid crystal drive could be controlled by the attached FET device using the attached 7Γ-conjugated polymer LB film as the semiconductor layer. Further, in terms of stability, the liquid crystal display device of this example operated stably even after more than one month.
第 1 4図は実施例 7 で得られた液晶表示装置中の F Ε Τ 素子のゲー ト 電圧を変えた と き の ソ ース ' ド レ イ ン間電 流一 ソ ー ス · ド レ イ ン間電圧特性を示す特性図であ る。  FIG. 14 shows the current between the source and the drain when the gate voltage of the F Ε element in the liquid crystal display device obtained in Example 7 was changed, and the source and drain. FIG. 4 is a characteristic diagram showing an inter-electrode voltage characteristic.
こ の図において、 横軸は ソ ー ス · ド レ イ ン 間電圧 ( V D S ) 、 縦軸は ソ ー ス , ド レ イ ン間電流 ( I s ) を示す。 図カヽ ら 判る よ う に、 実施例 5 の第 12図 と比べ、 ゲー ト 電圧を印 加 した と き の ソ ース · ド レ イ ン間電流値が大き く な り 特 性が向上 した。 ま た、 実施例 5 と同様液晶の駆動を本 F E T素子で制御する こ とができ た。 ま た、 安定性 も実施 例 5 と同様であ っ た。  In this figure, the horizontal axis shows the source-drain voltage (VDS), and the vertical axis shows the source-drain current (Is). As can be seen from the graph, as compared with FIG. 12 of the fifth embodiment, the current value between the source and the drain when the gate voltage was applied was increased, and the characteristics were improved. Further, similarly to Embodiment 5, the driving of the liquid crystal could be controlled by the present FET element. The stability was also the same as in Example 5.
なお実施例 5 〜 7 では F E T素子及び液晶表示部を一 つだけ作製 して液晶表示装置 と したが、 同様の手法用 い て複数の F E T素子及び液晶表示部を作製 して液晶表示 装置とする こ と も可能であ る。 ただし、 その場合はフ ォ ト レ ジス ト を用いたパターニ ン グな どの処理が必要であ る In Examples 5 to 7, only one FET element and liquid crystal display section were manufactured to form a liquid crystal display device.However, a plurality of FET elements and liquid crystal display sections were manufactured using the same method to form a liquid crystal display. It can also be a device. However, in that case, processing such as patterning using a photo register is required.
産業上の利用可能性 Industrial applicability
以上のよ う に、 本発明は有機半導体を用いた電界効果 型 ト ラ ン ジス夕及びこれを用いた液晶表示装置に関する も のであ り 、 電界効果 ト ラ ン ジスタや、 それを駆動素子 とする液晶表示装置に適用 される。  As described above, the present invention relates to a field-effect transistor using an organic semiconductor and a liquid crystal display device using the same, and the field-effect transistor and the driving element using the same. Applied to liquid crystal display devices.

Claims

Iff 求 の 範 囲 Range of Iff request
1. ソ ー ス電極, ド レ イ ン電極, ソ ー ス電極 と ド レ イ ン 電極間の電流通路であ り 、 かつ溶剤可溶な前駆体か ら得 られる 7Γ —共役系高分子で形成される半導体層、 こ の半 導体層に対向する絶縁膜、 及びこ の絶緣膜の上記半導体 層 と反対側に設け、 上記半導体層の電導度を印加する電 圧によ り 制御する ゲー ト 電極を備えた電界効果型 ト ラ ン ジ ス 夕 。  1. Source electrode, drain electrode, current path between source electrode and drain electrode, formed from 7 電極 -conjugated polymer obtained from solvent-soluble precursor A semiconductor layer to be formed, an insulating film opposed to the semiconductor layer, and a gate electrode provided on the opposite side of the insulating film to the semiconductor layer and controlling the conductivity of the semiconductor layer by applying a voltage. Field-effect transistor equipped with
2. 溶剤可溶な前駆体か ら得 られる 7Γ -共役系高分子は 一般式  2. The 7Γ-conjugated polymer obtained from the solvent-soluble precursor has the general formula
Figure imgf000047_0001
Figure imgf000047_0001
(但 し 、 R , 及び R 2 は一 H , ア ル キ ル基, ア ル コ キ シ 基の内の一種、 n は 1 0以上の整数) で表 さ れる も ので あ る 請求の範囲第 1 項記載の電界効果型 ト ラ ン ジ ス タ 3. ソ ー ス 電極, ド レ イ ン電極, ソ ー ス電極 と ド レ イ ン 電極間の電流通路であ り 、 ;6、つ溶剤可溶な前駆体の L B 膜か ら得 られな 7 —共役系高分子の L B膜で形成さ れる 半導体 の半導体層に対向する絶緣膜、 及びこ の絶 緣膜の上記半導体層 と反対側に設け、 上記半導体層の電 導度を印加する電圧によ り 制御する ゲー ト 電極を備えた 電界効果型 ト ラ ン ジ ス 夕 。  (Where R and R 2 are one of H, an alkyl group or an alkoxy group, and n is an integer of 10 or more). The field-effect transistor described in paragraph 1. 3. The current path between the source electrode, the drain electrode, and the source and drain electrodes. A dielectric film that is not obtained from the LB film of the soluble precursor and that is provided on the opposite side of the dielectric layer opposite to the semiconductor layer of the semiconductor formed of the 7-conjugated polymer LB film. A field-effect transistor provided with a gate electrode that is controlled by a voltage for applying the conductivity of the semiconductor layer.
斗.ソ ー ス電極 , ト" レ イ ン 電極, ソ ー ス電極 と ド レ イ ン電 極間の電流通路であ り、 かつ溶剤可溶な前駆体か ら得ら れる 71 —共役系高分子で形成される半導体層、 こ の半導 体層に接 し、 上記溶剤可溶な前駆体か ら 7Γ -共役系高分 子を得る反応において、 酸を供与する酸供与膜、 上記半 導体層に対向する絶縁膜、 及びこ の絶縁膜の上記半導体 層 と反対側に設け、 上記半導体層の電導度を印加する電D source electrode, drain electrode, source electrode and drain electrode It is a current path between the electrodes and is obtained from a solvent-soluble precursor. 71—A semiconductor layer formed of a conjugated polymer, in contact with this semiconductor layer, In a reaction for obtaining a 7-conjugated polymer from a body, an acid donating film for donating an acid, an insulating film facing the semiconductor layer, and an insulating film provided on a side of the insulating film opposite to the semiconductor layer; To apply the conductivity of the layer
EEによ り 制御する ゲー ト電極を備えた電界効果型 ト ラ ン ジス タ。 A field-effect transistor with a gate electrode controlled by EE.
5. 溶剤可溶な前駆体か ら得られる 7Γ —共役系高分子は 一般式  5. The 7Γ-conjugated polymer obtained from the solvent-soluble precursor has the general formula
Figure imgf000048_0001
Figure imgf000048_0001
(但し、 R i 及び R 2 は— H, アルキル基, アルコキシ 基の内の一種、 n は 10以上の整数) で表される ものであ る請求の範囲第 4 項記載の電界効果型 ト ラ ン ジス タ。5. The field effect transistor according to claim 4, wherein R i and R 2 are represented by —H, an alkyl group, or an alkoxy group, and n is an integer of 10 or more. Transistor.
6. 酸を供与 した膜は、 一般式 6. The acid-donated membrane has the general formula
Figure imgf000048_0002
Figure imgf000048_0002
(但 し、 R 6 は— H , アルキル基, アルコキ シ基の内の 一種、 n は 1 0以上の整数) で表さ れる 7Γ —共役系高分子 であ る請求の範囲第 4 項記載の電界効果型 ト ラ ン ジス夕 5. The method according to claim 4, wherein R 6 is a 7Γ-conjugated polymer represented by —H, one of an alkyl group and an alkoxy group, and n is an integer of 10 or more. Field effect transistor
7. ゲー ト絶縁膜が酸供与膜を兼ねている請求の範囲第 4
Figure imgf000049_0001
脊 ¾7 ¾ トラ-ノジ、スタ。
7. Claim 4 wherein the gate insulating film also serves as an acid donor film
Figure imgf000049_0001
Spine ¾7 ト ラ Tiger Noji, Star.
8. ソ ー ス電極, ド レ イ ン電極, ソ ー ス電極と ド レ イ ン 電極間の電流通路であ り 、 かつ溶剤可溶な前駆体か ら得 られる 7Γ —共役系高分子で形成さ れる半導体層、 こ の半 導体層に対向する絶縁膜、 及びこ の絶縁膜の上記半導体 層 と反対側に設け、 上記半導体層の電導度を印加する 電 圧に よ り 制御する ゲー ト 電極を有する電界効果型 ト ラ ン ジス タ カ、 らなる駆動部、 並びに上記 ソ ー ス電極及び ド レ イ ン電極の内のいずれか一方 と直列に接続 し、 上記ゲ一 ト 電極に印加さ れる電圧を変化さ せる こ と によ り 制御さ れる液晶表示部を備えた液晶表示装置。  8. Source electrode, drain electrode, current path between source electrode and drain electrode, formed from 7Γ-conjugated polymer obtained from solvent-soluble precursor A semiconductor layer to be formed, an insulating film facing the semiconductor layer, and a gate electrode provided on the opposite side of the insulating layer to the semiconductor layer and controlling the conductivity of the semiconductor layer by applying a voltage. A field effect transistor having a transistor, a driving unit comprising the same, and one of the source electrode and the drain electrode connected in series to be applied to the gate electrode A liquid crystal display device having a liquid crystal display unit that is controlled by changing a voltage.
9. ソ ー ス電極, ド レ イ ン電極, ソ ー ス電極 と ド レ .イ ン 電極間の電流迎路であ り 、 かつ溶剤可溶な前駆休の L Β 膜か ら得 られる π 一共役系高分子の L Β膜で形成さ れる 半導体層、 こ の半導体層に対向する絶緣膜、 及びこ の絶 縁膜の上記半導体層 と反対側に設け、 上記半導体層の電 導度も印加する電圧によ り 制御する ゲー ト電極を有する 電界効果型 ト ラ ン ジス タ か らな る駆動部、 並びに上記 ソ — ス電極及び ド レ イ ン電極の内のいずれか一方 と直列に 接続 し、 上記ゲー ト電極に印加 さ れる電圧を変化さ せる こ と に よ り 制御さ れる液晶表示部を備えた液晶表示装置 9. The current electrode between the source electrode and drain electrode, the source electrode and the drain electrode, and the π-electrode obtained from the solvent-soluble precursory LΒ film. A semiconductor layer formed of an L-layer film of a conjugated polymer, an insulating film opposed to the semiconductor layer, and provided on the opposite side of the insulating film from the semiconductor layer, and the conductivity of the semiconductor layer is also applied. A driving unit comprising a field-effect transistor having a gate electrode controlled by a voltage to be applied, and a series connection with one of the source electrode and the drain electrode. A liquid crystal display device having a liquid crystal display unit controlled by changing a voltage applied to the gate electrode
1 0. ソ ー ス電極, ド レ イ ン電極, ソ ー ス電極と ド レ イ ン 電極間の電流通路であ り 、 かつ溶剤可溶な前駆体か ら得 られる ττ—共役系高分子で形成される半導体層、 こ の半 導体層に接し、 上記溶剤可溶な前駆体か ら 7Γ —共役系高 分子を得る反応において、 酸を供与する酸供与膜、 上記 半導体層に対向する絶縁膜、 及びこ の絶縁膜の上記半導 体層 と反対側に設け、 上記半導体層の電導度を印加する 電圧によ り 制御する ゲ一 ト電極を有する電界効果型 ト ラ ン ジス 夕か らなる駆動部、 並びに上記ソ ース電極及び ド レ イ ン電極の内のいずれか一方と直列に接続し、 上記ゲ ー ト電極に印加される電圧を変化させる こ とによ り 制御 される液晶表示部を備えた液晶表示装置。 10. The current path between the source electrode and the drain electrode, and between the source electrode and the drain electrode, and is obtained from a solvent-soluble precursor. A semiconductor layer formed of a ττ-conjugated polymer, an acid donating film that provides an acid in a reaction in contact with this semiconductor layer and obtains a 7Γ-conjugated polymer from the solvent-soluble precursor, A field effect type including an insulating film facing the semiconductor layer, and a gate electrode provided on a side of the insulating film opposite to the semiconductor layer and controlling the conductivity of the semiconductor layer by applying a voltage; A transistor connected to a transistor, and one of the source electrode and the drain electrode connected in series to change the voltage applied to the gate electrode. A liquid crystal display device having a liquid crystal display section controlled by a liquid crystal display.
PCT/JP1990/000017 1989-01-10 1990-01-10 Fet transistor and liquid crystal display device obtained by using the same WO1990008402A1 (en)

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Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999010939A3 (en) * 1997-08-22 1999-06-10 Koninkl Philips Electronics Nv A method of manufacturing a field-effect transistor substantially consisting of organic materials
WO1999053371A1 (en) * 1998-04-10 1999-10-21 E-Ink Corporation Electronic displays using organic-based field effect transistors
WO2001015233A1 (en) * 1999-08-24 2001-03-01 Koninklijke Philips Electronics N.V. Display device
WO2001017040A1 (en) * 1999-08-31 2001-03-08 E Ink Corporation A solvent annealing process for forming a thin semiconductor film with advantageous properties
EP1179863A2 (en) * 2000-08-10 2002-02-13 Matsushita Electric Industrial Co., Ltd. Organic electronic device, method of producing the same, and method of operating the same
JP2003086805A (en) * 2001-09-07 2003-03-20 Ricoh Co Ltd Thin film transistor and electrical insulation film and method of manufacturing these
US6545291B1 (en) 1999-08-31 2003-04-08 E Ink Corporation Transistor design for use in the construction of an electronically driven display
US6603139B1 (en) 1998-04-16 2003-08-05 Cambridge Display Technology Limited Polymer devices
US7662009B2 (en) 2001-08-10 2010-02-16 Panasonic Corporation Organic electronic device, method of producing the same, and method of operating the same
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6376378A (en) * 1986-09-18 1988-04-06 Mitsubishi Electric Corp Field-effect transistor
JPH01259564A (en) * 1988-04-08 1989-10-17 Mitsubishi Electric Corp Field effect transistor
JPH01259563A (en) * 1988-04-08 1989-10-17 Mitsubishi Electric Corp Field effect transistor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6376378A (en) * 1986-09-18 1988-04-06 Mitsubishi Electric Corp Field-effect transistor
JPH01259564A (en) * 1988-04-08 1989-10-17 Mitsubishi Electric Corp Field effect transistor
JPH01259563A (en) * 1988-04-08 1989-10-17 Mitsubishi Electric Corp Field effect transistor

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* Cited by examiner, † Cited by third party
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WO1999010939A3 (en) * 1997-08-22 1999-06-10 Koninkl Philips Electronics Nv A method of manufacturing a field-effect transistor substantially consisting of organic materials
WO1999053371A1 (en) * 1998-04-10 1999-10-21 E-Ink Corporation Electronic displays using organic-based field effect transistors
US6603139B1 (en) 1998-04-16 2003-08-05 Cambridge Display Technology Limited Polymer devices
WO2001015233A1 (en) * 1999-08-24 2001-03-01 Koninklijke Philips Electronics N.V. Display device
US6750473B2 (en) 1999-08-31 2004-06-15 E-Ink Corporation Transistor design for use in the construction of an electronically driven display
US6545291B1 (en) 1999-08-31 2003-04-08 E Ink Corporation Transistor design for use in the construction of an electronically driven display
US6312971B1 (en) 1999-08-31 2001-11-06 E Ink Corporation Solvent annealing process for forming a thin semiconductor film with advantageous properties
WO2001017040A1 (en) * 1999-08-31 2001-03-08 E Ink Corporation A solvent annealing process for forming a thin semiconductor film with advantageous properties
EP1179863A2 (en) * 2000-08-10 2002-02-13 Matsushita Electric Industrial Co., Ltd. Organic electronic device, method of producing the same, and method of operating the same
EP1179863A3 (en) * 2000-08-10 2006-01-18 Matsushita Electric Industrial Co., Ltd. Organic electronic device, method of producing the same, and method of operating the same
US7662009B2 (en) 2001-08-10 2010-02-16 Panasonic Corporation Organic electronic device, method of producing the same, and method of operating the same
JP2003086805A (en) * 2001-09-07 2003-03-20 Ricoh Co Ltd Thin film transistor and electrical insulation film and method of manufacturing these
JP4704629B2 (en) * 2001-09-07 2011-06-15 株式会社リコー Thin film transistor and manufacturing method thereof
JP2010237436A (en) * 2009-03-31 2010-10-21 Nissha Printing Co Ltd Covering film for instrument, instrument using the same, and method for covering portion of instrument to be covered
JP4629146B2 (en) * 2009-03-31 2011-02-09 日本写真印刷株式会社 Device concealment film, device using the same, and method for concealing device concealment

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