WO1990001783A1

WO1990001783A1 - Temperature stable multilayer capacitor

Info

Publication number: WO1990001783A1
Application number: PCT/US1989/003195
Authority: WO
Inventors: Jorge M. Hernandez; Antonia Alcazar
Original assignee: Rogers Corporation
Priority date: 1988-08-01
Filing date: 1989-07-24
Publication date: 1990-02-22
Also published as: EP0396645A1; JPH03500475A; EP0396645A4; US4873612A

Abstract

The temperature characteristics of each of the layers (20, 22, and 24) in a multilayer ceramic capacitor are adjusted (through chemical doping of the basic dielectric material) to thereby stagger the temperature characteristics (e.g. curie points). As a result, the composite temperature characteristic of the multilayer structure will be much more stable than that of any individual layer. The temperature characteristics of the individual layers will combine in an additive manner thereby achieving the objective of high capacitance and uniform temperature stability for materials which have high dielectric constant but poor temperature stability. Thus, by properly formulating the composition of the layers of a multilayer ceramic chip capacitor, relative temperature stability of capacitance and high volumetric capacitance efficiency will be achieved.

Description

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TEMPERATURE STABLE MULTILAYER CAPACITOR

Background of the Invention:

This invention relates generally to multilayer capacitor chips. More particularly, this invention relates to multilayer ceramic capacitors having a high dielectric constant and which are relatively uniform with respect to changing temperature.

It is well known that typical ceramic dielectrics (such as Class II dielectrics as defined by the Electronic Industries Association, EIA) have dielectric constants which undergo change with respect to temperature.

Typically, the temperature stability or TC curve is bell shaped. A typical TC curve for such a prior art ceramic material is shown in FIGURE 1. It is clear from a review of FIGURE 1 that the dielectric constant (and capacitance) of a ceramic material varies greatly with temperature. The temperature at which the dielectric constant is a maximum is termed the curie point.

As a result of the phenomenon associated with known ceramic materials illustrated in FIGURE 1, ceramic capacitor manufacturers have attempted to develop ceramic dielectric materials with both higher dielectric constants and better temperature stability characteristics. Unfortunately, this approach has been difficult since the present dielectric materials used in multilayer ceramic chip capacitors (for any given layer) inherently have two mutually exclusive characteristics including either good temperature stability and relatively low capacitance (X7R) ; or relatively poor temperature stability and very high capacitance (Z5U) . A ceramic dielectric material having both uniform temperature stability and high dielectric constant is presently not known to applicant.

The ceramic industry has labeled relatively stable temperature characteristic curves for ceramics as X7R type ceramics. One common method of achieving X7R temperature stable curves is to combine a high purity ceramic such as Barium Titanate with a number of known dopants.

Unfortunately, this method suffers from certain drawbacks. For example, modifying pure Barium Titanate with dopants to achieve better temperature stability characteristics leads to lower dielectric constants than are available with the unmodified Barium Titanate.

In many applications, it has become increasingly important and desirable to have the temperature stability of an X7R material, but with a much higher dielectric constant such as found in a Z5U dielectric. Such applications include decoupling of the newer highly dense memory integrated circuits and other VLSI devices which handle high currents at high switching speeds. Still other applications include decoupling in oil drilling equipment, aerospace and military applications where temperature stability is vital.

Summary of the Invention:

The above discussed and other problems and deficiencies of the prior art are overcome or alleviated by the temperature stable multilayer ceramic capacitor chip of the present invention. In accordance with the present invention, the temperature characteristics of each of the layers in a multilayer ceramic capacitor are adjusted (through chemical doping of the basic dielectric material) to thereby stagger the temperature characteristics (e.g. curie points). As a result, the composite temperature characteristic of the multilayer structure will be much more stable than that of any individual layer. The temperature characteristics of the individual layers will combine in an additive manner thereby achieving the objective of high capacitance (e.g. greater than 10,000 DK) and uniform temperature stability for materials which have high dielectric constant but poor temperature stability.

Thus, by properly formulating the composition of the layers of a multilayer ceramic chip capacitor, relative temperature stability of capacitance and high volumetric capacitance efficiency will be achieved. The above discussed and other advantages and features of the present invention will be apparent to and understood by those of ordinary skill in the art from the following detailed description and drawings.

Brief Description of the Drawinσs:

Referring now to the drawings, wherein like elements are numbered alike in the several FIGURES:

FIGURE 1 is a diagram showing dielectric constant versus temperature for a typical ceramic dielectric material;

FIGURE 2 is a curve of dielectric constant versus temperature for a multilayer ceramic capacitor chip in accordance with the present invention;

FIGURE 3 is a cross sectional elevation view of a multilayer ceramic capacitor chip in accordance with the present invention; and FIGURE 4 is a composite curve of change in capacitance versus temperature using a multilayer ceramic capacitor chip employing four different dielectrics in accordance with the present invention.

Description of the Preferred Embodiment:

Referring first to FIGURE 1, a temperature stability or TC curve for a common Class II ceramic dielectric is shown exhibiting a well known bell shaped configuration. Thus, while a selected ceramic dielectric material may have a sufficiently high dielectric constant (DK) at a given temperature or temperature range (with the highest DK occurring at its curie point) , the dielectric constant will change drastically as the temperature either increases or decreases. This is particularly problematic when the dielectric is used in electronic equipment which undergoes even a minor amount of temperature variation.

Referring now to FIGURE 2, the present invention attempts to use the well known phenomenon of FIGURE 1 in a manner which overcomes the drawback of that phenomenon. Thus, as shown in FIGURE 2, the present invention employs a plurality of layers of ceramic dielectric material with each of the layers having TC curves peaking at different (staggered) temperatures so that the effective TC curve will be substantially flat. In FIGURE 2, four curves of four different dielectrics are identified at 10, 12, 14 and 16. Each of these dielectric materials have substantially similar curie points occurring at differing temperatures. A fifth dielectric is identified in dotted lines and is intended to indicate an nth dielectric. Thus, any number of dielectric materials having differing curie points may be used to form an effective TC curve 17 of substantially constant dielectric constant over a very large temperature range. If the dielectric constant chosen is a high dielectric constant, then the resultant multilayer capacitive element will have an extremely high capacitance over an extremely large temperature range. In FIGURE 3, an example of a multilayer capacitive chip in accordance with the present invention is shown generally at 18. Capacitor chip 18 is comprised of alternating layers of ceramic dielectric material of different curie points. In the embodiment shown at 18, three dielectric materials 20, 22 and 24 are stacked in three alternating groups. In addition, and in a known fashion, electrodes 26 are interleaved between the layers of dielectric with alternating electrodes 26 being exposed at respective end termination 28 and 30 to define a well known multilayer ceramic chip.

Multilayer capacitor chip 10 of FIGURE 3 may be manufactured by obtaining known high dielectric constant ceramic material such as Barium Titanate, Lead Magnesium Niobate, etc. and using well known techniques to change the curie temperature of the ceramic by adding dopants to the basic dielectric material. The technique for altering the curie temperature of a ceramic material or relaxor body is described, for example, in "Electronic Ceramics" edited by Lionel M. Levinson, Marcel Dekker (1987), pages 202-213. The final multilayer ceramic capacitor will thus use alternate layers of dielectric with different temperature characteristics (curie points) staggered in such a way so that the composite TC curve looks like a X7R material, but has the advantage of having high dielectric constant of a Z5U relaxor dielectric or a Z5U Barium Titanate dielectric.

FIGURE 4 depicts a composite curve for a multilayer capacitor chip of the type shown in FIGURE 3 utilizing four dielectrics with curie points of -110°C, -35 C, +45°C and +120°C, respectively. The dielectrics chosen were made of lead magnesium niobate having dopants added thereto to change the curie points accordingly. The result is a temperature curve which is relatively stable from between -63°C and 137°C with a C which is within plus or minus 15% of its value at +25 C. Using lead magnesium niobate as the dielectric, the resultant multilayer capacitor chip would have a relatively high dielectric constant of 15,000 over a relatively large temperature range of almost 200°C. In addition to improved temperature stability, the multilayer ceramic capacitors of the present invention also offer improved volumetric capacitance efficiency. In other words, the physical size of a multilayer capacitor employing known temperature stable dielectrics would have to be far larger than a multilayer capacitor in accordance with this invention for a given high capacitance value. For example, a X7R MLC capacitor (with DK of about 4500) made from a prior art temperature stable dielectric would have to be about four to six times as large as a MLC having the same capacitance values which has been made in accordance with the method of the present invention. It will be appreciated that large MLC capacitors are not desirable in modern day digital circuitry where miniaturization is stressed. of course, it will be appreciated that while a particular MLC configuration has been shown in FIGURE 3, that MLC is by example only. Thus, in accordance with the present invention, the number of dielectric layers, the number of differing dielectrics and the groupings thereof may be varied and tailored to specific applications.

Also, the MLC configuration could be of other known types such as the MLC's depicted in FIGURES 4 and 10 of U.S. Patent No. 4,748,537 and FIGURES 11-16 of U.S. Patent No. 4,706,162 (both of which are assigned to the assignee hereof and incorporated herein by reference) .

While preferred embodiments have been shown and described, various modifications and substitutions may be made thereto without departing from the spirit and scope of the invention. Accordingly, it is to be understood that the present invention has been described by way of illustrations and not limitation. What is claimed is:

Claims

CLAIM 1. In a multilayer capacitor including a plurality of layers of dielectric material having interleaved layers of electrodes with alternating electrode layers being electrically connected to one of a pair of respective common terminations, the improvement comprising: at least two of said plurality of layers of dielectric material being comprised of dielectric materials having differing curie points wherein said at least two layers will have mutually distinct curie points which are staggered over a preselected temperature range.

CLAIM 2. The multilayer capacitor of claim 1 wherein: said plurality of layers of dielectric material having differing and staggered cuire points are arranged in alternating groups.

CLAIM 3. The multilayer capacitor of claim 1 wherein: said dielectric materials have a dielectric constant of at least 10,000.

CLAIM 4. The multilayer capacitor of claim 1 wherein: said plurality of layers of dielectric materials have substantially equal dielectric constants.

CLAIM 5. The multilayer capacitor of claim 4 wherein: said dielectric materials have a dielectric constant of at least 10,000.

CLAIM 6. In a multilayer capacitor including a plurality of layers of dielectric material having interleaved layers of electrodes with alternating electrode layers being electrically connected to one of a pair of respective common terminations, the improvement comprising: a first of said plurality of layers of dielectric material having a first curie point; a second of said plurality of layers of dielectric material having a second curie point; and wherein said first and second cuire points are mutually distinct and staggered over a preselected temperature range.

CLAIM 7. The multilayer capacitor of claim 6 wherein: said plurality of layers of dielectric material having differing and staggered cuire points are arranged in alternating groups.

CLAIM 8. The multilayer capacitor of claim 6 wherein: said dielectric materials have a dielectric constant of at least 10,000.

CLAIM 9. The multilayer capacitor of claim 6 wherein: said plurality of layers of dielectric materials have substantially equal dielectric constants.

CLAIM 10. The multilayer capacitor of claim 9 wherein: said dielectric materials have a dielectric constant of at least 10,000.

CLAIM 11. A method of making a multilayer capacitor including a plurality of layers of dielectric material having interleaved layers of electrodes with alternating electrode layers being electrically connected to one of a pair of respective common terminations comprising the steps of: forming at least two of said plurality of layers of dielectric material from dielectric materials having differing curie points wherein said at least two layers will have mutually distinct curie points which are staggered over a preselected temperature range.

CLAIM 12. The method of claim 11 including: arranging said plurality of layers of dielectric material having differing and staggered curie points into alternating groups.

CLAIM 13. The multilayer capacitor of claim 11 wherein: said dielectric materials have a dielectric constant of at least 10,000.

CLAIM 14. The multilayer capacitor of claim 11 wherein: said plurality of layers of dielectric materials have substantially equal dielectric constants.

CLAIM 15. The multilayer capacitor of claim 14 wherein: said dielectric materials have a dielectric constant of at least 10,000.

CLAIM 16. A method of making a multilayer capacitor including a plurality of layers of dielectric material having interleaved layers of electrodes with alternating electrode layers being electrically connected to one of a pair of respective common terminations, the improvement comprising the steps of: forming a first of said plurality of layers of dielectric material with a first curie point; forming a second of said plurality of layers of dielectric material with a second curie point wherein said first and second cuire points are mutually distinct and staggered over a preselected temperature range.

CLAIM 17. The method of claim 16 including: arranging said plurality of layers of dielectric material having differing and staggered cuire points in alternating groups.

CLAIM 18. The method of claim 16 wherein: said dielectric materials have a dielectric constant of at least 10,000.

CLAIM 19. The method of claim 16 wherein: said plurality of layers of dielectric materials have substantially equal dielectric constants.

CLAIM 20. The method of claim 16 wherein said forming steps comprise: doping said first and second layers of dielectric material.