WO1981002937A1 - Systeme de commande sequentielle a memoire morte - Google Patents

Systeme de commande sequentielle a memoire morte Download PDF

Info

Publication number
WO1981002937A1
WO1981002937A1 PCT/JP1980/000061 JP8000061W WO8102937A1 WO 1981002937 A1 WO1981002937 A1 WO 1981002937A1 JP 8000061 W JP8000061 W JP 8000061W WO 8102937 A1 WO8102937 A1 WO 8102937A1
Authority
WO
WIPO (PCT)
Prior art keywords
output
read
pulse
sequence
data
Prior art date
Application number
PCT/JP1980/000061
Other languages
English (en)
Japanese (ja)
Inventor
Y Kuze
Original Assignee
Y Kuze
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Y Kuze filed Critical Y Kuze
Priority to PCT/JP1980/000061 priority Critical patent/WO1981002937A1/fr
Priority to AU59844/80A priority patent/AU5984480A/en
Publication of WO1981002937A1 publication Critical patent/WO1981002937A1/fr

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/045Programme control other than numerical control, i.e. in sequence controllers or logic controllers using logic state machines, consisting only of a memory or a programmable logic device containing the logic for the controlled machine and in which the state of its outputs is dependent on the state of its inputs or part of its own output states, e.g. binary decision controllers, finite state controllers

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Programmable Controllers (AREA)

Abstract

Systeme de commande sequentielle a memoire morte compose d'unites compactes standardisees: un controleur de sequence a memoire morte (A) dans lequel une EPROM dans laquelle sont enregistrees des donnees predeterminees est montee dans une unite de relais de sortie et les relais de sortie sont mis sous tension pendant des intervalles determines par les donnees stockees correspondant a des impulsions d'adresse appliquees a l'exterieur de maniere a commander une charge; un dispositif de controle de pas (B) fournit avec la sortie de donnees divisee de l'EPROM et qui repond en controlant l'exactitude du fonctionnement dans chaque pas sequentiel de maniere a permettre l'avance vers un autre pas; un controleur (C) d'impulsions d'horloge de lecture de sortie qui produit des impulsions d'horloge de lecture de sortie d'une periode donnee etablie par une valeur predeterminee permettant de commander l'operation de sortie du controleur de sequence a consultation seule et des impulsions d'horloge provoquant un arret en fonction d'un signal d'urgence provenant du dispositif de controle de pas; un dispositif d'alimentation de courant (B). Le systeme peut etre adapte de maniere efficace a un systeme commande a n'importe quelle echelle en combinant convenablement ces unites.
PCT/JP1980/000061 1980-04-05 1980-04-05 Systeme de commande sequentielle a memoire morte WO1981002937A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/JP1980/000061 WO1981002937A1 (fr) 1980-04-05 1980-04-05 Systeme de commande sequentielle a memoire morte
AU59844/80A AU5984480A (en) 1980-04-05 1980-04-05 Read-only sequence control system

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
WOJP80/00061 1980-04-05
PCT/JP1980/000061 WO1981002937A1 (fr) 1980-04-05 1980-04-05 Systeme de commande sequentielle a memoire morte

Publications (1)

Publication Number Publication Date
WO1981002937A1 true WO1981002937A1 (fr) 1981-10-15

Family

ID=13706014

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP1980/000061 WO1981002937A1 (fr) 1980-04-05 1980-04-05 Systeme de commande sequentielle a memoire morte

Country Status (2)

Country Link
AU (1) AU5984480A (fr)
WO (1) WO1981002937A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0238230A2 (fr) * 1986-03-06 1987-09-23 Advanced Micro Devices, Inc. Dispositif logique programmable
EP0252287A2 (fr) * 1986-06-02 1988-01-13 KUZE, Yoshikazu Commande à mémoire fixe

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50144888A (fr) * 1974-05-14 1975-11-20
US4001557A (en) * 1975-10-14 1977-01-04 The United States Of America As Represented By The United States Energy Research And Development Administration Stored program digital process controller
US4068155A (en) * 1977-01-31 1978-01-10 Robbins Roscoe S Control system for operating machine
JPS5428983A (en) * 1977-08-08 1979-03-03 Giichi Kuze Sequence controller
JPS5518734A (en) * 1978-07-26 1980-02-09 Giichi Kuze Sequential controller

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50144888A (fr) * 1974-05-14 1975-11-20
US4001557A (en) * 1975-10-14 1977-01-04 The United States Of America As Represented By The United States Energy Research And Development Administration Stored program digital process controller
US4068155A (en) * 1977-01-31 1978-01-10 Robbins Roscoe S Control system for operating machine
JPS5428983A (en) * 1977-08-08 1979-03-03 Giichi Kuze Sequence controller
JPS5518734A (en) * 1978-07-26 1980-02-09 Giichi Kuze Sequential controller

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0238230A2 (fr) * 1986-03-06 1987-09-23 Advanced Micro Devices, Inc. Dispositif logique programmable
EP0238230A3 (en) * 1986-03-06 1989-03-15 Advanced Micro Devices, Inc. Programmable logic device
EP0252287A2 (fr) * 1986-06-02 1988-01-13 KUZE, Yoshikazu Commande à mémoire fixe
EP0252287A3 (en) * 1986-06-02 1989-11-02 Yoshikazu Kuze Read-only sequence control system

Also Published As

Publication number Publication date
AU5984480A (en) 1981-10-26

Similar Documents

Publication Publication Date Title
WO1981002937A1 (fr) Systeme de commande sequentielle a memoire morte
EP0252287A2 (fr) Commande à mémoire fixe
JPS6192180A (ja) 管曲げ機用電気モ−タ制御装置
JPS59500140A (ja) 安全装置を有する電子式制御装置
CN209842372U (zh) 一种驱动系统
WO1981001338A1 (fr) Controleur sequentiel pour memoire morte
WO1981001339A1 (fr) Dispositif de commande pour impulsions d'horloge de lecture de sortie
KR970003824B1 (ko) 판독 전용 시퀀스 컨트롤러
CN214674958U (zh) 一种驱动电路和电机系统
CN206759359U (zh) 伺服驱动器的外部编码器的自动上电控制系统
WO1981002938A1 (fr) Dispositif de controle de pas pour un controleur sequentiel miniaturise a memoire morte
JPH09162714A (ja) フェールセーフな計時回路及びこの計時回路を用いたオン・ディレー回路
CN207564986U (zh) 一种3d打印机控制器
JPH0630534B2 (ja) 電源装置の故障検出回路
WO1981001337A1 (fr) Controleur sequentiel pour memoire morte
CN106130413A (zh) 基于cpld的多路直流电机驱动控制系统
CN205065294U (zh) 一种供气气压稳定的气源装置
KR900003206B1 (ko) 판독 전용 시퀀스 제어 시스템
JP2521266B2 (ja) ポンプ駆動装置
JPH067388Y2 (ja) デ−タ変換用キ−入力装置
JPS6355384A (ja) ポンプ駆動装置
AU726973B2 (en) Read-only sequence controller having a gate array composition
RU1816316C (ru) Устройство дл измерени количества продукта и его дозировки
PL89078B1 (fr)
CN109725567A (zh) 一种用于水下的冗余步进电机驱动器的冗余控制系统

Legal Events

Date Code Title Description
AK Designated states

Designated state(s): AU GB US

AL Designated countries for regional patents

Designated state(s): CH DE FR NL