WO1980001338A1

WO1980001338A1 - High voltage junction solid-state switch

Info

Publication number: WO1980001338A1
Application number: PCT/US1979/001044
Authority: WO
Inventors: T Riley; B Murphy; A Hartman; P Shackle
Original assignee: Western Electric Co
Priority date: 1978-12-20
Filing date: 1979-12-06
Publication date: 1980-06-26
Also published as: HK69284A; IL58973A; GB2049282A; NL7920185A; CA1131800A; HU181028B; IT7928205A0; IN152898B; IE792473L; FR2445028B1; CH659152A5; TR21213A; AU5386879A; AU529486B2; SE438577B; ES487065A1; SE8005746L; PL220496A1; BE880727A; IT1126602B

Abstract

A high voltage solid-state switch, which allows alternating or direct current operation and provides bidirectional blocking, consists of a first p type semiconductor body (16, 16a) on an n type semiconductor wafer substrate (12). A p+ type anode region (18, 18a) and an n+ type cathode region (24, 24a) exist in portions of the semiconductor body (16, 16a). A second p type region (22, 22a) of higher impurity concentration than the semiconductor body (16, 16a) encircles the cathode region (24, 24a). The anode region (18, 18a) and second p type region (22, 22a) are separated from each other by a portion of the semiconductor body (16, 16a). The semiconductor wafer substrate (12), which acts as a gate, is adapted to allow low resistance contact thereto. Separated low resistance contacts are made to the anode region (18, 18a) and to the cathode region (24, 24a).

Description

SOLID-STATE SWITCH Technical Field

This invention relates to solid-state structures and, in particular, to high voltage solid-state structures useful in telephone switching systems and many other applications.

Background of the Invention

In an article entitled "A Field Terminated Diode" by Douglas E. Houston et al , published in IEEE Transactions on Electron Devices, Vol. ED-23, No. 8, August 1976, there is described a discrete solid-state high voltage switch that has a vertical geometry and which includes a region which can be pinched off to provide an "OFF" state or which can be made highly conductive with dual carrier injection to provide an "ON" state. "Dual carrier injection" refers to the injection of both holes and electrons form a conductive plasma in the semiconductor. One problem with this switch is that it is not easily manufacturable with other like switching devices on a common substrate. Another problem is that the spacing between the grids and the cathode should be small to limit the magnitude of the control grid voltage; however, this limits the useful voltage range because it reduces grid-to-cathode breakdown voltage. This limitation in turn limits to relatively low operating voltages the use of two devices connected in antiparallel ; i.e. with the cathode of each coupled to the anode of the other. Such a circuit would be useful as a high voltage bidirectional solid-state switch. An additional problem is that the base region should ideally be highly doped to avoid punch-through from the anode to the grid; however, this leads to a low voltage breakdown between anode and cathode. Widening of. the base region limits the punch-through effect; however, it also increases the resistance of the device in the "ON" state.

It is desirable to have a solid-state switch which is easily integratable such that two or more switches can be simultaneously fabricated on a common substrate and wherein each switch is capable of bilateral blocking of relatively high voltages. Summary of the Invention The present invention relates to a structure with , a semiconductor body whose bulk is of one conductivity type and which has a major surface and in which the semiconductor body is formed on a semiconductor support (substrate) which is of the opposite conductivity type. Separated localized first and second regions exist in the semiconductor body. The first region is of the one conductivity type and the second region is of the opposite conductivity type. Each region has a portion thereof which extends to the major surface. Both regions are of relatively low resistivity as compared to the bulk of the semiconductor body. The first and second regions serve as the anode and cathode of the structure. Separate low resistance electrical contacts are made to the anode and cathode regions. The structure is adapted such that during operation there is dual carrier injection. The body is in contact with the substrate and the substrate is adapted to facilitate an electrode being coupled thereto to serve as the gate of the structure. This structure, when suitably designed, can be operated as a switch which is characterized by a low impedance path between anode and cathode when in the ON (conducting) state and a high impedance path between anode and cathode when in the OFF (blocking) state. The potential applied to the gate determines the state of the switch. During the ON state there is dual carrier injection that reduces the resistance between anode and cathode.

In another embodiment of the invention a se i- conductor body as described above, including the first and second regions, is surrounded except for the major surface portion thereof by a semiconductor region of the

OMPI W1PO opposite conductivity type. A plurality of the semiconductor bodies, each having a surrounding separate semiconductor region, are formed in a common semiconductor wafer of the one conductivity type with portions of the semiconductor wafer separating all the semiconductor bodies.

These structures, which are to be denoted as gated diode switches (GDSs) , when suitably designed, are capable of blocking relatively large potential differences between anode and cathode in the OFF state, independent of polarity, and are capable of conducting relatively large currents with a relatively low voltage drop between aiode and cathode in the ON state. The bilateral blocking characteristic of these GDS structures makes them particularly useful in many applications. Two of the above-described GDSs can be coupled together with the gates being common and the cathode of each coupled to the anode of the other. This combination forms a bidirectional high voltage switch. Arrays of the GDSs can be fabricated on a common semiconductor wafer to form crosspoints, or two GDSs can be fabricated with a common gate to form a bidirectional switch. Brief Description of the Drawing

FIG..1 illustrates a structure in accordance with one embodiment of the invention;

FIG. 2 illustrates a proposed electrical symbol for the structure of FIG. 1; FIG. 3 illustrates a top view of a structure in accordance with another embodiment of the invention;

FIG. 4 illustrates a structure in accordance with still another, embodiment of the invention;

FIG. 5 illustrates a structure in accordance with still another embodiment of the invention;

FIG. 6 illustrates a structure in accordance with still another embodiment αf the invention; and

OMPI /., WIPO . FIG. 7 illustrates a structure in accordance with still another embodiment of the invention. Detailed Description

Referring now to FIG. 1, there is illustrated a semiconductor structure 10 comprising two essentially identical gated diode switches GDS1 and GDS2 which are illustrated within dashed line rectangles and are both formed in a semiconductor wafer or substrate 12. Semiconductor structure 10 has a major surface 11. Substrate 12 is of the one conductivity type and acts as a common gate and support for GDS1 and GDS2.

An epitaxial layer of the opposite conductivity type of substrate 12 is isolated by semiconductor regions 20 into semiconductor bodies 16 and 16a. Many bodies 16, 16a can be formed on substrate 12 in addition to the two illustrated. Regions 20 are of the same conductivity type as substrate 12 but have a higher impurity concentration and extend from major surface 11 down to substrate 12. Within body 16 is also included a semiconductor anode region 18 of the same conductivity type as body 16 but of higher impurity concentration. A semiconductor region 22 is of the same conductivity type as body 16 but of lower resistivity than body 16. A semiconductor cathode region 24 is included in a portion of region 22 and has a portion which extends to major surface 11. Region 24 is of the same conductivity type and essentially the same impurity concentration as regions 20. Electrodes 28, 32 and 30 make low resistance contact to regions 18, 24, and 20, respectively. Region 20 makes low resistance contact to substrate 12. Thus, electrode 30 makes low resistance contact to substrate 12 and serves as a common gate electrode for GDS1 and GDS2. An electrode 38, which is optional and can be a metal or semiconductor material, is located between anode electrode 28 and cathode electrode 32. Electrode 38 is electrically coupled to the substrate by an electrical

OMPI connection to electrode 30.

Body 16a has contained therein semiconductor regions 18a, 22a, and 24a. Electrodes 28a, 32a, and 30 are coupled to regions 18a, 22a, and 24a, respectively. These regions are essentially the same as the corresponding regions of body 16. An insulator layer 26 electrically isolates all of the above- described electrodes from portions of structure 10, except those portions which are meant to be electrically contacted.

In one illustrative embodiment, substrate 12 is of n type conductivity, regions 20 and 24 (24a) are of n+ type conductivity, body 16 (16a) is of p- type conductivity, region 18 (18a) is of p+ type conductivity, region 22 (22a) is of p_ type conductivity and of lower resistivity than body 16 (16a), and electrodes 28 (28a), 32 (32a), and 30 are aluminum. In this embodiment anode electrode 28 is electrically coupled to cathode electrode 32a, and cathode electrode 32 is coupled to anode electrode 28a.

Proposed electrical symbols for GDSl and GDS2 are illustrated in FIG. 2. The anode, cathode, and gate electrode terminals of GDSl are 28, 32 and 30, respectively. The corresponding terminals of GDS2 are 28a, 32a, and 30. This combination of GDSl and GDS2 acts as a bidirectional switch which is capable of bilateral blocking of potentials independent of whether the anode or cathode of either gated diode switch is at the more positive potential. GDSl and GDS2 are both essentially identical and operate in essentially the same manner. Accordingly, the below description of GDSl is equally applicable to GDS2. GDSl is characterized by a relatively low resistance path between anode region 18 and cathode region 24 when in the ON (conducting) state and by a substantially higher impedance when in the OFF (blocking) state. In the ON state the potential -of the gate electrode 30 is typically at or below that of the potential anode 28. Holes are injected. into body 16 from anode region 18 and electrons are injected into body 16 from cathode region 24. These holes and electrons can be in sufficient numbers to form a plasma which conductivity modulates body 16. This effectively lowers the resistance of body 16 such that the resistance between anode region 18 and cathode region 24 is relatively low when GDSl is operating in the ON state. This type of operation, in which both holes and electrons act as current carriers, is denoted as dual carrier injection. The type of structure described herein is denoted as a gated diode switch (GDS) .

Region 22 helps- limit the punch-through of a depletion layer formed during operation between region 20 and substrate 12 and cathode region 24. Region 22 also helps inhibit formation of a surface inversion layer between regions 24 and 20. In addition, it allows anode region 18 and cathode region 24 to be relatively closely spaced. This results in relatively low resistance between anode region 18 and cathode region 24 during the ON state.

Conduction between anode region 18 and cathode region 24 is inhibited or cut off if the potential of gate electrode 30 is sufficiently more positive than that of anode electrode 28 and cathode electrode 32. The amount of excess positive potential needed to inhibit or cut off conduction is a function of the geometry and impurity concentration levels of structure 10. This positive gate potential causes the portion of body 16 between gate region 12 and a portion of oxide layer 26 to be depleted such that the potential of this portion of body 16 is more positive than that of the anode 18 and cathode 24 regions. This positive potential barrier inhibits the conduction of holes from anode region 18 to cathode region 24. It also serves to collect electrons emitted at cathode region 24 before they can reach anode region 18. This essentially pinches off body 16 against dielectric layer 26 in the bulk portion thereof which ^■ is" between"the ano-de and cathode regions (18, 24) and extends from region 12 to dielectric layer 26. The use of electrode 38 reduces the magnitude of the potential needed to inhibit or cut off conduction. In the OFF state GDSl is capable of bilateral blocking of relatively large potentials between anode and cathode regions, independent of which region is at the more positive potential. During the ON state of GDSl, the p-n junction diod'e 'comprising body 16 and region 20 becomes forward-biased. Current limiting means (not illustrated) may be used to limit the conduction through the forward-biased diode. GDSl and GDS2 need not have the anodes and cathodes connected together. GDSl or GDS2 can be used individually but the gates are common.

Referring now to FIG. 3, there is illustrated a top view of a preferred embodiment of a dual GDS semiconductor structure 100 which has been fabricated. Structure 100 is similar to structure 10 except the anode and cathode regions are curved. This geometry tends to limit localized voltage field concentration which causes voltage breakdown and adds additional perimeter common to .the anode and cathode regions in order to facilitate low ON resistance and thereby facilitate high current operation. Structure 100 has been fabricated on an ir type" substrate having a thickness of 457 to 559 microns and a conductivity of 10¹⁵ to 10¹⁶ impurities/cm³. Bodies 160 and 160a are of p-type conductivity with a thickness of 30 to 40 microns, a width of 720 microns, a length of 910

OMPI microns, and an impurity concentration in the range of 5 - 9 x 10l2 impurities/cm³. Curved anode regions 180 and 180a are of p+ type conductivity with a thickness of 2 to 4 microns, and an impurity concentration of 10*9 impurities/cm³. Curved cathode regions 240 and 240a are of n+ type conductivity with a thickness of 2 to 4 microns, and an impurity concentration of 1019 impurities/cm³. The overall length and width of the fabricated circuit is 1910 microns by 1300 microns. The spacing between anode and cathode is typically 120 microns.

Some of the fabricated structures contained conductor regions 380, 380a which were 60 microns wide and others did not. The structures fabricated without regions 380, 380a required a potential of 22 more volts on the gate than the anode to inhibit or cut off conduction between anode and cathode. The structures fabricated with conductor regions 380, 380a required the gate potential to have an excess of only 7.5 volts over the anode potential to effect turnoff. The fabricated structure was able to block 300 volts and conduct 500 milliamperes with a voltage drop between anode and cathode of 2.2 volts. This structure was able to operate under current surges of 10 amperes for a duration of one millisecond.

Referring now to FIG. 4 there is illustrated a structure 1000 which is very similar to structure 10 and all components thereof which are essentially identical or similar to those of structure 10 are denoted by the same reference number with the addition of two "0s" at the end. The basic difference between structures 1000 and 10 is the elimination from structure 1000 of semiconductor regions 22, 22a of structure 10 of FIG. 1. Appropriate spacing of regions 2400, 2400a from region 2000 provides sufficient protection against depletion layer punch- through to regions 2400, 2400a and allows operation of structure 1000 as a high voltage switch.

Referring now to FIG. 5, there is illustrated a structure 10,000 which is very similar to solid-state structure 10 and all components thereof which are essentially identical to those of structure 10 are denoted by the same reference number with the addition of three "0s" at the end. The basic difference between structures 10,000 and 10 is the use of semiconductor guard ring regions 40, 40a encircling regions 24,000, 24,000a and being separated therefrom by portions of bodies 16,000, 16,000a. Guard ring regions 40, 40a provide the same type of protection against surface layer inversion as region 22, 22a of structure 10. The protection is believed adequate in some cases to provide a high voltage solid-state switch. Guard rings 40, 40a are of the same conductivity type as bodies 16,000, 16,000a but of lower resistivity. Guard rings 40, 40a can be extended (as is illustrated by the dashed lines) so as to contact cathode regions 24,000, 24,000a.

Referring now to FIG. 6, there is illustrated a structure 100,000 which is similar to structure 10. All portions of structure 100,000 which are similar or essentially identical to corresponding portions of structure 10 are denoted by the same reference number with the addition of four "0s" at the end. One difference between structure 100,000 and structure 10 is the use of semiconductor guard ring regions 400, 400a encircling cathode regions 240,000, 240,000a. Guard rings 400, 400a are similar to semiconductor guard ring regions 40, 40a of structure 10,000. The dashed line portion of guard rings 400, 400a illustrates that they can be extended so as to contact cathodes 240,000, 240,000a. The combination of regions 220,000, 220,000a and guard rings 400, 400a provides protection against inversion of bodies 160,000, 160,000a, particularly between gate region 200,000 and cathode region 240,000, 240,000a, and provides protection against depletion layer punch-through to cathode region 240,000,_ 240,000a. This type of dual protection around cathode region 240,000, 240,000a is the preferred 5 pro ection structure. Regions 220,000, 220,000a, and 400, 400a are all of the same conductivity type as bodies 160,000, 160,000a but of low resistivity. Regions 400,400a have lower resistivity than regions 220,000, 220,000a. Another difference between structure

10 100,000 and structure 10 is semiconductor regions 70, 70a, which are of the same conductivity type as cathode regions 240,000, 240,000a. Regions 70, 70a are in electrical contact with electrodes 380,000, 380,000a and act as top gates. The use of gate

15 regions 70, 70a results in a reduction in the magnitude of the potential necessary to cut off or inhibit conduction between anode regions 180,000, 180,000a and cathode regions 240,000, 240,000a.

Now referring to FIG. 7, there is illustrated a

20 semiconductor structure 42 which comprises a plurality of essentially identical gated diode switches (GDSs) of which only two GDS3 and GDS4 (illustrated within dashed- line rectangles), are shown. Semiconductor structure 42 comprises a semiconductor support member

25 (substrate) 44 which is of a first conductivity type and has a major surface 46. Within a portion of substrate 44 are located separate regions 48 and 48a which are of the opposite conductivity type of substrate 44 and and are separated from each other by portions of

30 substrate 44 and by regions 50 which are of the same conductivity type as substrate 44 but of higher impurity concentration. Regions 50 are optional. Essentially identical semiconductor bodies 52 and 52a are contained within regions 48 and 48a, respectively.

35 Bodies 52 and 52a are of the same conductivity type as substrate 44. Within body 52 exists an anode

OMPI WIPO region 54 which is of the same conductivity type as body 52 but of higher impurity concentration. Also within body 52 exists a region 56 which is of the same conductivity type as body 52 but of higher impurity concentration and which is separated from region 54 by portions of body 52. A cathode region 58 exists within a p-o-rtiσn of region 56- and is separated from body 52 by portions of region 56. Cathode region 58 is of the same conductivity type as region 48. Electrodes 60, 62, 64 and 66 make low resistance contact to regions 48, 54, 58, and 50, respectively. If regions 50 are eliminated, electrode 66 makes contact to region 44 directly or through a low resistivity semiconductor region (not illustrated) like region 54, but contained in a portion of substrate 44. An insulating layer 68, typically silicon dioxide, electrically isolates all of the electrodes of structure 42 from major surface 46 except in the regions in which it is desired to make low resistance contact. Body 52a, regions 54a, 56a, and 58a and electrodes 60a, 62a, and 64a of GDS4 are essentially identical to the corresponding regions of GDS3.

Substrate 44 is typically held at the most negative potential available. This serves to reverse bias the p-n junctions formed by regions 48, 48a and substrate 44 such that all the GDSs contained within substrate 44 are junction isolated from each other.

GDS3 and GDS4 operate in essentially the same manner as described for the operation of GDSl and GDS2 of FIG. l. Region 48 serves as the gate, with regions 54 and 58 serving as anode and cathode, respectively. It is to be noted that gate regions 48 and 48a are physically-aπd electrically separate and, accordingly, GDS3 and GDS4 can be operated essentially completely independently of each other since the respective gates, anodes, and cathodes are electrically separate. Thus, structure 42 facilitates the fabrication of an array of GDSs with each GDS being capable of being operated independently of all other GDSs of the array. 5 The embodiments described herein are intended to be illustrative of the general principles of the invention. For example, the impurity concentration levels, spacings between regions, and other dimensions of the regions can be adjusted to allow significantly

10 higher operating voltages and currents than have been disclosed. A dielectric layer can be inserted between regions 48 and 48a and region 44 or said dielectric layer can be substituted for regions 44 and 50. Additionally, other types of dielectric materials,

15 such as silicon nitride, can be substituted for silicon dioxide. Conductor regions such as 38 of FIG. 1 can be incorporated into the structures of FIGS. 3, 4, 5, 6 and 7. Regions 56 and 56a can be eliminated. This decreases the voltage handling capability of the

20 resulting GDS structures; however, the spacing between anode and cathode and between adjacent GDS structures can be increased to increase the usable voltage ranges. In addition, regions 56 and 56a can be replaced by guard rings such as the type illustrated

25 around the cathode 24,000 of FIG. 5. Still further, a region such as region 220,000 and a guard ring like guard ring 400 of FIG. 6 can be substituted for regions 56, 56a of FIG. 7. The electrodes can be doped polysilicon, gold, titanium, or other types of

30 conductors. The conductivity of all semiconductor substrates and regions can be reversed provided the voltage polarities are appropriately changed in the manner well known in the art. In such case, regions 18 18a, 180, 180a, 1800, 1800a, 18,000, 18,000a, 54, 54a,

35 180,000, and 180,000a become cathodes and regions

24, 24a, 240, 240a, 2400, 2400a, 24,000, 24,000a, 58,

OMPI 58a, 240,000, and 240,000a become anodes. It is to be appreciated that the structures of the 'present invention allow alternating or direct current operation.

OMPI_. IPO

Claims

1. A solid-state switching device comprising a semiconductor body C16) a bulk portion of which is of a first conductivity type, a first region (18) of the first conductivity type, a second region (24) of a second conductivity type opposite that of the first conductivity type, a gate region C12 of the second conductivity type, the first, second and gate regions having a lower resistivity than that of the bulk portion and being mutually separated by portions of the semiconductor body bulk portion (16), the parameters of the device being such that, with a first voltage applied to the gate region, a depletion region is formed in the semiconductor body which sub- stantially prevents current flow between the first and second regions, and that, with a second voltage applied to the gate region and with appropriate voltages applied to the first and second regions, a relatively low resistance current path is established between the first and second regions by dual carrier injection, CHARACTERIZED IN THAT the first and second regions each have a surface contained on a first major surface of the semiconductor body (16), and the gate region is a semiconductor member (12) that contacts the semi¬ conductor body along a second surface opposite the first surface.

2. The device of claim 1 further CHARACTERIZED IN THAT the semiconductor body (16) includes a localized third region (22) of the first conductivity type and of a resistivity intermediate that of the bulk of semiconductor body (16), and the first region (18), the third region (22) being located so as to surround the second region (24) .

3. The device of claim 1 CHARACTERIZED IN THAT the gate region (48 of Fig. 7) is located between the semiconductor body bulk portion (52) 5 and a wafer substrate portion (44) of the first conductivity type.

4. The device ^"of claim 2 CHARACTERIZED IN THAT the conductivities of the semiconductor body 10 (16), the first region (18), the second region C24) and the third region (22) axe p-, p+, n+, and -. type, respectivel .

5. The device of claim 1 CHARACTERIZED IN THAT

15 the gate region is common to at least two switching devices with the first region (18) of one device being connected to the second region (_.24a) of the other device and the second region (24) of the first device being connected to the first region

20. Q.8a) of the second device.

6. The device of claim 3 CHARACTERIZED IN THAT a plurality of switching devices (GDS3, GDS4) are located on wafer substrate (44), and the 25 wafer substrate includes a plurality of regions (_.50) of the first conductivity type but of lower resistivity than the wafer substrate.

7. The device of claim 1 CHARACTERIZED IN THAT 0 the semiconductor body (16,000) includes a localized fourth region (40) surrounding but not contacting the second region, the fourth region being of the first conductivity type and of lower resistivity than the bulk portion (16,000) . 5 8. The device of claim 2 CHARACTERIZED IN THAT the semiconductor body includes a fourth region (400) contained within the third region (220,000) and surrounding but not contacting the se-cond region (240,000), the fourth region being of the first conductivity type and of a lower resistivity than the third region..