UST912006I4 - Multiphase nucleus loading for a virtual storage system - Google Patents

Multiphase nucleus loading for a virtual storage system Download PDF

Info

Publication number
UST912006I4
UST912006I4 US912006DH UST912006I4 US T912006 I4 UST912006 I4 US T912006I4 US 912006D H US912006D H US 912006DH US T912006 I4 UST912006 I4 US T912006I4
Authority
US
United States
Prior art keywords
nucleus
loading
control program
initialization
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Application granted granted Critical
Publication of UST912006I4 publication Critical patent/UST912006I4/en
Pending legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/4401Bootstrapping

Definitions

  • a multiphase control program nucleus loading method reduces the amount of real storage required for initialization by dividing the initialization process into phases. Each phase operatng in sequence controls the loading of a different portion of the control program nucleus into real or virtual storage. Only those portions of the control program nucleus required for performing the initialization process at a given time are loaded into real storage. After a. function is completed, the obsoleted portion of the nucleus is overlaid with another portion of the nucleus which will perform a next series of functions which are required.
  • FIG. 7A A VIRTUAL STORAGE SYSTEM Filed July 31, 1972 ENTER PAGING INITIALIZE PAGING SUPERVISOR INITIALIZE SYSTEM EXIT TO PHASE 3
  • FIG. 7A A VIRTUAL STORAGE SYSTEM Filed July 31, 1972

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

A MULTIPHASE CONTROL PROGRAM NUCLEUS LOADING METHOD REDUCES THE AMOUNT OF REAL STORAGE REQUIRED FOR INITIALIZATION BY DIVIDING THE INITIALIZATION PROCESS INTO PHASES. EACH PHASE OPERATNG IN SEQUENCE CONTROLS THE LOADING OF A DIFFERENT PORTION OF THE CONTROL PROGRAM NUCLEUS INTO REAL OR VIRTUAL STORAGE. ONLY THOSE PORTIONS OF THE CONTROL PROGRAM NUCLEUS REQUIRED FOR PERFORMING THE INITIALIZATION PROCESS AT A GIVEN TIME ARE LOADED INTO REAL STORAGE. AFTER A FUNCTION IS COMPLETED, THE OBSOLETED PORTION OF THE NUCLEUS IS OVERLAID WITH ANOTHER PORTION OF THE NUC-

CLEUS WHICH WILL PERFORM A NEXT SERIES OF FUNCTIONS WHICH ARE REQUIRED. BY USING A TIME DIMENSIONAL SCATTER LOADING TECHNIQUE FOR LOADING PORTIONS OF THE CONTROL PROGRAM NUCLEUS ONLY WHEN THEY ARE REQUIRED FOR THEIR FUNCTION, THE AMOUNT OF REAL STORAGE REQUIRED FOR NUCLEUS INITIALIZATION IS SIGNIFICANTLY REDUCED, AND PAGEABLE PORTIONS OF THE CONTROL PROGRAM NUCLEUS NOT REQUIRED FOR INITIALIZATION ARE LOADED DIRECTLY INTO VIRTUAL STORAGE.

Description

DEFENSIVE PUBLICATION UNITED STATES PATENT OFFICE Published at the request of the applicant or owner in accordance with the Notice of Dec. 16, 1969. 869 O.G. 687. The abstracts of Defensive Publication applications are identified by distinctly numbered series and are arranged chronologically. The heading of each abstract indicates the number of pages of specification, including claims and sheets or drawings contained in the application as originally filed. The files of these applications are available to the public for inspection and reproduction may he purchased for 30 cents a sheet.
Defensive Publication applications have not been examined as to the merits of alleged invention. The Patent Oflice makes no assertion as to the novelty of the disclosed subject matter.
PUBLISHED JULY 10, 1973 T912,006 MULTIPHASE NUCLEUS LOADING FOR A VIRTUAL STORAGE SYSTEM Timothy L. Brannon, Endwell, and Henry T. Mehl, and
Michael R. Zick, Endicott, N.Y., assignors to International Business Machines Corporation, Armonk, N.Y.
Filed July 31, 1972, Ser. No. 276,621 Int. Cl. G06f 7/00, 9/00, 15/45 US. Cl. 444-1 7 Sheets Drawing. 20 Pages Specification IPL NIP
PRIOR RT A multiphase control program nucleus loading method reduces the amount of real storage required for initialization by dividing the initialization process into phases. Each phase operatng in sequence controls the loading of a different portion of the control program nucleus into real or virtual storage. Only those portions of the control program nucleus required for performing the initialization process at a given time are loaded into real storage. After a. function is completed, the obsoleted portion of the nucleus is overlaid with another portion of the nucleus which will perform a next series of functions which are required. By using a time dimensional scatter loading technique for loading portions of the control program nucleus only when they are required for their function, the amount of real storage required for nucleus initialization is significantly reduced; and pageable portions of the control program nucleus not required for initialization are loaded directly into virtual storage.
EXIT PHASE I IPL i RLDS July 10, 1973 T. L. BRANNON ET AL T912,006
MULTIPHASE NUCLEUS LOADING FOR A VIRTUAL STORAGE SYSTEM Filed July 31, 1972 IPL NIP FIG. I
PRIOR ART Sheets-Sheet 1 LOAD TRANSLATION & SCATTER TABLES BUILD SIZE ADDRESS & RELOCATION FACTOR TABLES REAL STORE RLF TABLE SET PHASE FLAGS IN ADDRESS TABLE HIGH ORDER BYTE OF EACH SIZE TABLE ADDRESS TABLE ENTRY SCATTER TABLE TRANSLATION TABLE IPL AREA mnI/IBIHIA LOAD PHASE I NIP 055073 PREPAGING NIP PHASEI FIG. 3A CSECTS FIG. 3B
July 10, 1973 T. L. BRANNON ET AL T9'l2,006
MULTIPHASE NUCLEUS LOADING FOR A VIRTUAL STORAGE SYSTEM Filed July 31, 1972 SET ADD TABLE FIXED FLAG 7 Sheets-Sheet 2 ENTER SPLI SET ADD TABLE I PAGEABLE FLAG SET FLAGS TO IDENTIFY CSECTS USED ONLY FOR INITIALIZATIDN ASSIGN NEW ADDRESSES T0 GSECTS BY MODIFYING ADDRESS TABLE ENTRIES BASED ON FLAGS AND IPL ASSIGNED ADDRESSES UPDATE ADCDNS IN PHASEI GSEGTS FIXED CSECTS REMAIN MOVE TO HIGH IN LOW REALSTORE REAL STORE L H I PRE PA II IIIE IIIP FIG. 4A
REAL STORE PHASE I PAGEABLE CSECTS *FLAG BYTEFADDRESS BYTES BLE AREA ITIT ADDRESS TA PRE-PAGING NIP PHASE I FIXED GSEGTS FIG. 4B
July 10, 1973 L, BRANNON ET AL T912,006
MULTIPHASE NUCLEUS LOADING FOR A VTR'TUAL S'TORHGL'C SYSTEM Filed July 31, 1972 Sheets-Sheet (I PREPAGING NIP PHASE 2 SPLZ ENTER FROM ENTER FROM SPL I PREPACINC NIP BUILD AND INITIALIZE SYSTEM LOAD AND REBUILD TABLESIFICSB) TABLES AND CONTROL BLOCKS EXCEPT ADDRESS TABLE LOAD PHASEZ CSECTS INTO REAL Em To SPLZ STORE LOCATIONS PREVIOUSLY OCCUPIED BY THE PREPAGINC NIP UPDATE ADCONS IN PHASE 2 CSECTS PHASEI PACEABLE CSECTS EXIT T0 PAGINC INITIALIZATION v NIP NCBA/SOA FlG 6A ADDRESS TABLE PAGINC INITIALIZATION NIP PREPAGING NIP V PHASEI PAGEABLE CSECTS PHASE I FIXED CSECTS NCBA/SQA FIG. 55 ADDRESS TABLE FIG. 6B
July 10, 1973 T. L. BRANNON AL MULTIPHASE NUCLEUS LOADING FOR A VIRTUAL STORAGE SYSTEM Filed July 31, 1972 ENTER PAGING INITIALIZE PAGING SUPERVISOR INITIALIZE SYSTEM EXIT TO PHASE 3 FIG. 7A
VIRTUAL STORE PHASE I PAGEABLE CSECTS REAL STORE PHASE I PAGEABLE CSECTS NCBA/SOA ADDRESS TABLE PAGING INITIALIZATION NIP PHASE 2 FIXED CSECTS PHASE I FIXED CSECTS FIG. 7B
v 7 Sheets-Sheet 4 ENTER PHASE 3 SPL 2 I LOAD PHASE 3 FIXED CSECTS INTO REAL STORE LOCATIONS PREVIOUSLY OCCUPIED BY THE PAGING INITIALIZATION NIP I LOAD PHASE 3 PAGEABLE CSECTS INTO VIRTUAL STORE LOCATIONS DETERMINED BY CORRESPONDING ADDRESS TABLE ENTRIES UPDATE ADCONS m PHASE 5 csecrs TERMINATE INITIALIZATION PROGRAM FIG. 8A
I VIRTUAL STORE PHASE I PAGEABLE CSECTS PHASE 3 PAGEABLE CSECTS REAL STORE PAGEABLE REAL STORAGE NCBA/SOA PHASE 3 FIXED CSECTS PHASE ZFIXED CSECTS PHASE I FIXED CSECTS FIG. 8B
T9l2,006 M ULTIPHASE NUCLEUS LOADING FOR A VIRTUAL STORAGE SYSTEM Filed July 31, 1972 I July 10, 1973 L. BRANNON ET AL 7 Sheets-Sheet 6 wEwwQ N 5:
mommmooma fig 51 N was: 33
fizz MES 55% July 10, 1973 BRANNON ET AL 'T912,006
MULTIPHASE NUCLEUS LOADING FOR A VIRTUAL STORI-GE SYSTEM Filed July 31, 1972 '1 Sheets-Sheet 7 288 EX; W913 883 N was:
3555 Jim H553? mommwuOmm 283 55% bmzhmdw NIH
US912006D 1972-07-31 1972-07-31 Multiphase nucleus loading for a virtual storage system Pending UST912006I4 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US27662172A 1972-07-31 1972-07-31

Publications (1)

Publication Number Publication Date
UST912006I4 true UST912006I4 (en) 1973-07-10

Family

ID=23057413

Family Applications (1)

Application Number Title Priority Date Filing Date
US912006D Pending UST912006I4 (en) 1972-07-31 1972-07-31 Multiphase nucleus loading for a virtual storage system

Country Status (2)

Country Link
US (1) UST912006I4 (en)
CA (1) CA1000413A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6180338A (en) * 1984-09-27 1986-04-23 Fanuc Ltd Loading method of system program
US5155833A (en) * 1987-05-11 1992-10-13 At&T Bell Laboratories Multi-purpose cache memory selectively addressable either as a boot memory or as a cache memory
EP0532643B1 (en) * 1990-06-04 1998-12-23 3Com Corporation Method for optimizing software for any one of a plurality of variant architectures

Also Published As

Publication number Publication date
CA1000413A (en) 1976-11-23

Similar Documents

Publication Publication Date Title
US3902164A (en) Method and means for reducing the amount of address translation in a virtual memory data processing system
NL192144C (en) Information processing facility.
US5317705A (en) Apparatus and method for TLB purge reduction in a multi-level machine system
US3786432A (en) Push-pop memory stack having reach down mode and improved means for processing double-word items
US3854126A (en) Circuit for converting virtual addresses into physical addresses
US4779188A (en) Selective guest system purge control
US5652853A (en) Multi-zone relocation facility computer memory system
GB1184006A (en) Stored Program Electronic Data Processing System
GB1329721A (en) Data processing devices
JPH05233453A (en) Providing device and address conversion method for large scale virtual address space
GB1339285A (en) Digital electric information processing system
US3701107A (en) Computer with probability means to transfer pages from large memory to fast memory
UST912006I4 (en) Multiphase nucleus loading for a virtual storage system
EP0145960A2 (en) Selective guest system purge control
GB1150236A (en) Improvements in Data Processing Systems.
GB1535670A (en) Digital data processing apparatus
GB1430544A (en) Data processing apparatus
JPH0496828A (en) Method and device for multiple absolute address space constitution
US5479631A (en) System for designating real main storage addresses in instructions while dynamic address translation is on
ES397793A1 (en) Computer input-output chaining system
GB1233792A (en)
Welch An investigation of descriptor oriented architecture
GB1532251A (en) Multi-programmed data processor
JPS6339933B2 (en)
JPS6398749A (en) Data processor