GB1532251A - Multi-programmed data processor - Google Patents

Multi-programmed data processor

Info

Publication number
GB1532251A
GB1532251A GB4290175A GB4290175A GB1532251A GB 1532251 A GB1532251 A GB 1532251A GB 4290175 A GB4290175 A GB 4290175A GB 4290175 A GB4290175 A GB 4290175A GB 1532251 A GB1532251 A GB 1532251A
Authority
GB
United Kingdom
Prior art keywords
procedure
descriptors
memory
instruction
descriptor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4290175A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc filed Critical Honeywell Information Systems Italia SpA
Publication of GB1532251A publication Critical patent/GB1532251A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/145—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being virtual, e.g. for virtual blocks or segments before a translation mechanism

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Computer Security & Cryptography (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Storage Device Security (AREA)

Abstract

1532251 Data processing HONEYWELL INFORMATION SYSTEMS Inc 20 Oct 1975 [21 Oct 1974 (2)] 42901/75 Heading G4A A multiprogrammed data processing system transfers from a first procedure to a second procedure, the transfer instruction specifying those program segments to which the second procedure should have access, by safestoring descriptors not accessible to the second procedure, loading an instruction segment register with the address of a required instruction segment and an instruction counter with the number of the next instruction, loading a parameter stack register if parameters are to be passed from the first procedure to the second procedure and adjusting the parameter stack register and an argument stack register to reflect the passage of parameters. The first procedure calls for the second procedure, the safestored descriptors being returned to the appropriate registers on completion of the second procedure. The descriptors define memory locations containing program segments and data files. Each procedure is also limited to assigned working space in a virtual memory of the system, as defined by the respective descriptors. Certain instructions cause, as a result of a call, no descriptors to be safestored, all the descriptors used by the first procedure being used by the second procedure, the second procedure possibly also using additional descriptors. To prevent access to certain portions of memory by the second procedure a "shrink" operation may be carried out on a descriptor so that the base and the size of the memory area as defined by the descriptor are altered so that the memory area defined by the altered description is smaller than the memory area defined by the descriptor prior to the "shrink" operation.
GB4290175A 1974-10-21 1975-10-20 Multi-programmed data processor Expired GB1532251A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US51655874A 1974-10-21 1974-10-21
US51655974A 1974-10-21 1974-10-21

Publications (1)

Publication Number Publication Date
GB1532251A true GB1532251A (en) 1978-11-15

Family

ID=27058889

Family Applications (1)

Application Number Title Priority Date Filing Date
GB4290175A Expired GB1532251A (en) 1974-10-21 1975-10-20 Multi-programmed data processor

Country Status (5)

Country Link
JP (1) JPS6042495B2 (en)
AU (1) AU506710B2 (en)
DE (1) DE2546354A1 (en)
FR (1) FR2289005A1 (en)
GB (1) GB1532251A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0040702A2 (en) * 1980-05-23 1981-12-02 International Business Machines Corporation Authorization mechanism for transfer of program control or data between different address spaces having different storage protect keys

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4041462A (en) * 1976-04-30 1977-08-09 International Business Machines Corporation Data processing system featuring subroutine linkage operations using hardware controlled stacks
US4079453A (en) * 1976-08-20 1978-03-14 Honeywell Information Systems Inc. Method and apparatus to test address formulation in an advanced computer system
US4218743A (en) * 1978-07-17 1980-08-19 International Business Machines Corporation Address translation apparatus
US4454580A (en) * 1981-09-16 1984-06-12 International Business Machines Corporation Program call method and call instruction execution apparatus

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS447524Y1 (en) * 1965-10-23 1969-03-22
JPS4511372Y1 (en) * 1967-05-24 1970-05-21
JPS528337Y2 (en) * 1973-05-18 1977-02-22
GB1498116A (en) * 1974-04-18 1978-01-18 Honeywell Inf Systems Data processing systems

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0040702A2 (en) * 1980-05-23 1981-12-02 International Business Machines Corporation Authorization mechanism for transfer of program control or data between different address spaces having different storage protect keys
EP0040702A3 (en) * 1980-05-23 1982-01-13 International Business Machines Corporation Authorization mechanism for transfer of program control or data between different address spaces having different storage protect keys

Also Published As

Publication number Publication date
FR2289005A1 (en) 1976-05-21
AU8566175A (en) 1977-04-21
JPS6042495B2 (en) 1985-09-24
AU506710B2 (en) 1980-01-24
FR2289005B1 (en) 1980-02-15
JPS5165534A (en) 1976-06-07
DE2546354A1 (en) 1976-04-22

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee