USB444437I5 - - Google Patents

Info

Publication number
USB444437I5
USB444437I5 US44443774A USB444437I5 US B444437 I5 USB444437 I5 US B444437I5 US 44443774 A US44443774 A US 44443774A US B444437 I5 USB444437 I5 US B444437I5
Authority
US
United States
Prior art keywords
source
pulses
bit line
capacitive load
discharge path
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to GB2372273A priority Critical patent/GB1375958A/en
Priority to FR7320855*A priority patent/FR2191365B1/fr
Priority to SE7307377A priority patent/SE388063B/xx
Priority to CA172,499A priority patent/CA1007371A/en
Priority to CH834073A priority patent/CH549905A/xx
Priority to DE19732331442 priority patent/DE2331442C3/de
Priority to NL7308696A priority patent/NL167788C/xx
Priority to AU57564/73A priority patent/AU468399B2/en
Application filed filed Critical
Priority to US05/444,437 priority patent/US3995171A/en
Publication of USB444437I5 publication Critical patent/USB444437I5/en
Application granted granted Critical
Publication of US3995171A publication Critical patent/US3995171A/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096Synchronous circuits, i.e. using clock signals
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/08Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/017Modifications for accelerating switching in field-effect transistor circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/017Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01728Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals
    • H03K19/01735Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals by bootstrapping, i.e. by positive feed-back
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/0185Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507Interface arrangements
    • H03K19/01855Interface arrangements synchronous, i.e. using clock signals
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Read Only Memory (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
US05/444,437 1972-06-29 1974-02-21 Decoder driver circuit for monolithic memories Expired - Lifetime US3995171A (en)

Priority Applications (9)

Application Number Priority Date Filing Date Title
GB2372273A GB1375958A (en) 1972-06-29 1973-05-18 Pulse circuit
SE7307377A SE388063B (sv) 1972-06-29 1973-05-25 Avkodardrivkrets for monolitminnen
FR7320855*A FR2191365B1 (en, 2012) 1972-06-29 1973-05-25
CA172,499A CA1007371A (en) 1972-06-29 1973-05-28 Decoder driver circuit for monolithic memories
CH834073A CH549905A (de) 1972-06-29 1973-06-08 Schaltungsanordnung zur gesteuerten speisung einer kapazitiven last.
DE19732331442 DE2331442C3 (de) 1972-06-29 1973-06-20 Treiberschaltung für eine kapazitive Last
NL7308696A NL167788C (nl) 1972-06-29 1973-06-22 Drijverketen bevattende een veldeffecttransistor.
AU57564/73A AU468399B2 (en) 1972-06-29 1973-06-29 Pulse circuit
US05/444,437 US3995171A (en) 1972-06-29 1974-02-21 Decoder driver circuit for monolithic memories

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US26730272A 1972-06-29 1972-06-29
US05/444,437 US3995171A (en) 1972-06-29 1974-02-21 Decoder driver circuit for monolithic memories

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US26730272A Continuation 1972-06-29 1972-06-29

Publications (2)

Publication Number Publication Date
USB444437I5 true USB444437I5 (en, 2012) 1976-03-09
US3995171A US3995171A (en) 1976-11-30

Family

ID=26952351

Family Applications (1)

Application Number Title Priority Date Filing Date
US05/444,437 Expired - Lifetime US3995171A (en) 1972-06-29 1974-02-21 Decoder driver circuit for monolithic memories

Country Status (8)

Country Link
US (1) US3995171A (en, 2012)
AU (1) AU468399B2 (en, 2012)
CA (1) CA1007371A (en, 2012)
CH (1) CH549905A (en, 2012)
FR (1) FR2191365B1 (en, 2012)
GB (1) GB1375958A (en, 2012)
NL (1) NL167788C (en, 2012)
SE (1) SE388063B (en, 2012)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4042838A (en) * 1976-07-28 1977-08-16 Rockwell International Corporation MOS inverting power driver circuit
DE2641693C2 (de) * 1976-09-16 1978-11-16 Siemens Ag, 1000 Berlin Und 8000 Muenchen Decodierschaltung mit MOS-Transistoren
NL7704005A (nl) * 1977-04-13 1977-06-30 Philips Nv Geintegreerde schakeling.
JPS5484936A (en) * 1977-12-20 1979-07-06 Fujitsu Ltd Decoder circuit
US4354123A (en) * 1979-08-13 1982-10-12 Mostek Corporation High voltage clock generator
JPS56122526A (en) * 1980-03-03 1981-09-26 Fujitsu Ltd Semiconductor integrated circuit
US4570244A (en) * 1980-07-28 1986-02-11 Inmos Corporation Bootstrap driver for a static RAM
US4500799A (en) * 1980-07-28 1985-02-19 Inmos Corporation Bootstrap driver circuits for an MOS memory
EP0057025B1 (en) * 1981-01-22 1985-09-11 Koninklijke Philips Electronics N.V. Switching circuit
US4491748A (en) * 1981-04-16 1985-01-01 International Business Machines Corporation High performance FET driver circuit
US4514829A (en) * 1982-12-30 1985-04-30 International Business Machines Corporation Word line decoder and driver circuits for high density semiconductor memory
US4782247A (en) * 1984-08-08 1988-11-01 Fujitsu Limited Decoder circuit having a variable power supply
FR2591789B1 (fr) * 1985-12-17 1988-02-19 Labo Electronique Physique Circuit decodeur pour memoire ram statique
US4963765A (en) * 1989-07-03 1990-10-16 Texas Instruments Incorporated High speed CMOS transition detector circuit
US5160860A (en) * 1991-09-16 1992-11-03 Advanced Micro Devices, Inc. Input transition responsive CMOS self-boost circuit
GB9414928D0 (en) * 1994-07-25 1994-09-14 Inmos Ltd Off-chip driver circuit
GB9419689D0 (en) * 1994-09-29 1994-11-16 Inmos Ltd Off-chip driver circuit
JP3190233B2 (ja) * 1995-08-22 2001-07-23 株式会社東芝 出力バッファ回路
US5764077A (en) * 1996-02-05 1998-06-09 Texas Instruments Incorporated 5 volt tolerant I/O buffer circuit

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3564290A (en) * 1969-03-13 1971-02-16 Ibm Regenerative fet source follower
US3567968A (en) * 1967-02-27 1971-03-02 North American Rockwell Gating system for reducing the effects of positive feedback noise in multiphase gating devices
US3579275A (en) * 1969-01-07 1971-05-18 North American Rockwell Isolation circuit for gating devices
US3629618A (en) * 1970-08-27 1971-12-21 North American Rockwell Field effect transistor single-phase clock signal generator
US3665473A (en) * 1970-12-18 1972-05-23 North American Rockwell Address decode logic for a semiconductor memory
US3702926A (en) * 1970-09-30 1972-11-14 Ibm Fet decode circuit
US3758761A (en) * 1971-08-17 1973-09-11 Texas Instruments Inc Self-interconnecting/self-repairable electronic systems on a slice
US3798616A (en) * 1972-04-14 1974-03-19 North American Rockwell Strobe driver including a memory circuit
US3801964A (en) * 1972-02-24 1974-04-02 Advanced Memory Sys Inc Semiconductor memory with address decoding

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3567968A (en) * 1967-02-27 1971-03-02 North American Rockwell Gating system for reducing the effects of positive feedback noise in multiphase gating devices
US3579275A (en) * 1969-01-07 1971-05-18 North American Rockwell Isolation circuit for gating devices
US3564290A (en) * 1969-03-13 1971-02-16 Ibm Regenerative fet source follower
US3629618A (en) * 1970-08-27 1971-12-21 North American Rockwell Field effect transistor single-phase clock signal generator
US3702926A (en) * 1970-09-30 1972-11-14 Ibm Fet decode circuit
US3665473A (en) * 1970-12-18 1972-05-23 North American Rockwell Address decode logic for a semiconductor memory
US3758761A (en) * 1971-08-17 1973-09-11 Texas Instruments Inc Self-interconnecting/self-repairable electronic systems on a slice
US3801964A (en) * 1972-02-24 1974-04-02 Advanced Memory Sys Inc Semiconductor memory with address decoding
US3798616A (en) * 1972-04-14 1974-03-19 North American Rockwell Strobe driver including a memory circuit

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
DeSimone "Low-Power Mosfet Decoder," IBM Tech. Discl. Bull.; vol. 13, No. 1, pp. 260-261; 6/1970. *
Hsieh et al., "Mosfet Storage Array Addressing System," IBM Tech. Discl. Bull.; vol. 13, No. 8; pp. 2383-2384; 1/1971. *
Linton et al.; "FET Decoder Circuit;" IBM Tech. Discl. Bull.; vol. 12, No. 12, p. 2082; 5/1970. *

Also Published As

Publication number Publication date
FR2191365A1 (en, 2012) 1974-02-01
AU468399B2 (en) 1976-01-08
SE388063B (sv) 1976-09-20
CH549905A (de) 1974-05-31
NL167788B (nl) 1981-08-17
DE2331442A1 (de) 1974-01-17
DE2331442B2 (de) 1975-07-24
CA1007371A (en) 1977-03-22
NL7308696A (en, 2012) 1974-01-02
NL167788C (nl) 1982-01-18
FR2191365B1 (en, 2012) 1976-05-28
AU5756473A (en) 1975-01-09
US3995171A (en) 1976-11-30
GB1375958A (en) 1974-12-04

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