US9485859B1 - Flexible circuit board and method for manufacturing same - Google Patents
Flexible circuit board and method for manufacturing same Download PDFInfo
- Publication number
- US9485859B1 US9485859B1 US14/859,857 US201514859857A US9485859B1 US 9485859 B1 US9485859 B1 US 9485859B1 US 201514859857 A US201514859857 A US 201514859857A US 9485859 B1 US9485859 B1 US 9485859B1
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- copper foil
- signal line
- linear signal
- outer copper
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- 238000000034 method Methods 0.000 title claims abstract description 25
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 165
- 239000011889 copper foil Substances 0.000 claims description 83
- 229910052802 copper Inorganic materials 0.000 claims description 27
- 239000010949 copper Substances 0.000 claims description 27
- 229910000679 solder Inorganic materials 0.000 claims description 20
- 238000005530 etching Methods 0.000 claims description 3
- 238000009713 electroplating Methods 0.000 claims description 2
- 230000008878 coupling Effects 0.000 claims 2
- 238000010168 coupling process Methods 0.000 claims 2
- 238000005859 coupling reaction Methods 0.000 claims 2
- 238000010030 laminating Methods 0.000 claims 1
- 239000004642 Polyimide Substances 0.000 description 6
- 229920001721 polyimide Polymers 0.000 description 6
- 239000004020 conductor Substances 0.000 description 4
- 238000007639 printing Methods 0.000 description 4
- 238000007790 scraping Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 2
- 239000011796 hollow space material Substances 0.000 description 2
- 229920000106 Liquid crystal polymer Polymers 0.000 description 1
- 239000004977 Liquid-crystal polymers (LCPs) Substances 0.000 description 1
- 239000004809 Teflon Substances 0.000 description 1
- 229920006362 Teflon® Polymers 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000608 laser ablation Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000004260 weight control Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
- H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P11/00—Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type
- H01P11/001—Manufacturing waveguides or transmission lines of the waveguide type
- H01P11/003—Manufacturing lines with conductors on a substrate, e.g. strip lines, slot lines
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P3/00—Waveguides; Transmission lines of the waveguide type
- H01P3/003—Coplanar lines
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P3/00—Waveguides; Transmission lines of the waveguide type
- H01P3/02—Waveguides; Transmission lines of the waveguide type with two longitudinal conductors
- H01P3/08—Microstrips; Strip lines
- H01P3/085—Triplate lines
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/024—Dielectric details, e.g. changing the dielectric material around a transmission line
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/188—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by direct electroplating
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4635—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating flexible circuit boards using additional insulating adhesive materials between the boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/189—Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0154—Polyimide
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0355—Metal foils
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/05—Flexible printed circuits [FPCs]
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/07—Electric details
- H05K2201/0707—Shielding
- H05K2201/0715—Shielding provided by an outer layer of PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09618—Via fence, i.e. one-dimensional array of vias
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09809—Coaxial layout
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4697—Manufacturing multilayer circuits having cavities, e.g. for mounting components
Definitions
- the subject matter herein generally relates to printed circuit boards, and particularly to a flexible circuit board and a method for manufacturing the flexible circuit board.
- flexible circuit boards are light, soft, thin, small, ductile, flexible, and supporting high wiring density.
- Flexible circuit boards can be three-dimensionally wired and shaped according to space limitations. Flexible circuits are generally useful for electronic packages where flexibility, weight control and the like are important.
- FIG. 1 is cross sectional view of a flexible circuit board in accordance with an embodiment of the present disclosure.
- FIG. 2 is an exploded, isometric view the flexible circuit board in FIG. 1 .
- FIG. 3 is a flowchart of a method for manufacturing the flexible circuit board in FIG. 1 .
- FIG. 4 is a cross sectional view of a first copper clad laminate before a circuit layer being formed.
- FIG. 5 is a cross sectional view of the copper clad laminate in FIG. 4 with the circuit layer formed.
- FIG. 6 is a cross sectional view of a bonding layer.
- FIG. 7 is a cross sectional view of a second copper clad laminate.
- FIG. 8 is a diagrammatic view showing a bonding structure of the in first copper clad laminate in FIG. 5 , the bonding layer in FIG. 6 and the second copper clad laminate in FIG. 7 .
- FIG. 9 is a diagrammatic view showing the boding structure in FIG. 8 with a plurality of conductive holes.
- FIG. 10 is a diagrammatic view showing the bonding structure in FIG. 9 with a first grid area and a second grid area.
- the present disclosure is described in relation to a flexible circuit board.
- the flexible circuit board can include a first base layer, a circuit layer, a second base layer and a bonding layer.
- the circuit layer is coupled to a side of the first base layer and includes a linear signal line, two grounding lines located at two opposite sides of the linear signal line, and two hollow areas located between the linear signal line and the grounding lines.
- the bonding layer couples the second base layer to the circuit layer and defines a first opening corresponding to the linear signal line and communicating with the hollow areas of the circuit layer. The first opening of the bonding layer and the hollow areas of the circuit layer cooperatively define an air medium layer surrounding the linear signal line.
- a first copper clad laminate is provided.
- the first copper clad laminate includes a first base layer, a copper foil and a first outer copper foil located at two opposite sides of the first base layer.
- a circuit layer is formed from the copper foil to comprise a linear signal line, two grounding lines located at two opposite sides of the linear signal line, and two hollow areas located between the linear signal line and the grounding lines.
- a bonding layer with a first opening is provided.
- a second copper clad laminate is provided and includes a second base layer and a second outer copper foil coupled to a side of the second base layer. The bonding layer and the second copper clad laminate are laminated on the circuit layer. The first opening of the bonding layer and the hollow areas of the circuit layer cooperatively define an air medium layer surrounding the linear signal line.
- FIG. 1 illustrates a flexible circuit board 100 of an embodiment of the present disclosure.
- the flexible circuit board 100 can include a first base layer 11 , a circuit layer 14 coupled to a side of the first base layer 11 , a first outer copper foil 13 coupled to an opposite side of the first base layer 11 , a bonding layer 20 coupled to the circuit layer 14 , a second base layer 31 coupled to the bonding layer 20 , a second copper foil 32 coupled to the second base layer 31 , a first solder resist layer 51 coupled to the first outer copper foil 13 , and a second solder resist layer 52 coupled to the second outer copper foil 32 .
- the first base layer 11 can be flexible and provides support to the flexible circuit board 100 .
- the first base layer 11 can be polyimide (PI).
- the first outer copper foil 13 and the circuit layer 14 are located at two opposite sides of the first base layer 11 .
- the first outer copper foil 13 can include a first grid area 131 .
- the circuit layer 14 can include at least a linear signal line 141 , at least two grounding lines 142 and at least two hollow areas 143 .
- the circuit layer 14 includes one linear signal line 141 , two grounding lines 142 and two hollow areas 143 .
- the linear signal line 141 is located at a center portion of the circuit layer 14 .
- the linear signal line 141 can be in directly physical contact with the first base layer 11 .
- the two grounding lines 142 are located at two opposite sides of the linear signal line 141 .
- the two hollow areas 143 are located at two opposite sides of the linear signal line 141 and between the two grounding lines 142 .
- the linear signal line 141 and the grounding lines 142 have the same extension directions.
- the linear signal line 141 can be electrically independent from the two grounding lines 142 .
- the linear signal line 141 is configured to transmit signals.
- the two grounding lines 142 can be parallel to each other. In at least one embodiment, the two grounding lines 142 can be symmetric to each other about the linear signal line 141 .
- Each hollow area 143 is located between the linear signal line 141 and a corresponding grounding line 142 .
- the two hollow areas 143 separate the linear signal line 141 apart from the two grounding lines 142 .
- the two hollow areas 143 can be symmetric to each other about the linear signal line 141 .
- the first base layer 11 is exposed via the hollow areas 143 .
- FIG. 2 illustrates that the circuit layer 14 can further include two connecting parts 144 configured to be coupled to external electronic components.
- the two connecting parts 144 are located at two opposite ends of the circuit layer 14 .
- the linear signal line 141 , the grounding lines 142 and the hollow areas 143 are located between the two connecting parts 144 .
- the linear signal line 141 , the grounding lines 142 and the hollow areas 143 each extend from one connecting part 144 to the other connecting part 144 .
- the first grid area 131 of the first outer copper foil 13 is corresponding to the linear signal line 141 and the two hollow areas 143 .
- the circuit layer 14 can include a plurality of linear signal lines 141 , two grounding lines 142 and a plurality of hollow areas 143 .
- the plurality of linear signal lines 141 are located between the two grounding lines 142 .
- Two of the plurality of hollow area 143 are defined between every two adjacent linear signal line 142 and grounding line 142
- the other hollow areas 143 are defined between every two adjacent linear signal lines 142 .
- Extension directions of the linear signal line 141 , the grounding lines 142 and the hollow areas 143 are same to each other.
- the linear signal lines 141 , the grounding lines 142 and the hollow areas 143 each extend from one connecting part 144 to the other connecting part 144 .
- the circuit layer 14 can include a plurality of linear signal lines 141 , and a plurality of grounding lines 142 and a plurality of hollow areas 143 .
- the linear signal lines 141 are alternately arranged with the grounding lines 142 .
- Each hollow area 143 is defined between every two adjacent linear signal line 142 and grounding line 142 . Extension directions of the linear signal line 141 , the grounding lines 142 and the hollow areas 143 are same to each other.
- the linear signal lines 141 , the grounding lines 142 and the hollow areas 143 each extend from one connecting part 144 to the other connecting part 144 .
- the bonding layer 20 is coupled between the circuit layer 14 and the second base layer 31 .
- the bonding layer 20 only contacts the grounding lines 142 of the circuit layer 14 , and is spaced from the linear signal line 141 of the circuit layer 14 .
- the bonding layer 20 can define a first opening 21 and two second openings 22 .
- the first opening 21 has nothing therein.
- the second openings 22 have nothing therein.
- the first opening 21 is defined in a central portion of the bonding layer 20 corresponding to the linear signal line 141 of the circuit layer 14 .
- the first opening 21 is communicating with the hollow areas 143 of the circuit layer 14 .
- the first opening 21 and the two hollow areas 143 of the circuit layer 14 cooperatively define an air medium layer 41 surrounding the linear signal line 141 on the first base layer 11 .
- the air medium layer 41 is enclosed by the first base layer 11 , the grounding lines 142 of the circuit layer 14 , the bonding layer 20 and the second base layer 31 .
- the first openings 21 are corresponding to the linear signal line 141 and the two hollow areas 143 at two sides of the linear signal line 141 .
- the first opening 21 has a size no less than a size of the linear signal line 141 .
- the first opening 21 has a width larger than a width of the linear signal line 221 .
- the first opening 21 can have a width substantially larger than a total width of the linear signal line 141 and the two hollow areas 143 .
- the linear signal line 141 is spaced from the bonding layer 20 via the first opening 21 .
- the linear signal line 141 is spaced from grounding lines 141 , the bonding layer 20 and the second base layer 31 and surrounded by the air medium layer 41 .
- a dielectric constant of the air medium layer is 1.0 farad/meter, which is less than a dielectric constant of Teflon or liquid crystal polymer, so that, after signals are transmitted by the linear signal line 141 , loss of the signals is reduced.
- the second openings 22 are corresponding to the two connecting parts 144 respectively. Each of the two connecting parts 144 is exposed via a corresponding second opening 22 .
- the second base layer 31 is coupled on the bonding layer 20 .
- the second outer copper foil 32 is located at a side of the second base layer 31 opposite to bonding layer 20 .
- the first base layer 11 , the circuit layer 14 , the bonding layer 20 and the second base layer 31 are located between the first outer copper foil 13 and the second outer copper foil 32 .
- the second base layer 31 and the second outer copper foil 32 define two through windows 33 corresponding to the second openings 22 and the connecting parts 144 .
- Each of the two connecting parts 144 is exposed via the corresponding second opening 22 and a corresponding through window 33 .
- the second outer copper foil 32 includes a second grid area 321 corresponding to the linear signal line 141 and the two hollow areas 143 .
- the first solder resist layer 51 is coupled to an outer face of the first outer copper foil 13 .
- the first solder resist layer 51 covers the outer face of the first outer copper foil 13 and is configured to prevent the first outer copper foil 13 from moisture or foreign body scraping.
- the first solder resist layer 51 can be a coverlay or printing ink.
- the second solder resist layer 52 is coupled to an outer face of the second outer copper foil 32 .
- the second solder resist layer 52 covers the outer face of the second outer copper foil 32 and is configured to prevent the second outer copper foil 32 from moisture or foreign body scraping.
- the second solder resist layer 52 can be a coverlay or printing ink.
- the second solder resist layer 52 defines two slots 521 corresponding to the windows 33 , the second openings 22 and the connecting parts 144 . Each of the two connecting parts 144 is exposed via the corresponding second opening 22 , the corresponding through window 33 and a corresponding slot 521 .
- the first outer copper foil 13 , the first base layer 11 , the circuit layer 14 , the bonding layer 20 , the second base layer 31 and the second outer copper foil 32 are located between the first solder resist layer 51 and the second solder resist layer 52 .
- the flexible circuit board 100 further includes a plurality of conductive holes 42 .
- the conductive holes 42 electrically connect the first outer copper foil 13 , the second outer copper foil 32 and the grounding lines 142 of the circuit layer 14 .
- the plurality of conductive holes 42 can be through holes or blind holes.
- Each of the conductive holes 42 is filled with electric conductive material electrically coupled to the first outer copper foil 13 , the second outer copper foil 32 and the grounding lines 142 .
- the conductive holes 42 extend through the first outer copper foil 13 , the first base layer 11 , the grounding lines 142 , the second base layer 31 and the second outer copper foil 13 .
- the plurality of conductive holes 42 are located at two rows corresponding to the two grounding lines 142 respectively. In each row, the conductive holes 42 can evenly and spaced extend through a corresponding grounding line 142 .
- Each of the conductive holes 4 can include a hollow space surrounded by the conductive material.
- the conductive holes 42 are defined in the grounding lines 142 at two opposite sides of the linear signal line 141 and electrically connecting the grounding line 142 , the first outer copper foil 13 and the second outer copper foil 32 .
- the grounding lines 142 , the first outer copper foil 13 and the second outer copper foil 32 cooperative form an electromagnetic shielding structure around the linear signal line 141 via connection of the conductive holes 42 .
- the electromagnetic shielding structure is configured to protect the signals transmitted by the linear signal line 141 from electromagnetic interference.
- FIG. 3 illustrates a flowchart of an example method for manufacturing the flexible circuit board 100 .
- the example method is provided by way of example, as there are a variety of ways to carry out the method. The example method described below can be carried out using the configurations illustrated in FIGS. 1, 2 and 4-10 , for example, and various elements of these figures are referenced in explaining the example method.
- Each block shown in FIG. 3 represents one or more processes, methods or subroutines, carried out in the example method.
- the illustrated order of blocks is illustrative only and the order of the blocks can change according to the present disclosure. Additional blocks can be added or fewer blocks may be utilized, without departing from this disclosure.
- the example method can begin at block 301 .
- the first copper clad laminate 10 can be a two-sided flexible copper foil laminate (FCCL).
- the first copper clad laminate 10 includes a base layer 11 , a copper foil 12 and a first outer copper foil 13 coupled to two opposite sides of the first base layer 11 .
- the first base layer 11 is located between the copper foil 12 and the first outer copper foil 13 .
- the first base layer 11 can be polyimide (PI).
- PI polyimide
- a circuit layer 14 is formed from the copper foil 12 .
- the circuit layer 14 is formed by electroplating, etching, punching or cutting. In at least one embodiment, the circuit layer 14 is formed by etching the first copper coil 12 .
- FIG. 2 illustrates that the circuit layer 14 can include at least a linear signal line 141 , at least two grounding lines 142 and at least two hollow areas 143 .
- the circuit layer 14 includes one linear signal line 141 , two grounding lines 142 and two hollow areas 143 .
- the linear signal line 141 is located at a center portion of the circuit layer 14 .
- the two grounding lines 142 are located at two opposite sides of the linear signal line 141 .
- the two hollow areas 143 are located at two opposite sides of the linear signal line 141 and between the two grounding lines 142 .
- the linear signal line 141 and the grounding lines 142 have the same extension directions.
- the linear signal line 141 can be electrically independent from two grounding lines 142 .
- the linear signal line 141 is configured to transmit signals.
- the two grounding lines 142 can be parallel to each other. In at least one embodiment, the two grounding lines 142 can be symmetric to each other about the linear signal line 141 .
- Each hollow area 143 is located between the linear signal line 141 and a corresponding grounding line 142 .
- the two hollow areas 143 separate the linear signal line 141 apart from the two grounding lines 142 .
- the two hollow areas 143 can be symmetric to each other about the linear signal line 141 .
- the first base layer 11 is exposed via the hollow areas 143 .
- the circuit layer 14 can further include two connecting parts 144 configured to be coupled to external electronic components.
- the two connecting parts 144 are located at two opposite ends of the circuit layer 14 .
- the linear signal line 141 , the grounding lines 142 and the hollow areas 143 are located between the two connecting parts 144 .
- the linear signal line 141 , the grounding lines 142 and the hollow areas 143 each extend from one connecting part 144 to the other connecting part 144 .
- the first grid area 131 of the first outer copper foil 13 is corresponding to the linear signal line 141 and the two hollow areas 143 .
- the circuit layer 14 can include a plurality of linear signal lines 141 , two grounding lines 142 and a plurality of hollow areas 143 .
- the plurality of linear signal lines 141 are located between the two grounding lines 142 .
- Two of the plurality of hollow area 143 are defined between every two adjacent linear signal line 142 and grounding line 142
- the other hollow areas 143 are defined between every two adjacent linear signal lines 142 .
- Extension directions of the linear signal line 141 , the grounding lines 142 and the hollow areas 143 are same to each other.
- the linear signal lines 141 , the grounding lines 142 and the hollow areas 143 each extend from one connecting part 144 to the other connecting part 144 .
- the circuit layer 14 can include a plurality of linear signal lines 141 , and a plurality of grounding lines 142 and a plurality of hollow areas 143 .
- the linear signal lines 141 are alternately arranged with the grounding lines 142 .
- Each hollow area 143 is defined between every two adjacent linear signal line 142 and grounding line 142 . Extension directions of the linear signal line 141 , the grounding lines 142 and the hollow areas 143 are same to each other.
- the linear signal lines 141 , the grounding lines 142 and the hollow areas 143 each extend from one connecting part 144 to the other connecting part 144 .
- a bonding layer 20 defining a first opening 21 is provided.
- the first opening 21 has no adhesive therein.
- the bonding layer 20 is punched to form the first opening 21 .
- the first opening 21 is corresponding to the linear signal line 141 and the hollow areas 143 of the circuit layer 14 .
- FIG. 2 illustrates that the bonding layer 20 further defines two second openings 22 corresponding to the two connecting parts 144 respectively. Each of the two connecting parts 144 is exposed via a corresponding second opening 22 .
- a second copper clad laminate 30 is provided.
- the second copper clad laminate 30 can be a single-sided flexible copper foil laminate (FCCL).
- the second copper clad laminate 30 includes a second base layer 31 and a second outer copper foil 32 coupled to a side of the second base layer 31 .
- the second base layer 11 can be polyimide (PI).
- FIG. 2 illustrates that the second copper clad laminate 30 defines two through windows 33 extending through the second base layer 31 and the second outer copper foil 32 .
- the bonding layers 20 and the second copper clad laminate 30 are laminated on the circuit layer 14 .
- the bonding layers 20 and the second copper clad laminate 30 , and the first copper clad laminate 10 with the circuit layer 14 are bonded together to form a laminated base 40 .
- the bonding layer 20 is adhered to the circuit layer 14 .
- the windows 33 , the second openings 22 and the connecting parts 144 are corresponding to each other. Each of the two connecting parts 144 is exposed via the corresponding second opening 22 and a corresponding through window 33 .
- the first opening 21 is corresponding to the linear signal line 141 and the hollow areas 143 .
- the bonding layer 20 is spaced from the linear signal line 141 of the circuit layer 14 by the first opening 21 .
- the first opening 21 is communicating with the hollow areas 143 of the circuit layer 14 .
- the first opening 21 and the two hollow areas 143 of the circuit layer 14 cooperatively define an air medium layer 41 surrounding the linear signal line 141 on the first base layer 11 .
- the air medium layer 41 is enclosed by the first base layer 11 , the grounding lines 142 of the circuit layer 14 , the bonding layer 20 and the second base layer 31 .
- the first opening 21 can have a width substantially larger than a total width of the linear signal line 141 and the two hollow areas 143 .
- a plurality of conductive holes 42 are formed in the laminated base 40 to electrically connect the first outer copper foil 13 , the second outer copper foil 32 and the grounding lines 142 of the circuit layer 14 .
- the conductive holes 42 can be formed by method of follows.
- the first outer copper foil 13 , the first base layer 11 , the circuit layer 14 , the bonding layer 20 , the second base layer 31 and the second outer copper foil 32 defines a plurality of the through holes or blind holes by laser ablation or mechanical drilling.
- Each of the through holes or blind holes are filled with conductive material.
- Each of the conductive holes 42 can include a hollow space surrounded by the conductive material.
- FIG. 2 illustrates that, the plurality of conductive holes 42 are located at two rows corresponding to the two grounding lines 142 respectively. In each row, the conductive holes 42 can evenly and spaced extend through a corresponding grounding line 142 .
- the first outer copper foil 13 forms a first grid area 131 corresponding to the linear signal line 141 and the hollow areas 143 of the circuit layer 14 .
- the second outer copper foil 32 forms a second grid area 321 corresponding to the linear signal line 141 and the hollow areas 143 of the circuit layer 14 .
- the first outer copper foil 13 and the second outer copper foil 32 are etched to form the first grid area 131 and the second grid area 321 . Density degrees of the first grid area 131 and second grid area 321 can be set according to signal frequency of signals transmitted by the linear signal line 141 , to enhance electromagnetic shielding effect.
- only one or neither of the first outer copper foil 13 and the second outer copper foil 32 forms the grid area.
- a first resist layer 51 is coupled to an outer face of the first outer copper foil 13 .
- a second solder resist layer 52 is coupled to an outer face of the second outer copper foil 32 .
- the first solder resist layer 51 covers the outer face of the first outer copper foil 13 and is configured to prevent the first outer copper foil 13 from moisture or foreign body scraping.
- the first solder resist layer 51 can be a coverlay or printing ink.
- the second solder resist layer 52 covers the outer face of the second outer copper foil 32 and is configured to prevent the second outer copper foil 32 from moisture or foreign body scraping.
- the second solder resist layer 52 can be a coverlay or printing ink.
- the second solder resist layer 52 defines two through slots 521 corresponding to the windows 33 , the second openings 22 and the connecting parts 144 . Each of the two connecting parts 144 is exposed via the corresponding second opening 22 , the corresponding through window 33 and a corresponding slot 521 .
Abstract
Description
Claims (20)
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CN201510535138 | 2015-08-27 | ||
CN201510535138.6A CN106488642A (en) | 2015-08-27 | 2015-08-27 | Flexible circuit board and preparation method thereof |
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US9485859B1 true US9485859B1 (en) | 2016-11-01 |
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US14/859,857 Active US9485859B1 (en) | 2015-08-27 | 2015-09-21 | Flexible circuit board and method for manufacturing same |
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CN (1) | CN106488642A (en) |
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WO2019139939A1 (en) * | 2018-01-09 | 2019-07-18 | Eight Sleep, Inc. | Systems and methods for detecting a biological signal of a user of an article of furniture |
US10575406B1 (en) * | 2018-08-23 | 2020-02-25 | Avary Holding (Shenzhen) Co., Limited. | Method of making flexible circuit board |
WO2021118301A1 (en) * | 2019-12-11 | 2021-06-17 | Samsung Electronics Co., Ltd. | Printed circuit board and electronic device including the same |
US11197368B1 (en) * | 2020-06-03 | 2021-12-07 | Avary Holding (Shenzhen) Co., Limited | High-frequency circuit board and method for manufacturing the same |
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TW201711536A (en) | 2017-03-16 |
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