US8243564B2 - Misjudgment correction circuit and optical disk drive - Google Patents

Misjudgment correction circuit and optical disk drive Download PDF

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US8243564B2
US8243564B2 US12/385,381 US38538109A US8243564B2 US 8243564 B2 US8243564 B2 US 8243564B2 US 38538109 A US38538109 A US 38538109A US 8243564 B2 US8243564 B2 US 8243564B2
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signal
push
pull
time period
low
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US20090279396A1 (en
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Shinya Nouchi
Kimimasa Senba
Kenichi Ishida
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Sony Corp
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Sony Corp
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B7/00—Recording or reproducing by optical means, e.g. recording using a thermal beam of optical radiation by modifying optical properties or the physical structure, reproducing using an optical beam at lower power by sensing optical properties; Record carriers therefor
    • G11B7/004—Recording, reproducing or erasing methods; Read, write or erase circuits therefor
    • G11B7/005—Reproducing
    • G11B7/0053—Reproducing non-user data, e.g. wobbled address, prepits, BCA

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  • the present invention relates to a misjudgment correction circuit and optical disk drive.
  • a wobble signal called wobble is recorded in advance on the grooves which serve as tracks to indicate the disk position and other information.
  • CD-R/RWs use 22.05 kHz as their basic frequency of the wobble signal. This frequency is sufficiently lower than the basic clock frequency of an RF signal to be recorded which is 4.3218 MHz.
  • DVD-RWs use 818 kHz as their frequency band of the wobble signal. This frequency band is close to the basic clock frequency of the RF signal which is 26.16 MHz.
  • One known method detects wobbles on an optical disk by calculating a push-pull signal component (A+D) ⁇ (B+C).
  • the signals A, B, C and D originate from four separate photoreceiving sections of a PD (photodetector).
  • Position information for recording and reproduction can be obtained by converting the detected wobble signal into address information with an address decoder.
  • an unrecorded area with no recorded RF signal contains almost no noise. Therefore, even in the presence of a difference in gain between channels (A+D) and (B+C), this gain difference will only turn into an offset. As a result, this will not cause any problem with the detection of a wobble signal.
  • an AGC (Automatic Gain Control) circuit is disclosed in Japanese Patent Laid-Open Publication No. 2005-353195.
  • the AGC circuit is designed to strike a balance in push-pull signal gain between different channels.
  • the circuit includes two variable gain amplifiers configured to amplify the signals (A+D) and (B+C) from two separate photoreceiving elements with arbitrary gains.
  • the circuit further includes two detectors configured to detect the output signals from the variable gain amplifiers.
  • the circuit still further includes a comparator configured to compare the detection outputs and gain control means for controlling the gains of the variable gain amplifiers based on the comparison output from the comparator.
  • the prior art uses an AGC loop to ensure that the amplitudes of the signals (A+D) and (B+C) agree with each other.
  • an AGC circuit is absolutely essential, resulting in a complicated circuit configuration.
  • components such as detectors and comparator are required for the AGC circuit, resulting in a complicated circuit configuration.
  • a GCA Gate Control Amplifier
  • LPF Low-pass filter
  • a wobble signal may contain error factors such as phase shift during detection, internal circuit noise and signal fluctuations. Therefore, these error factors must be positively eliminated before extracting a wobble signal.
  • the present invention has been made in light of the above problems, and an embodiment of the present invention to provide a new and improved misjudgment correction circuit and optical disk drive which can positively eliminate not only RF component but also noise, phase shift, signal fluctuations and other error factors from a wobble signal using a innovative and improved configuration.
  • a misjudgment correction circuit including:
  • an edge detection section configured to detect, in a binarized full addition signal obtained by adding first and second signals of the same or opposite polarity, edges at which the logic value of the binarized signal changes;
  • a push-pull signal acquisition section configured to acquire a binarized push-pull signal obtained by subtracting the second signal from the first signal
  • a majority decision calculation section configured to acquire, in chronologic order, a plurality of logic values of the push-pull signal between the two adjacent edges so as to determine, by a majority decision, the more numerous of the two logic values
  • a wave correction section configured to correct the push-pull signal between the edges to the more numerous logic value determined by the majority decision calculation section.
  • an optical disk drive including:
  • an optical pickup configured to irradiate light onto tracks of an optical recording medium so as to receive reflected light from the optical recording medium with two separate photoreceiving sections which are separated from each other in the direction in which the tracks extend;
  • an RF signal component acquisition section configured to acquire an RF signal component from at least either of first and second signals detected from the two photoreceiving sections;
  • a wobble signal acquisition section configured to acquire a wobble signal by subtracting the second signal from the first signal
  • an RF signal component binarization section configured to binarize the RF signal component
  • a wobble signal binarization section configured to binarize the wobble signal
  • an edge detection section configured to detect edges at which the logic value of the RF signal component changes
  • a majority decision calculation section configured to acquire, in chronologic order, a plurality of logic values of the wobble signal between the two adjacent edges so as to determine, by a majority decision, the more numerous of the two logic values
  • a wave correction section configured to correct the wobble signal between the edges to the more numerous logic value determined by the majority decision calculation section
  • an exclusive-ORing section configured to exclusive-OR the binarized RF signal component and wobble signal corrected by the wave correction section
  • a balance adjustment section configured to adjust the balance in amplitude between the first and second signals based on the exclusive-ORing result of the exclusive-ORing section.
  • FIG. 1 is a schematic diagram illustrating the configuration of an optical disk drive according to an embodiment of the present invention
  • FIG. 2 is a schematic diagram illustrating in detail the configuration of a wobble extraction circuit and its peripheral circuits in the optical disk drive shown in FIG. 1 ;
  • FIGS. 3A to 3D are characteristic diagrams illustrating the waveforms of a full addition signal from an adder and a signal from a subtractor;
  • FIGS. 4A and 4B are characteristic diagrams illustrating ideal waveforms of the full addition and wobble signals before and after binarization
  • FIGS. 5A and 5B are characteristic diagrams illustrating waveforms of the full addition and wobble signals in practical circuits before and after binarization
  • FIG. 6 is a block diagram illustrating more in detail the configuration of a push-pull wave correction block
  • FIGS. 7A to 7C are schematic diagrams for describing wave correction performed by the push-pull wave correction block
  • FIG. 8 is a characteristic diagram illustrating an advantageous effect of wave correction performed by the push-pull wave correction block.
  • FIG. 9 is a schematic diagram illustrating another example of the wobble extraction circuit.
  • An embodiment of the present invention can positively eliminate not only RF component but also error factors such as noise, phase shift and signal fluctuations from a wobble signal using a simple configuration.
  • FIG. 1 is a schematic diagram illustrating the configuration of an optical disk drive 100 according to an embodiment of the present invention.
  • the optical disk drive 100 includes a wobble signal processing system.
  • the wobble signal processing system includes an optical head (optical pickup) 102 configured to read the tracks of a disk-shaped recording medium 300 .
  • the wobble signal processing system also includes a preamplifier 104 , GCA (gain control amplifier) 106 , wobble extraction circuit 108 , analog filter 110 , AD converter (ADC) 112 , address demodulator 113 , address decoder 114 , PLL (phase locked loop) 115 and controller 116 .
  • GCA gain control amplifier
  • ADC AD converter
  • a reproduction circuit 10 is connected to the optical head 102 .
  • the reproduction circuit 10 handles processing including filtering and digitization of a reproduction signal detected from the disk-shaped recording medium 300 .
  • a decoder 12 configured to handle data format conversion is connected to the reproduction circuit 10 , thus making up a signal reproduction system.
  • information to be recorded is transmitted from the controller 116 to an encoder 14 where the data format is converted. Then, a laser control circuit 16 controls light emission of the light source provided in the optical head 102 according to information bits. This allows for the information to be written to the disk-shaped recording medium, thus making up a signal recording system.
  • a servo signal is generated from the output signal detected from the photoreceiving elements of the optical head 102 .
  • a servo circuit 18 controls the position of the optical head 102 based on the servo signal.
  • the servo circuit 18 also controls the rotation of a spindle motor 20 on which the disk-shaped recording medium 300 is placed.
  • the optical head 102 includes a light source such as laser diode and an objective lens configured to collect laser beams.
  • the optical head 102 also includes photoreceiving elements configured to receive reflected light from the disk-shaped recording medium 300 and optics configured to guide reflected light onto the photoreceiving elements.
  • the optical head 102 also includes actuators, configured to achieve focusing servo and tracking servo, and other components.
  • the signal output from the optical head 102 and amplified by the preamplifier 104 undergoes an amplitude adjustment by the GCA 106 to fit into the dynamic range of the subsequent circuit.
  • the wobble extraction circuit 108 extracts a wobble signal, which is then fed to the analog filter 110 .
  • the analog filter 110 removes undesired low- and high-frequency components from the input signal.
  • the reproduction signal (wobble signal), freed from undesired signal components by the analog filter 110 is fed to the AD converter (ADC) 112 .
  • the output signal from the AD converter (ADC) 112 is fed to the address demodulator 113 .
  • the address demodulator 113 detects a modulating signal of the input wobble signal to proceed with address modulation and outputs the resultant data to the subsequent address decoder 114 .
  • the address decoder 114 decodes an address from the demodulated data, reproduces address information of the access position and outputs the information to the controller 116 .
  • the controller 116 controls the signal reproduction and recording systems of the optical disk drive 100 based on the address information.
  • the PLL (Phase Locked Loop) 115 is capable of generating a clock used by the circuits including the wobble extraction circuit 108 , AD converter 112 , address demodulator 113 , address decoder 114 and controller 116 .
  • FIG. 2 is a schematic diagram illustrating in detail the configuration of the wobble extraction circuit 108 and its peripheral circuits in the optical disk drive 100 shown in FIG. 1 .
  • recording media such as optical disk often use a wobbled track format to accurately detect the linear velocity at each radial position in advance.
  • the optical disk drive 100 can access an arbitrary position of an unrecorded disk for recording or reproduction of information by reading these wobble signals.
  • photoreceiving elements 102 a of the optical head 102 have their photoreceiving areas separated into two parts in the direction in which the tracks extend (in the tangential direction of the tracks) so that reflected light of a light spot from the recording surface can be received.
  • a PD photodetector
  • photoreceiving sections A and D one of the two separate photoreceiving areas, are disposed on one side of the tangential direction of the tracks.
  • Photoreceiving sections B and C the other of the two separate photoreceiving areas, are disposed on the other side thereof.
  • the outputs from the photoreceiving sections A and D are fed to an adder 118 .
  • the adder 118 outputs a signal A+D.
  • the outputs from the photoreceiving sections B and C are fed to an adder 119 .
  • the adder 119 outputs a signal B+C.
  • a wobble signal can be obtained by detecting a push-pull signal component of a main beam or (A+D) ⁇ (B+C). It should be noted that the signals A+D and B+C are written as “AD” and “BC,” respectively, as necessary in the drawings.
  • the wobble extraction circuit 108 includes GCAs 120 and 122 , an adder 124 , a subtractor 126 , latch comparators 128 and 130 , an EXOR (exclusive OR) circuit 132 , an integrator 134 and a BAL control section 136 .
  • the signal A+D is fed to the GCA 120 for gain adjustment.
  • the signal B+C is fed to the GCA 122 for gain adjustment.
  • the gain-adjusted signals A+D and B+C are both fed to the adder 124 and subtractor 126 .
  • the subtractor 126 subtracts the signal B+C from the signal A+D to output a push-pull signal ((A+D) ⁇ (B+C)), i.e., a wobble signal.
  • the latch comparator 128 is an analog comparator configured to binarize the AC component of the input signal based on the comparison of the input signal with a given value.
  • the wobble signal ((A+D) ⁇ (B+C)) is fed to the latch comparator 130 .
  • the latch comparator 130 is an analog comparator configured to binarize the input signal based on the comparison of the input signal with a given value.
  • the outputs of the latch comparators 128 and 130 are both fed to a push-pull wave correction block 200 .
  • the push-pull wave correction block 200 includes a pulse width detector 202 and wave corrector 204 .
  • the output of the push-pull wave correction block 200 is fed to the EXOR circuit 132 .
  • the binarized signal of the wobble signal ((A+D) ⁇ (B+C)) from the latch comparator 130 undergoes removal of error factors by the push-pull wave correction block 200 before being fed to the EXOR circuit 132 .
  • the wave correction performed by the push-pull wave correction block 200 will be described in detail later.
  • the output of the EXOR circuit 132 is fed to the integrator 134 where the integral of the binarized signal from the EXOR circuit 132 is calculated.
  • the output of the integrator 134 is fed to the balance (BAL) control section 136 .
  • the BAL control section 136 outputs gain balance control signals configured to adjust the gains of the GCAs 120 and 122 based on the output of the integrator 134 .
  • the control signals from the BAL control section 136 are fed respectively to the GCAs 120 and 122 , thus forming a feedback loop for gain adjustment.
  • the GCAs 120 and 122 are circuits configured to adjust the gains according to the digital code input. These circuits perform feedback control of the gains based on the control signals from the BAL control section 136 .
  • the BAL control section 136 outputs control signals, inverted from each other, to the GCAs 120 and 122 , respectively.
  • the sum of the gains of the GCAs 120 and 122 controlled by the balance control section 136 is maintained constant. That is, when a control signal is output to one of the GCAs 120 and 122 to increase the gain thereof, a control signal is output to the other of the GCAs 120 and 122 to reduce the gain thereof.
  • FIGS. 3A to 3D are characteristic diagrams illustrating the waveforms of a full addition signal from the adder 124 and a wobble signal from the subtractor 126 .
  • FIG. 3A illustrates the waveform of the full addition signal from the adder 124 .
  • the signals (A+D) and (B+C) contain RF signal (recording signal) components of the same phase. Therefore, the full addition signal obtained by adding the signals (A+D) and (B+C) together is of the same phase as the original RF signal contained in the signals (A+D) and (B+C).
  • an RF signal component is obtained here by adding the signals (A+D) and (B+C) together, an RF signal component may be obtained from either of the signals (A+D) and (B+C), or from one of the signals A, B, C and D.
  • FIGS. 3B and 3C illustrate the waveforms of the wobble signal from the subtractor 126 to show that the signals (A+D) and (B+C) differ in amplitude from each other.
  • FIG. 3B illustrates a case in which (A+D)>(B+C)
  • FIG. 3C a case in which (A+D) ⁇ (B+C).
  • the signals (A+D) and (B+C) contain RF signal components of the same phase. Therefore, if the signal (A+D) is larger or smaller than the signal (B+C) due to imbalance in amplitude, an RF signal component of the same or opposite phase to the RF signal leaks into the wobble signal according to the imbalance in amplitude.
  • FIG. 3D illustrates a wobble signal whose gain has been adjusted by the GCAs 120 and 122 so that the signals (A+D) and (B+C) are equal in amplitude.
  • the RF signal component of the same phase as the full addition signal leaks into the wobble signal, causing the full addition signal to be of the same phase as the wobble signal.
  • the output from the latch comparator 128 is of the same phase as the output from the latch comparator 130 .
  • the output from the EXOR circuit 132 is low (L).
  • the relationship in amplitude between the signals (A+D) and (B+C) is found, it is possible to strike a uniform balance between the amplitudes of the two signals by applying feedback control in such a manner as to eliminate the imbalance. More specifically, the amplitudes of the signals (A+D) and (B+C) can be controlled to a similar level by changing the gains of the GCAs 120 and 122 based on the magnitude relationship between the signals (A+D) and (B+C).
  • the output from the EXOR circuit 132 is fed to the integrator 134 for integration over a given period of time.
  • a low (L) signal is output from the EXOR circuit 132 based on the output from the integrator 134 , then (A+D) ⁇ (B+C). Therefore, the BAL control section 136 outputs a gain balance control signal, configured to reduce the gain, to the GCA 120 which receives the signal (A+D).
  • the BAL control section 136 outputs a gain balance control signal, configured to increase the gain, to the GCA 122 which receives the signal (B+C).
  • the BAL control section 136 outputs a gain balance control signal, configured to increase the gain, to the GCA 120 .
  • the BAL control section 136 outputs a gain balance control signal, configured to reduce the gain, to the GCA 122 .
  • the BAL control section 136 outputs binary coded control signals, inverted from each other, respectively to the GCAs 120 and 122 .
  • the gains are adjusted so that the amplitudes of the signals (A+D) and (B+C) approach each other. This makes it possible to control the amplitudes of the signals (A+D) and (B+C) to a similar level.
  • the wobble signal feedback-controlled as described above is fed from the subtractor 126 to the analog filter 110 , and then to the AD converter 112 for wobble demodulation.
  • the magnitude relationship between the signals (A+D) and (B+C) is determined based on the wobble signal. Therefore, the RF component can be eliminated from the wobble signal based on the determination result using the wobble signal itself. This ensures secure elimination of the RF component from the wobble signal than processing the wobble signal based on other characteristic values, thus putting the wobble signal into the best possible condition.
  • High-frequency components outside the frequency band of the wobble signal may be removed in advance with filters so that exclusive-ORing is performed for gain adjustment based on low-frequency RF components close to the frequency band of the wobble signal.
  • high-frequency cutting filters are inserted, for example, one before the adder and another before the subtractor.
  • filters may be inserted, one before the latch comparator 128 and another before the latch comparator 130 .
  • the frequencies to be cut by the filters can be selected as appropriate based on the frequency band of the wobble signal.
  • the BAL control section 136 outputs control signals to the GCAs 120 and 122 .
  • the BAL control section 136 may output a control signal to only one of the GCAs 120 and 122 so that the gain of either the signal (A+D) or (B+C) is adjusted.
  • the amplitudes of the signals (A+D) and (B+C) can be controlled to a similar level using feedback control.
  • the sum of the gains of the GCAs 120 and 122 is not a constant. Therefore, the gain of either of the signals (A+D) and (B+C) may be a fixed value.
  • differential operation performed by feeding control values to both the GCAs 120 and 122 provides smaller amplitude variation during feedback control.
  • exclusive-ORing the binarized RF component (full addition signal) and binarized wobble signal allows for detection of which of the signals (A+D) and (B+C) is greater or smaller than the other.
  • feedback control based on the above, it is possible to strike a uniform balance between the amplitudes of the two signals, thus allowing for extraction of the wobble signal with high accuracy.
  • no AGC loop is required to ensure that the amplitudes of the signals (A+D) and (B+C) match. This permits downsizing of the balance control circuit, thus contributing to reduced manufacturing cost.
  • the balance in amplitude can be controlled based on the outputs of the latch comparators 128 and 130 respectively configured to binarize the full addition signal and wobble signal. This eliminates the need for the GCA configured to meet the dynamic range of the AGC circuit and the LPF configured to smooth the RF signal waveform. Further, large dynamic and gain ranges were required for the prior art AGC circuit to ensure that the amplitudes of the signals (A+D) and (B+C) match. With the above configuration, however, it is only necessary to control the balance between the signals (A+D) and (B+C), thus minimizing the gain range of the gain control circuit.
  • all signal processing for the balance detection and control following binarization can be implemented by logic circuits. This contributes to smaller circuit scale as compared to analog signal processing, thus ensuring better compatibility with CMOS (Complementary Metal Oxide Semiconductor) system LSIs (Large Scale Integration). Still further, the comparator circuits can be readily rendered offset-free in the CMOS process. The above configuration is also compatible with the CMOS process in this regard. Still further, because any imbalance can be detected from the residual RF component following wobble extraction, the balance can be controlled to ensure minimal residual RF component, thus providing improved wobble signal quality.
  • CMOS Complementary Metal Oxide Semiconductor
  • FIG. 4A illustrates a case in which (A+D) ⁇ (B+C)
  • FIG. 4B a case in which (A+D) ⁇ (B+C).
  • FIGS. 4A and 4B show ideal waveforms of the two signals free from error factors such as phase shift, circuit noise and signal fluctuations. As illustrated in FIGS.
  • the EXOR circuit 132 stably outputs low level (0) and high level (1) signals respectively when (A+D) ⁇ (B+C) and (A+D) ⁇ (B+C).
  • FIGS. 5A and 5B illustrate signal waveforms obtained from practical circuits, showing a case in which an error factor caused, for example, by phase shift, circuit noise or signal fluctuations has occurred in the wobble signal.
  • FIG. 5A illustrates a case in which (A+D) ⁇ (B+C)
  • FIG. 5B a case in which (A+D) ⁇ (B+C), as in FIGS. 4A and 4B .
  • the wobble signal has a phase shift and noise N.
  • the full addition signal after the binarization makes a high-to-low transition at a different time from when the wobble signal after the binarization makes a high-to-low or low-to-high transition.
  • part of the wobble signal output after the binarization which should originally be low (0) is high (1) because of the noise N.
  • the wobble signal fluctuates, pushing up (shifting to the positive side) the center of the amplitude.
  • part of the wobble signal output after the binarization which should originally be low (0) is high (1).
  • the integral may increase or decrease depending on error factors. This requires time for the balance to converge.
  • the fluctuation of the wobble signal occurs only on the side of the push-pull signal.
  • the wobble signal fluctuation can have a significant impact as an error factor if it occurs when the signals (A+D) and (B+C) are about to become balanced.
  • the push-pull wave correction block 200 performs wave correction to ensure reduced error factors, thus bringing the signal waveforms from the practical circuitry close to the ideal ones as illustrated in FIGS. 4A and 4B .
  • a description will be given below of the wave correction with reference to FIGS. 6 and 7 .
  • FIG. 6 is a block diagram illustrating more in detail the configuration of the push-pull wave correction block 200 .
  • the push-pull wave correction block 200 includes a both-edge detection unit 206 , edge-to-edge counter 208 , push-pull signal (H, L) period comparison unit 210 and wave corrector 212 .
  • the both-edge detection unit 206 , edge-to-edge counter 208 and push-pull signal (H, L) period comparison unit 210 correspond to the pulse width detector 202 shown in FIG. 2 .
  • the wave corrector 212 corresponds to the wave corrector 204 .
  • FIGS. 7A to 7C are schematic diagrams for describing wave correction performed by the push-pull wave correction block 200 .
  • FIG. 7A illustrates a clock pulse
  • FIG. 7B the full addition signal and wobble signal after the binarization by the latch comparators 128 and 130 .
  • the wobble signal (push-pull signal) shown in FIG. 7B has yet to be corrected by the push-pull wave correction block 200 .
  • FIG. 7B illustrates a case in which A+D ⁇ B+C.
  • FIG. 7C illustrates the wobble signal which has been corrected by the push-pull wave correction block 200 .
  • time periods H and L are detected during which the full addition signal is high and low, respectively, as illustrated in FIG. 7B .
  • the edge-to-edge counter 208 counts, in number of clock pulses, the length of each of the time periods H and L during which the full addition signal is high and low, respectively.
  • the push-pull signal (H, L) period comparison unit 210 compares, for each of the time periods H and L during which the full addition signal is high and low, respectively, the numbers of high- and low-level wobble signals based on the internal clock. As illustrated in FIGS. 7A to 7C , a detection is made, at the leading edge of the clock, as to whether the wobble signal is high or low for each of the time periods H and L. This provides the number of high-level wobble signals (number of black filled circles in FIG. 7B ) and that of low-level wobble signals (number of white filled circles in FIG. 7B ) for each of the time periods H and L.
  • the push-pull signal (H, L) period comparison unit 210 determines, by a majority decision, which of the high- and low-level signals in the time period H is more numerous than the other, thus determining the logic value.
  • the wave corrector 212 corrects, based on the calculation result, all the wobble signal values in the time period H to the more numerous logic value.
  • the push-pull signal (H, L) period comparison unit 210 similarly determines, by a majority decision, which of the high- and low-level signals is more numerous than the other.
  • the wave corrector 212 corrects the wobble signal values in the time period L to the more numerous logic values
  • FIG. 7B illustrates a case in which the time period H of the full addition signal is six clocks long.
  • this time period H there are four high (black filled) wobble signals and two low (white filled) wobble signals. That is, there are more high-level signals than low-level ones. Therefore, the wave corrector 212 corrects all the wobble signals in the time period H to high-level signals.
  • the time period L on the other hand, there are one high (black filled) wobble signal and five low (white filled) wobble signals. That is, there are more low-level signals than high-level ones. Therefore, the wave corrector 212 corrects all the wobble signals in the time period L to low-level signals.
  • the wobble signals can be corrected in each of the time periods H and L to high- or low-level signals even in the presence of variation in level of the wobble signals during these periods. This ensures synchronization of the high-to-low or low-to-high transition of the full addition signal with that of the wobble signal.
  • the wave corrector 212 corrects the wobble signal, synchronous with the edges of the full addition signal R, to the logic level which is more numerous of the two levels, i.e., high and low levels.
  • FIG. 7C illustrates the corrected wobble signal from the wave corrector 212 .
  • the wobble signal is high during the time period H, and low during the time period L.
  • error factors such as phase shift, noise and signal fluctuations can be eliminated even in the presence of error in the wobble signal.
  • This provides excellent wobble signal quality transmitted to the integrator 134 from the EXOR circuit 132 , thus contributing to shorter integration time and significantly shorter adjustment time for wobble signal amplitude. Further, even after the balance adjustment of the wobble signal, the push-pull signal waveform is corrected. This positively suppresses the impact of wobble signal fluctuations, reliably preventing signal degradation due to fluctuations. Still further, even in the presence of phase shift already at the reading of the signal from the optical disk 300 , the impact of phase shift can be corrected. This ensures positive elimination of error factors.
  • FIG. 7B illustrates a case in which A+D ⁇ B+C.
  • the same processing is performed also when A+D ⁇ B+C.
  • the correction by the wave corrector changes the wobble signals to low-level signals during the time period H, and to high-level signals during the time period L, thus eliminating error factors from the wobble signals.
  • FIG. 8 is a characteristic diagram illustrating an advantageous effect of wave correction performed by the push-pull wave correction block 200 , showing the characteristics until the integral of the integrator 134 converges to 0.
  • the vertical axis represents an integral which takes on ‘1’ when the output of the EXOR circuit 132 is high, and ‘ ⁇ 1’ when the output thereof is low.
  • the horizontal axis represents time. When the integral along the vertical axis is 0, the amplitude balance is in a converged state.
  • the waveform shown by a solid line in FIG. 8 illustrates the characteristics when the waveform is corrected by the push-pull wave correction block 200 .
  • the waveform shown by a dashed line in FIG. 8 illustrates a case in which the push-pull wave correction block 200 is not provided and in which the outputs of the latch comparators 128 and 130 are fed to the EXOR circuit 132 in an as-is form.
  • the characteristic represented by the dashed line in FIG. 8 shows that it takes 790 ⁇ seconds for the integral to converge after the start of the amplitude balance adjustment.
  • the integral converges in about 640 ⁇ seconds after the start of the adjustment.
  • elimination of error factors from the wobble signal by means of the push-pull wave correction block 200 ensures that the integral decreases in one direction. This provides reduction in balance convergence time to about 80%, thus contributing to significantly reduced convergence time.
  • FIG. 9 is a schematic diagram illustrating another example of the wobble extraction circuit 108 .
  • a pattern detector 138 is provided at the subsequent stage of the latch comparator 128 .
  • Other components of the circuit in FIG. 9 are the same as those shown in FIG. 2 .
  • the pattern detector 138 is capable of detecting the signal pattern of the full addition signal R and transmitting only the signal having a predetermined pattern length to the push-pull wave correction block 200 .
  • the pattern length of the full addition signal R for the time period H is defined by the standard to be from 2T to 9T (where T is one period of the clock pulse).
  • the pattern detector 138 can remove signals having a predetermined pattern length from the input full addition signal R and transmit the resultant signal to the push-pull wave correction block 200 .
  • the pattern detector 138 can, for example, remove signals having a pattern length of 4T or more or transmit only signals with a pattern length of 3T to 6T to the subsequent stage.
  • removal of undesired patterns is likely to change the time it takes for the balance to converge.
  • the patterns to be removed by the pattern detector 138 should preferably be adjusted to provide the shortest possible balance convergence time. Therefore, if the patterns to be removed by the pattern detector 138 are adjusted based on the standard or mode used (e.g., 2 ⁇ speed mode) of the optical disk 300 , the balance convergence time can be minimized in each of the standards and modes.
  • the standard or mode used e.g., 2 ⁇ speed mode
  • the present embodiment ensures suppression of external disturbances such as phase shift, noise and wobble fluctuations thanks to the push-pull wave correction block 200 , thus providing excellent wobble signal quality transmitted to the integrator 134 .
  • This contributes to reduced integration time, thus providing significantly reduced adjustment time for wobble signal amplitude balance.

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  • Optical Recording Or Reproduction (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
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JP7166535B2 (ja) * 2018-08-09 2022-11-08 多摩川精機株式会社 角度検出器の励磁信号異常検出装置
JP2020026962A (ja) * 2018-08-09 2020-02-20 多摩川精機株式会社 角度検出器の出力信号異常検出装置

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JP2009272007A (ja) 2009-11-19

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