US7978752B2 - Method and apparatus for switching operating modes of a receiver - Google Patents
Method and apparatus for switching operating modes of a receiver Download PDFInfo
- Publication number
- US7978752B2 US7978752B2 US11/685,814 US68581407A US7978752B2 US 7978752 B2 US7978752 B2 US 7978752B2 US 68581407 A US68581407 A US 68581407A US 7978752 B2 US7978752 B2 US 7978752B2
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- US
- United States
- Prior art keywords
- mode
- receiver
- taps
- operating
- block
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related, expires
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/707—Spread spectrum techniques using direct sequence modulation
- H04B1/709—Correlator structure
- H04B1/7093—Matched filter type
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W88/00—Devices specially adapted for wireless communication networks, e.g. terminals, base stations or access point devices
- H04W88/02—Terminal devices
- H04W88/06—Terminal devices adapted for operation in multiple networks or having at least two operational modes, e.g. multi-mode terminals
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B2201/00—Indexing scheme relating to details of transmission systems not covered by a single group of H04B3/00 - H04B13/00
- H04B2201/69—Orthogonal indexing scheme relating to spread spectrum techniques in general
- H04B2201/707—Orthogonal indexing scheme relating to spread spectrum techniques in general relating to direct sequence modulation
- H04B2201/70707—Efficiency-related aspects
- H04B2201/7071—Efficiency-related aspects with dynamic control of receiver resources
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L2025/03433—Arrangements for removing intersymbol interference characterised by equaliser structure
- H04L2025/03535—Variable structures
Definitions
- the present invention is related to wireless communication systems. More particularly, the present invention is related to a method and system for switching operating modes of a receiver.
- Equalizer based receivers typically provide enhanced performance over other types of receivers in many situations. For this reason, equalizer based receivers are often preferred over other types of receivers, such as RAKEs or matched filters (MFs). Unfortunately, this enhanced performance sometimes comes at a cost.
- equalizer based receivers are more complex and may have performance degradation under certain conditions. Additionally, equalizer based receivers typically consume more power than other types of receivers. In fact, in some cases the equalizer consumes more power than any other components.
- the present invention is related to a method and apparatus for switching operating modes of a receiver.
- the method comprises determining whether a criteria is met to switch the operating mode of the receiver.
- the operating mode of the receiver is switched from the first mode to a second mode if the criteria is met.
- FIG. 1 is a functional block diagram of a receiver in accordance with the present invention.
- FIG. 2 is a flow diagram of a method for switching operating modes of the receiver of FIG. 1 .
- wireless transmit/receive unit includes but is not limited to a user equipment (UE), a mobile station, a fixed or mobile subscriber unit, a pager, a cellular telephone, a personal digital assistant (PDA), a computer, or any other type of user device capable of operating in a wireless environment.
- base station includes but is not limited to a Node-B, a site controller, an access point (AP), or any other type of interfacing device capable of operating in a wireless environment.
- FIG. 1 is a functional block diagram of a receiver 100 in accordance with the present invention.
- the receiver 100 includes a channel estimate (CHEST) block 110 , having M taps, a complex conjugate block 120 , a delay spread estimate block 130 , a selection block 140 (or selection algorithm block), an equalization (EQ) tap update block 150 , having L taps, a switch 160 , having inputs (designated In 1 and In 2 ) and an output, a tapped delay line (TDL) block 170 having L taps, a multiplier 180 , and a summation (SUM) block 190 .
- CHEST channel estimate
- EQ equalization
- TDL tapped delay line
- SUM summation
- the CHEST block 110 receives the input data sequence (Rx Data) and performs an operation on it to produce a vector “M” elements long that is as estimate of the channel impulse response (CIR), a channel estimate.
- CIR channel impulse response
- There are various methods of performing a channel estimate including, but not limited to, linear techniques such as correlations with a known pilot sequence, non-linear techniques such as squelching small path estimates to reduce noise or decision directed methods, and adaptive techniques such as normalized least mean square (NLMS) or recursive least square (RLS) based channel estimates.
- the CHEST block 110 outputs a signal (h) to the EQ tap update block 150 , the complex conjugate block 120 and delay spread estimate block 130 .
- the complex conjugate block 120 receives a vector of complex numbers as an input, and outputs a vector with each element being the complex conjugate of the corresponding input.
- the complex conjugate of the CIR may be used to realize a matched filter (MF) method and may be somewhat similar to that of a RAKE receiver, depending on the detail of the channel estimate. For example, if the elements of the channel estimate that do not correspond to a channel path location are squelched, the MF is very similar to a RAKE in performance.
- the complex conjugate block 120 outputs an MF signal to input In 2 of the switch 160 .
- the delay spread estimate block 130 receives the channel estimate M length vector and computes a delay spread estimate.
- the delay spread may be calculated in accordance with the following equation:
- the delay spread estimate block 130 outputs its signal to the selection block 140 .
- the selection block 140 receives available data to determine if it is appropriate or acceptable to switch the receiver to the lower power MF receive. Such information may include, but is not limited to, Signal to Interference Ratio (SIR), the estimated channel delay spread received from the delay spread estimate block 130 , the aggressiveness of the transmission being received (computable from the transport format resource combination (TFRC) input, or from the data rate attempted), the energy left in the receiver's battery (power save input), and/or indication from the network that it is permitted to switch.
- SIR Signal to Interference Ratio
- the selection block 140 outputs a signal to the switch 160 .
- the switch 160 also receives the signal (w) in the input In 1 from the EQ tap update block 150 .
- the equalizer tap update block 150 generates the taps for the equalizer that are used when the receiver 100 operates as an advanced receiver.
- the output (w) is a vector of L elements.
- the inner product of the generated taps, w, and the TDL produce the equalizer output.
- the switch block 160 receives either the equalizer taps or the conjugate of the channel estimate and forwards it on to an input of the multiplier 180 .
- the multiplier 180 takes two vectors as inputs and computes the element-wise product to produce a third output vector.
- the elements of the output vector from 180 are all added up together in the SUM block 190 to produce either the equalizer or matched filter output, y, depending on which vector the switch 160 selected. In the case of adaptive equalizers, the output is fed back to the tap generation block. Where the MF is used and squelching was done in the channel estimate, the multiplications with zero elements may not need to be performed.
- the TDL block 170 is preferably a shift register that receives the input data (Rx Data) and provides an output comprising a vector where the N elements of the vector are the last M values of the Rx Data signal.
- the TDL block 170 outputs a signal to the multiplier 180 and a signal (x) to the EQ tap update block 150 .
- the multiplier 180 outputs a signal to the SUM block 190 .
- the SUM block 190 outputs the receiver output signal (y), which is also a feedback to the EQ tap update block 150 .
- FIG. 2 is a flow diagram of a method 200 for switching operating modes of the receiver 100 of FIG. 1 .
- the receiver 100 is operating in equalizer mode.
- the receiver 100 determines whether a criteria for switching modes is met (step 220 ). These may include when conditions do not permit the performance advantage of the equalizer mode, when conditions may indicate a preference for the MF operation, or when higher performance is not required. Under those circumstances, it may be beneficial to switch from equalizer operation to MF operation to save power or possibly to improve receiver performance.
- the criteria for switching modes is considered to not have been met and the receiver 100 continues to operate in equalizer mode (step 210 ).
- the receiver 100 switches to operating in MF mode (step 230 ).
- the decision to switch to the MF mode is made to save power.
- the decision to switch modes to the MF mode may also be made for performance reasons as described above, for example if the delay spread indicated that the channel consisted of essentially a single path.
- the CHEST block 110 may be enlarged to cover a larger window of M taps than the equalizer window of length L taps so that larger delay spread channel may be accommodated in the MF mode.
- the enlargement may either be permanent and only enabled in the MF mode, or may be dynamic if resources are available from the EQ tap update block 150 and reassigned to the CHEST block 110 , without increasing gate-count complexity.
- the number of used taps in the TDL block 170 , N will either be set to L or M depending on the mode.
- the output of the receiver 100 may then be expressed as follows:
- the EQ tap update block 150 only runs when in the equalizer mode and computes the weights to be used when generating the output.
- the update equation is as follows:
- CENLMS channel estimation enhanced NLMS
- non-adaptive block equalizers For equalizer structures that make use of a channel estimate (for example, channel estimation enhanced NLMS (CENLMS) or non-adaptive block equalizers), the mode switching can be done with little or no increase in design complexity.
- CENLMS channel estimation enhanced NLMS
- the aspects of the present invention have been described in terms of the CENLMS, they are also applicable to other compatible structures.
- ROM read only memory
- RAM random access memory
- register cache memory
- semiconductor memory devices magnetic media such as internal hard disks and removable disks, magneto-optical media, and optical media such as CD-ROM disks, and digital versatile disks (DVDs).
- Suitable processors include, by way of example, a general purpose processor, a special purpose processor, a conventional processor, a digital signal processor (DSP), a plurality of microprocessors, one or more microprocessors in association with a DSP core, a controller, a microcontroller, Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) circuits, any other type of integrated circuit (IC), and/or a state machine.
- DSP digital signal processor
- ASICs Application Specific Integrated Circuits
- FPGAs Field Programmable Gate Arrays
- a processor in association with software may be used to implement a radio frequency transceiver for use in a wireless transmit receive unit (WTRU), user equipment (UE), terminal, base station, radio network controller (RNC), or any host computer.
- the WTRU may be used in conjunction with modules, implemented in hardware and/or software, such as a camera, a video camera module, a videophone, a speakerphone, a vibration device, a speaker, a microphone, a television transceiver, a hands free headset, a keyboard, a Bluetooth® module, a frequency modulated (FM) radio unit, a liquid crystal display (LCD) display unit, an organic light-emitting diode (OLED) display unit, a digital music player, a media player, a video game player module, an Internet browser, and/or any wireless local area network (WLAN) module.
- modules implemented in hardware and/or software, such as a camera, a video camera module, a videophone, a speakerphone, a vibration device, a speaker,
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Power Engineering (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Noise Elimination (AREA)
- Circuits Of Receivers In General (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/685,814 US7978752B2 (en) | 2006-03-15 | 2007-03-14 | Method and apparatus for switching operating modes of a receiver |
US13/150,457 US8379696B2 (en) | 2006-03-15 | 2011-06-01 | Method and apparatus for switching operating modes of a receiver |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US78245806P | 2006-03-15 | 2006-03-15 | |
US11/685,814 US7978752B2 (en) | 2006-03-15 | 2007-03-14 | Method and apparatus for switching operating modes of a receiver |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US13/150,457 Continuation US8379696B2 (en) | 2006-03-15 | 2011-06-01 | Method and apparatus for switching operating modes of a receiver |
Publications (2)
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US20070217556A1 US20070217556A1 (en) | 2007-09-20 |
US7978752B2 true US7978752B2 (en) | 2011-07-12 |
Family
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Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
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US11/685,814 Expired - Fee Related US7978752B2 (en) | 2006-03-15 | 2007-03-14 | Method and apparatus for switching operating modes of a receiver |
US13/150,457 Expired - Fee Related US8379696B2 (en) | 2006-03-15 | 2011-06-01 | Method and apparatus for switching operating modes of a receiver |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
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US13/150,457 Expired - Fee Related US8379696B2 (en) | 2006-03-15 | 2011-06-01 | Method and apparatus for switching operating modes of a receiver |
Country Status (3)
Country | Link |
---|---|
US (2) | US7978752B2 (fr) |
TW (2) | TW200947886A (fr) |
WO (1) | WO2007109040A2 (fr) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
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GB0822849D0 (en) * | 2008-12-16 | 2009-01-21 | Vodafone Plc | Control of service handover |
TWI567705B (zh) * | 2012-12-27 | 2017-01-21 | 天鈺科技股份有限公司 | 顯示裝置及其驅動方法、時序控制電路的資料處理及輸出方法 |
EP3528705B1 (fr) | 2016-10-18 | 2021-05-26 | Dexcom, Inc. | Procédé de communication sans fil de données de glucose |
US11032855B2 (en) | 2016-10-18 | 2021-06-08 | Dexcom, Inc. | System and method for communication of analyte data |
Citations (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0415897A1 (fr) | 1989-08-25 | 1991-03-06 | Telefonaktiebolaget L M Ericsson | Méthode pour la réduction du besoin de puissance d'un récepteur radio mobile |
US5283531A (en) * | 1989-12-06 | 1994-02-01 | Kabushiki Kaisha Toshiba | Demodulation apparatus incorporating adaptive equalizer for digital communication |
EP0615347A1 (fr) | 1992-09-18 | 1994-09-14 | Oki Electric Industry Company, Limited | Recepteur a egalisation adaptative et recepteur a estimation de sequence a probabilite maximum |
US5809069A (en) * | 1996-07-19 | 1998-09-15 | Texas Instruments Incorporated | Frequency-domain carrierless AM-PM demodulator |
US6167081A (en) | 1999-09-03 | 2000-12-26 | Porter; James L. | Dual mode receiver |
US20020024995A1 (en) | 2000-08-31 | 2002-02-28 | Samsung Electronics Co., Ltd. | Method and apparatus for controlling equalizer using sync signal in digital vestigial sideband system |
WO2002093765A1 (fr) | 2001-05-14 | 2002-11-21 | Infineon Technologies Ag | Recepteur rake pour les modes fdd et tdd |
EP1331777A1 (fr) | 2002-01-23 | 2003-07-30 | Evolium S.A.S. | Egaliseur DFE/MLSE |
US20040042537A1 (en) * | 2002-08-30 | 2004-03-04 | Frank Colin David | Spread spectrum receiver apparatus and method |
US20040091023A1 (en) * | 2002-11-07 | 2004-05-13 | Winbond Electronics Corp | Packet-based multiplication-free CCK demodulator with a fast multipath interference cipher |
US6744821B1 (en) * | 1998-06-29 | 2004-06-01 | Alcatel | Multicarrier receiver |
US20040161029A1 (en) * | 2003-02-18 | 2004-08-19 | Malladi Durga Prasad | Communication receiver with an adaptive equalizer length |
US20050111539A1 (en) | 2003-11-20 | 2005-05-26 | Sanyo Electric Co., Ltd. | Equalization method and apparatus using the same |
EP1755297A1 (fr) | 2005-08-15 | 2007-02-21 | Research In Motion Limited | Filtres optimaux espace-temps conjoints pour l'annulation d'interférence |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA2415170C (fr) * | 2001-12-28 | 2008-07-15 | Ntt Docomo, Inc. | Recepteur, emetteur, systeme de communication et methode de communication |
-
2007
- 2007-03-14 US US11/685,814 patent/US7978752B2/en not_active Expired - Fee Related
- 2007-03-14 WO PCT/US2007/006395 patent/WO2007109040A2/fr active Application Filing
- 2007-03-15 TW TW098100253A patent/TW200947886A/zh unknown
- 2007-03-15 TW TW096109012A patent/TW200742278A/zh unknown
-
2011
- 2011-06-01 US US13/150,457 patent/US8379696B2/en not_active Expired - Fee Related
Patent Citations (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0415897A1 (fr) | 1989-08-25 | 1991-03-06 | Telefonaktiebolaget L M Ericsson | Méthode pour la réduction du besoin de puissance d'un récepteur radio mobile |
US5283531A (en) * | 1989-12-06 | 1994-02-01 | Kabushiki Kaisha Toshiba | Demodulation apparatus incorporating adaptive equalizer for digital communication |
EP0615347A1 (fr) | 1992-09-18 | 1994-09-14 | Oki Electric Industry Company, Limited | Recepteur a egalisation adaptative et recepteur a estimation de sequence a probabilite maximum |
EP1182836A2 (fr) | 1992-09-18 | 2002-02-27 | Oki Electric Industry Company, Limited | Recepteur a égalisation adaptative et recepteur a estimation de sequence à probabilité maximum |
US5809069A (en) * | 1996-07-19 | 1998-09-15 | Texas Instruments Incorporated | Frequency-domain carrierless AM-PM demodulator |
US6744821B1 (en) * | 1998-06-29 | 2004-06-01 | Alcatel | Multicarrier receiver |
US6167081A (en) | 1999-09-03 | 2000-12-26 | Porter; James L. | Dual mode receiver |
US20020024995A1 (en) | 2000-08-31 | 2002-02-28 | Samsung Electronics Co., Ltd. | Method and apparatus for controlling equalizer using sync signal in digital vestigial sideband system |
WO2002093765A1 (fr) | 2001-05-14 | 2002-11-21 | Infineon Technologies Ag | Recepteur rake pour les modes fdd et tdd |
EP1331777A1 (fr) | 2002-01-23 | 2003-07-30 | Evolium S.A.S. | Egaliseur DFE/MLSE |
US20040042537A1 (en) * | 2002-08-30 | 2004-03-04 | Frank Colin David | Spread spectrum receiver apparatus and method |
US20040091023A1 (en) * | 2002-11-07 | 2004-05-13 | Winbond Electronics Corp | Packet-based multiplication-free CCK demodulator with a fast multipath interference cipher |
US20040161029A1 (en) * | 2003-02-18 | 2004-08-19 | Malladi Durga Prasad | Communication receiver with an adaptive equalizer length |
US20050111539A1 (en) | 2003-11-20 | 2005-05-26 | Sanyo Electric Co., Ltd. | Equalization method and apparatus using the same |
EP1755297A1 (fr) | 2005-08-15 | 2007-02-21 | Research In Motion Limited | Filtres optimaux espace-temps conjoints pour l'annulation d'interférence |
Also Published As
Publication number | Publication date |
---|---|
WO2007109040A3 (fr) | 2007-11-29 |
US8379696B2 (en) | 2013-02-19 |
US20110228819A1 (en) | 2011-09-22 |
US20070217556A1 (en) | 2007-09-20 |
TW200742278A (en) | 2007-11-01 |
TW200947886A (en) | 2009-11-16 |
WO2007109040A2 (fr) | 2007-09-27 |
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Owner name: INTERDIGITAL TECHNOLOGY CORPORATION, DELAWARE Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:PIETRASKI, PHILIP J.;REEL/FRAME:019464/0283 Effective date: 20070420 |
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Effective date: 20150712 |