BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to microwave integrated filter tuning systems. More specifically, this invention relates to an improved circuit for automatically tuning and controlling loss in voltage-controlled oscillator (VCO) master-slave tuning systems incorporating microwave integrated filters.
2. Description of the Related Art
Interest in building single-chip wireless transceivers has fueled the integration of microwave continuous-time filters, of which automatic tuning systems are crucial parts. These tuning systems correct time constants and compensate for excess phase shift to make the filters immune to parasitics, technology tolerances, and temperature changes. One tuning approach uses a VCO and a frequency control circuit to set the time constant of a tracking filter. This system requires amplitude regulation to reduce distortion caused by the non-linearities of the active devices in the VCO in order to minimize the tuning error. Two major methods of regulation exist: (1) using limiters to limit the amplitude and (2) using a second control circuit, in addition to the frequency control circuit. Because of the non-linearity of the limiters, the first method causes a large frequency tuning error as the VCO's quality factor (Q) decreases. The second control circuit is used in the second method to make Q infinite and the amplitude small, and all elements of the second control circuit are intended to work in the linear region. In microwave integrated filter applications involving GHz-range coupled-resonator bandpass filters, the loss of the VCO must be tuned to zero.
The latter type of tuned-filter system discussed above is illustrated in FIG. 1. This system 10, often called a VCO master-slave tuning system, includes tuned filter 100 (also called an "indirectly" tuned filter), VCO 110, frequency control circuit 120, and Q-control circuit 130. VCO 110 is the "master" and tuned filter 100 is the "slave." The circuit topologies of the master and the slave are very similar, often including transconductance amplifiers, bandpass filters, coupled resonators, or a combination of these or other elements. Tuned filter 100 includes f and Q inputs which control the center frequency (in the case of a bandpass filter) and Q of tuned filter 100. These f and Q inputs are also provided to VCO 110. Frequency control circuit 120 is provided with a reference frequency FREF and typically includes a phase detector and a low-pass filter. When frequency control circuit 120 is combined in a loop with VCO 110, a phase-locked loop results, with the output of the VCO being fed back to frequency control circuit 120 to be compared with FREF in the phase detector. The output of the phase detector is low-pass-filtered and then provided to VCO 110 and tuned filter 100.
Q-control circuit 130 is provided with a reference voltage VREF and typically includes a rectifier, an adder, and a low-pass filter. When Q-control circuit 130 is combined in a loop with VCO 110, a loss control loop (or sometimes an amplitude-locked loop) results, with the output of Q-control circuit 130 being fed back to VCO 110 as control voltage VCON. In theory, the two feedback loops in FIG. 1 may interact. However, if one loop is made much slower than the other one, the two loops can be considered decoupled. In order for the frequency control loop (phase-locked loop) to work effectively, the amplitude of the VCO output should neither be too small for the loop to detect zero-crossings, nor too large for a negative conductance that is part of the VCO to work in the linear region. Strong amplitude regulation may be realized by the loss control loop which is set faster than that of the frequency tuning loop. Thus, if a variable capacitor is used for frequency tuning, when the frequency tuning loop is much slower than the loss control loop, the capacitor can be considered invariant when analyzing the loss control loop.
In line with these assumptions, a VCO as depicted in FIG. 2A is chosen. FIG. 2A is a block diagram of a typical prior art loss control loop which includes VCO 210, rectifier 220, adder 230, and a circuit 240 having transfer function H(s). VCO 210 is depicted as an ideal fixed LC-tank circuit in parallel with GL, a conductance which models the loss of the tank at the oscillation frequency, and tunable negative conductance -GN. GL is the narrow-band equivalent loss contributed by inductor L and capacitor C. GN is the absolute value of the negative conductance which is controlled by VCON to tune out the loss. GN is assumed to increase monotonically with respect to VCON. The output of VCO 210 is provided to rectifier 220. The rectified output, VRECT, is subtracted from VREF in adder 230, and the difference is provided to circuit 240, a filter which provides gain and generates control voltage VCON to minimize the difference between the envelope of the VCO output, VENV, and VREF. The envelope voltage, VENV, is the low frequency component of the rectified output, VRECT. When VENV is greater than VREF, GN is made smaller to make the tank lossy and reduce the envelope voltage, VENV. If VENV is less than VREF, GN is increased, thus making Q negative and increasing the envelope voltage, VENV.
FIG. 2B illustrates a possible breadboard circuit realization of the prior art circuit of FIG. 2A. Circuit 240 is chosen as an integrator 270. (The signs on the inputs to adder 230 are reversed because of the minus sign introduced by integrator 270.) VCO 250 is realized as a differential LC-tank circuit in parallel with negative conductance circuit 260 which uses two MOSFETs biased in the triode region to act as variable resistors. Inserting resistors R1 and R2 in series with inductor LV reduces the Q of VCO 250 to about 10. Such a low Q is used to demonstrate the capability of the loop to control loss. Because this circuit is realized on a breadboard, the oscillation frequency of the tank circuit is low, around 3 MHz.
The goal of a loss control loop, when the loop settles, is to make Q infinite and the envelope voltage close to VREF. However, the loops of FIGS. 2A and 2B, which are adequate for kHz-range systems, have stability problems at higher frequencies. When the bandwidth of circuit 240 having transfer function H(s) is much smaller than ##EQU1## where ##EQU2## and ##EQU3## the control loop is unstable. Thus, as Q decreases or ωo increases, the possibility of instability increases. For a low-Q tank circuit oscillating in the GHz range, a wide-bandwidth control required for the stability of the circuit is difficult to realize, and is not desirable due to the large high frequency leakage to VCON. Realizing H(s) as an integrator, as in FIG. 2B, is supposed to provide very high DC gain to make VENV =VREF. However, non-linear analysis demonstrates that the loss control loop will settle at VENV =VREF and GN (VCON)=GL only if these are also the initial conditions. If they are not the initial conditions, the loss control loop will be unstable. During part of the period, VENV may be large enough to drive the negative conductance into its non-linear region, and during part of the period it may be too small to be detected by the frequency tuning loop. The results of such a loss control loop, as implemented in the breadboard circuit, are shown in FIG. 2C. The top trace shows VCO output voltage as a function of time and the bottom trace shows VCO control voltage VCON, as a function of time. In this instance, the peak-to-peak voltage of VCON is about 22 mV. Even though VREF is set to ˜0.1V, the peak-to-peak oscillation amplitude of the VCO rises to 1V, and is limited only because of the non-linearities of negative conductance circuit 260. Increasing the time constant of the integrator does not reduce this problem. Moreover, the loop is also unstable when the integrator is replaced by a low-pass filter with narrow bandwidth.
As realized on a breadboard, the prior art control method can not provide effective amplitude regulation in the MHz range or at higher frequencies. The amplitude of the VCO output may sometimes be too small for the frequency tuning loop to detect zero-crossings of the VCO's output, or too large for the negative conductances to operate in the linear region, causing frequency tuning mismatch between VCO 110 and tuned filter 100. It is expected that the same is true at microwave frequencies, as well. Therefore, a need exists for an improved loss control loop circuit which tunes the loss of the VCO precisely and achieves robust amplitude regulation.
SUMMARY OF THE INVENTION
In accordance with the present invention, a loss control loop circuit for controlling the amplitude of the output voltage of a VCO which is controlled by a VCO control voltage includes an envelope detector which receives the VCO output voltage and provides VCO output envelope voltage, VENV, an amplitude regulator which receives VENV and a reference voltage, VREF, and provides a sourcing current if VENV is less than VREF, and draws a sinking current if VENV is greater than VREF, a current-mode circuit which receives VENV and provides a control current, IQ, a low-pass filter having high DC gain for integrating the control current and the sourcing or sinking current from the amplitude regulator to provide the VCO control voltage, VCON, to the VCO, and means for providing VCON to the VCO.
The control current, IQ, is proportional to the inverse of VENV multiplied by the time derivative of VENV ##EQU4##
The current-mode circuit preferably includes a transconductor which receives VENV and provides a VCO output envelope current, IENV, first and second subcircuits, each of which receives IENV and provides first and second drain currents, I1 and I2, the first subcircuit further including a current-drawing capacitor, CX, and a current adder circuit which receives I1 and I2 and provides IQ as the difference current between I1 and I2. The difference current is the negative of the current drawn by CX.
The low-pass filter is an integrator which includes a capacitor coupled between a circuit node and ground. The control current is provided to the circuit node, and the amplitude regulator sources current to or sinks current from the circuit node. The voltage at the circuit node is the VCO control voltage, VCON. The amplitude regulator includes an output coupled to the circuit node, first and second current sources, first and second comparators each receiving VENV and VREF, and respective switch means associated with the first and second comparators. The first comparator and its associated switch means are responsive to VENV being less than VREF to connect the first current source to the output of the amplitude regulator in order to source current to the circuit node. The second comparator and its associated switch means are responsive to VENV being greater than VREF to connect the second current source to the output of the amplitude regulator to sink current from the circuit node.
The amplitude regulator includes a voltage difference detector and a charge pump. The voltage difference detector receives VENV and VREF and provides an up signal if VENV is less than VREF and provides a down signal if VENV is greater than VREF. The charge pump receives the up and down signals and provides sourcing current if the up signal is high and draws sinking current if the down signal is high.
Also provided is a loss control loop circuit for stabilizing the amplitude of the output voltage of a VCO which is controlled by a VCO control voltage which includes an envelope detector which receives the VCO output voltage and provides VENV, a current-mode circuit which receives VENV and provides a control current, IQ, a low-pass filter having high DC gain for integrating the control current to provide the VCO control voltage, VCON, to the VCO, and means for providing VCON to the VCO.
An important difference over the prior art, which included a VCO whose control voltage is provided at the output of a filter, is the inclusion of an envelope detector that generates VENV and an amplitude regulator and a current-mode circuit that are coupled in parallel between the output terminal of the envelope detector and the input terminal of the filter. The filter is a low-pass filter having high DC gain. The current-mode circuit converts VENV to a current proportional to the inverse of VENV multiplied by the time derivative of VENV. It is preferable that a microwave integrated filter has its loss controlled by the loss control loop circuit of the present invention.
A master-slave filter tuning system is also provided which uses the loss control loop circuit described above as a Q-control circuit. Also included in the system are a tuned filter which receives an input voltage and provides a filtered output voltage, and which also receives a frequency control signal and a Q-control signal. The system also includes a frequency control circuit which provides the tuned filter frequency control signal, a Q-control circuit which provides the tuned filter Q-control signal, and a voltage-controlled oscillator (VCO) which receives the tuned filter frequency control signal and the tuned filter Q-control signal and provides a VCO output voltage. The Q-control circuit includes an envelope detector which receives the VCO output voltage and provides VENV, an amplitude regulator which receives VENV and VREF and provides a sourcing current if VENV is less than VREF, and draws a sinking current if VENV is greater than VREF, a current-mode circuit which receives VENV and provides control current IQ, and a low-pass filter having high DC gain for integrating IQ and the sourcing or sinking current from the amplitude regulator to provide the VCO control voltage, VCON, to the VCO. The control current, IQ, is proportional to the inverse of VENV multiplied by the time derivative of VENV.
A method for controlling the amplitude of the output voltage of a VCO includes deriving from the VCO output voltage a VCO output envelope voltage, VENV, converting VENV to a control current, IQ, proportional to the inverse of VENV multiplied by the time derivative of VENV, supplying IQ to a circuit node of a low-pass filter having high DC gain, comparing VENV with reference voltage VREF, sourcing current to the circuit node if VENV is less than VREF, sinking current from the circuit node if VENV is greater than VREF, using the voltage at the circuit node as the VCO control voltage, VCON, and providing VCON to the VCO to control the VCO output voltage. Converting VENV to IQ includes first converting VENV to a VCO output envelope current, IENV supplying IENV to first and second subcircuits which generate first and second subcircuit drain currents, and subtracting the first subcircuit drain current from the second subcircuit drain current to generate IQ. The first and second subcircuits are identical except that one of the first and second subcircuits has a capacitance current path for its subcircuit drain current. The method uses a capacitor to integrate IQ and the sourced or sunk current to provide VCON.
Another method is provided for stabilizing the amplitude of the output voltage of a VCO. This method includes deriving VENV from the VCO output voltage, converting VENV to a control current, IQ, proportional to the inverse of VENV multiplied by the time derivative of VENV, supplying IQ to a circuit node of a low-pass filter having high DC gain, using the voltage at the circuit node as the VCO control voltage, VCON, and providing VCON to the VCO to control the VCO output voltage.
Another method is provided for tuning the loss of a slave filter in a VCO master-slave tuning system, in which the system includes a VCO that provides an output voltage. This method derives from the VCO output voltage a VCO output envelope voltage, VENV, tunes the loss of the VCO close to zero by converting VENV to a control current, IQ, proportional to the inverse of VENV multiplied by the time derivative of VENV, and constraining the amplitude of the VCO output voltage by supplying IQ to a circuit node of a low-pass filter having high DC gain, comparing VENV with reference voltage VREF, sourcing current to the circuit node if VENV is less than VREF, sinking current from the circuit node if VENV is greater than VREF, using the voltage at the circuit node as the VCO control voltage, VCON, and providing VCON to the VCO to control the VCO output voltage. Converting VENV to IQ includes first converting VENV to a VCO output envelope current, IENV, supplying IENV to first and second subcircuits which generate first and second subcircuit drain currents, and subtracting the first subcircuit drain current from the second subcircuit drain current to generate IQ. The first and second subcircuits are identical except that one of the first and second subcircuits has a capacitance current path for its subcircuit drain current.
The present invention provides various technical advantages. As used in a filter tuning system, one technical advantage is that the VCO loss can be precisely controlled and VCO output amplitude can be accurately regulated. These features ensure good matching between the master VCO and the slave filter. Another technical advantage is controlling the Q of the VCO by generating a control current that is proportional to the inverse of the VCO envelope voltage multiplied by the time derivative of that voltage. Then, the VCO envelope voltage can be controlled by controlling the VCO control voltage, VCON, which is derived by sourcing or sinking a small current that is added to the control current, and the sum current is integrated by a capacitor to yield VCON. A steady-state limit cycle of the VCO output voltage can then be generated within a narrow, defined range.
BRIEF DESCRIPTION OF THE DRAWINGS
For a more complete understanding of the present invention and the advantages thereof, reference is now made to the following detailed description taken in conjunction with the accompanying drawings, wherein like reference numerals represent like parts or components, in which:
FIG. 1 is a block diagram of a VCO master-slave tuning system into which the present invention may be incorporated;
FIG. 2A is a block diagram of a prior art loss control loop circuit with amplitude regulation;
FIG. 2B is a schematic diagram of a low-frequency breadboard realization of the prior art loss control loop circuit of FIG. 2A;
FIG. 2C illustrates the VCO output voltage and the VCO control voltage using the breadboard realization of the prior art loss control loop circuit of FIGS. 2A and 2B;
FIG. 3A is a schematic diagram of a current-mode circuit used in an embodiment of the loss control loop circuit of the present invention;
FIG. 3B is a schematic diagram of an embodiment of a transconductor that may be used in the current-mode circuit of FIG. 3A;
FIG. 4 is a block diagram of an embodiment of the loss control loop circuit of the present invention without amplitude regulation;
FIG. 5 is a block diagram of the loss control loop circuit of the present invention including amplitude regulation;
FIG. 6A is a block diagram of an embodiment of the loss control loop circuit of FIG. 5;
FIG. 6B is a schematic diagram of an embodiment of a charge pump that may be used in the loss control loop circuit of FIG. 6A;
FIG. 7 illustrates the VCO output voltage and the VCO control voltage using the embodiment of the present invention of FIGS. 6A and 6B;
FIGS. 8A and 8B are schematic diagrams of negative conductance circuits that may be used in a high-frequency embodiment of the present invention; and
FIG. 8C is a schematic diagram of a charge pump that may be used in a high-frequency embodiment of the present invention.
DETAILED DESCRIPTION
The present invention provides a loss control loop circuit made up of VCO 110 and Q-control circuit 130 of FIG. 1. This loss control loop circuit controls the Q of VCO 110 while regulating the amplitude of the output of the VCO. In the prior art loss control loop circuit in FIG. 2A, which includes VCO 210, rectifier 220, voltage adder 230, and a circuit 240 having transfer function H(s), the VCO output envelope voltage (low-pass-filtered output of rectifier 220) is measured in an attempt to control the Q of the VCO tank circuit. But the relation between the envelope voltage, VENV, and Q is weak--setting the value of Q equal to infinity does not uniquely set the value of VENV, and therefore VENV cannot be used as a measurement of Q. The circuit is thus not able to adequately control the VCO output, as shown in FIG. 2C. The loss control loop circuit of the present invention uses a much better Q measurement. A current-mode circuit based on this Q measurement controls the Q of tuned system 10, and an amplitude regulator, consisting of a voltage difference detector and a charge pump, regulates the amplitude of the VCO output. The sum of the currents generated by the current-mode circuit and the amplitude regulator is integrated by a low-pass filter having high DC gain. By properly choosing the value of a capacitor in the current-mode circuit, the current sources in the charge pump, and the frequency response of the low-pass filter, VENV and the VCO control voltage, VCON, can both be kept within narrow limits in the steady state. VCON is then able to be averaged or sampled and held in order to control the frequency of tuned filter 100. The Q measurement method is first described, followed by a method of determining the system parameters.
The envelope voltage, VENV, can be approximated by ##EQU5## where VO represents the initial condition of VENV and (ωo and Q were earlier defined in terms of L, C, GL, and GN of VCO 210. To extract information about Q from VENV, the function ##EQU6## is formed. Using Equation (1), ##EQU7## Examination of Equation 2 shows that the function ##EQU8## has a unique relation to Q. This function can be conveniently implemented by current-mode circuit 300, illustrated in FIG. 3A, which is based on a circuit found in J. Mulder et al., "A Syllabic Companding Translinear Filter," Proceedings ISCAS '97, pp. 101-104.
Current-mode circuit 300 includes transconductor 310, current adder 320, identical NPN bipolar transistors Q1 and Q2, identical n-channel MOSFETs M1 and M2, identical n-channel MOSFETs M3 and M4 forming DC current sources I0 controlled by Vbias n1, frequency compensation capacitors C1 and C2, and capacitor Cx. VENV is provided to transconductor 310, a voltage-to-current converter, which outputs two equal currents IENV. One realization of transconductor 310 is shown in FIG. 3B. This transconductor uses NPN bipolar transistors Q3, Q4, Q5, Q6, a MOSFET current source M15 controlled by bias voltage Vbias n2, and a high-swing current mirror made of six p-channel MOSFETs M9 -M14 and controlled by Vbias p2. The value of Vbias p2 is such that M9, M10, and M11 operate at the edge of the saturation region. Current-mode circuit 300 is made of two nearly identical subcircuits 311 and 312, each of which includes one of the two NPN bipolar transistors Q1, Q2, two of the n-channel MOSFETs M1 and M3, M2 and M4, and one of the frequency compensation capacitors C1, C2. The difference between the subcircuits is that subcircuit 311 also includes capacitor Cx through which a current Ix flows. Subcircuits 311 and 312 respectively generate I1 and I2, the drain currents of MOSFETs M1 and M2, respectively, both of which are provided to current adder 320. Current adder 320 is a current mirror which includes four p-channel MOSFETs, M5 -M8. The sources of M7 and M8 are connected to supply voltage Vdd, typically 3V. The drains of M7 and M8 are respectively connected to the sources of M5 and M6. The gates of M7 and M8 are coupled together and to the drains of M6 and M2. The gates of M5 and M6 are coupled together and to a bias voltage Vbias p1 which is used in a high-swing current mirror biasing scheme. Like Vbias p2 the value of Vbias p1 is chosen so that M7 and M8 operate at the edge of the saturation region. The drain of M5 is connected to the drain of M1, from which the output current, IQ, is taken. IQ of current-mode circuit 300 is the difference between I2 and I1.
These two currents, I1 and I2, are generated as follows. In each subcircuit, IENV is provided to the collector of bipolar transistor Q1 or Q2, whose emitter is coupled to ground. The gate of MOSFET M1 or M2 is coupled to the collector of one of the bipolar transistors. The source of MOSFET M1 or M2 is coupled to the base of bipolar transistor Q1 or Q2, respectively, from which the DC current source I0 is provided to ground. The frequency compensation capacitors C1 and C2 have the same value and are connected between the gate and source of MOSFET M1 and M2, respectively. These capacitors are adjusted to reduce the ringing of I1 and I2. The drain of MOSFET M1 or M2 is connected to current adder 320. According to Mulder et al., the current Ix through Cx is equal to ##EQU9## where VT is the bipolar transistor thermal voltage ##EQU10## From equation (2), ##EQU11## Because IQ =I2 -I1, and the only difference between the two subcircuits is the current Ix, ##EQU12## As realized, current-mode circuit 300 also compensates for finite beta effect.
Referring to FIGS. 4 and 2A, the loss control loop circuit of FIG. 2A can be modified to include current-mode circuit 300 of FIG. 3A. An envelope detector 420 replaces rectifier 220, circuit 240 is replaced by low-pass, high DC gain filter 440, and current-mode circuit 300 is placed between envelope detector 420 and low-pass filter 440. The resulting loss control loop circuit controls Q, and thus equivalently controls the function ##EQU13## but it does not control VENV itself. When the loop in FIG. 4 makes Q infinite, Equation (2) shows that ##EQU14## independent of the value of VENV (assuming VENV ≠0). Thus the value of VENV is not controllable using the circuit of FIG. 4.
In order to control VENV, the loop circuit of FIG. 4 can be modified as shown in FIG. 5. An amplitude regulator 500 can be placed in parallel with current-mode circuit 300 of FIG. 3A, i.e. between envelope detector 420 and low-pass, high DC gain filter 440. A preferred embodiment is shown in FIG. 6A, in which amplitude regulator 500 consists of a voltage difference detector 510 and a charge pump 520. Voltage difference detector 510 includes two comparators 514, 518, arranged to output "up" and "down" signals U, D to charge pump 520, which includes two DC current sources I3,I4 and two CMOS switches S1, S2. Each CMOS switch S1, S2 includes an n-channel MOSFET, into which the U or D signal is provided, and a p-channel MOSFET, into which the inverse U or D signal is provided. One type of charge pump 520 is pictured in FIG. 6B. In that figure, current source I3 is made of two PNP bipolar transistors Q7, Q8 connected in series between Vdd and switch S1. Analogously, current source I4 is made of two NPN bipolar transistors Q9, Q10 connected in series between switch S2 and ground. The bases of the four bipolar transistors Q7, Q8, Q9, Q10 of the charge pump shown in FIG. 6B are controlled by four bias voltages Vbias p3, Vbias p4, Vbias n3, Vbias n4, whose values are chosen based on the values chosen for I3 and I4, as will be shown later. In order to have high DC gain, low-pass filter 440 can be realized as an integrator, which ideally has infinite gain at DC. A simple, one-pole integrator is shown in FIGS. 6A and 6B as an integrating capacitor, CINT. When Q is infinite, making IQ =0, if VREF >VENV, the output U of comparator 514 goes high sending a signal to charge pump 520 to connect I3 to the output of amplitude regulator 500, which charges CINT, increasing VCON. This increases GN, thus increasing VENV, as seen in the latter part of Equation (1). Conversely, if VREF <VENV, the output D of comparator 518 goes high sending a signal to charge pump 520 to connect 14 to the output of amplitude regulator 500, which discharges CINT, decreasing VCON and decreasing GN, thus decreasing VENV.
This amplitude control scheme causes the loop to be unstable, generating a limit cycle in the steady state. However, by properly choosing the values of I3, I4, Cx, and CINT, both VENV and VCON can be kept within narrow, desired limits in the steady state. The desired limit for VENV is where the negative conductance GN operates in its linear region. The desired limit for VCON is where the Q of each of the coupled resonators in tuned filter 100, which is equal to the Q of VCO 110, will be large enough to have little effect on the frequency response of tuned filter 100. The value of VCON can now be either averaged or sampled and held in order to control the frequency of tuned filter 100.
FIG. 7 shows the results of a breadboard circuit realization of the loss control loop circuit of FIG. 6A. VCO 210 of FIG. 6A is realized as the same circuit as VCO 250 in FIG. 2B, with a differential LC-tank circuit having a Q purposefully reduced to about 10, and the circuit has an oscillation frequency of 3 MHz. VREF is again set to be ˜0.1V. However, unlike the prior art circuit results shown in FIG. 2C, the peak-to-peak envelope amplitude of the output of the VCO is nearly constant around 160 mV. Similarly, the peak-to-peak excursion of VCON in the loss control loop of the present invention is only about 16 mV as compared to about 22 mV in the prior art. The fundamental frequency of the VCO control voltage is on the order of 8 kHz.
The present invention is preferably used in circuits that operate in the GHz range, rather than the low-MHz range described above. In this region, the circuits of FIGS. 8A-8C can be used. FIGS. 8A and 8B are schematic diagrams of examples of negative conductance circuits 260 that may be used in a high-frequency embodiment of the present invention. Many different negative conductance circuits that can be used at high frequencies will be known to those skilled in the art. The choice of the actual components is based on the technology used and the parasitics associated with the technology. The structure of the negative conductance circuit is not as important for choosing loop design parameters as the relationship between GN and VCON. The circuit of FIG. 8A is similar to negative conductance circuit 260 (FIG. 2B), but has been modified to achieve better performance and to include biasing. The circuit of FIG. 8B is another example of a negative conductance circuit designed with only resistors and NPN bipolar transistors. FIG. 8C is a schematic diagram of an example of a charge pump 520 that may be used in a high-frequency embodiment of the present invention. As with the charge pump in FIG. 6B, this charge pump uses the both the up and down signals from voltage difference detector 510 as well as the inverse up and down signals.
Next, it will be demonstrated how the values of I3, I4, Cx, and CINT are chosen for a circuit in the GHz-frequency range of interest. Although Q of VCO 210 is intended to be infinite, in practical applications, a Q of only about 20 times as large as the Q of tuned filter 100 is required. For a coupled resonator bandpass filter having a center frequency of 1.8 GHz and a Q of about 15, the minimum acceptable Q of VCO 210 is chosen to be 300. If Q were infinite, IQ would equal zero. However, for a finite Q, IQ is chosen to be large enough to be detected over the offset currents of current-mode circuit 300. Those offset currents can be as large as several microamps, thus, IQ is chosen to be somewhere between 15-25 μA. Cx can be found using Equation (4). Using exemplary values of IQ =20 μA, VT =25.9 mV, and ωo =2πfo =2π(1.8×109) yields Cx =41 pF.
Because the Q-control loop within FIG. 6A is considered the dominant loop over the amplitude regulation loop, parameters are first set to optimize IQ, then they are set to optimize the regulation loop. Thus, I3 and I4 are configured as perturbation currents that move VENV closer to VREF, and are therefore chosen to be less than IQ. Moreover, although I3 and I4 do not have to be equal, it is preferable that they are. Thus, for IQ =20 μA, I3 and I4 are chosen to be 10 μA.
The last value to be chosen is that of CINT. As discussed in the Background section, it is desirable to have one of the frequency and Q-control loops made much slower than the other one, so that the two loops can be considered decoupled. The speed of a linear feedback loop can be measured by the unity gain frequency of its open loop transfer function. The larger the unity gain frequency, the faster the loop. As will be seen below, although the Q-control loop is non-linear, it can be still approximated by a linear loop. In the present invention, the unity gain frequency of the Q-control loop is chosen to be at least ten times that of the frequency control loop. If the frequency control loop is configured as a phase-locked loop (PLL), its unity gain frequency can be typically chosen to be 200-300 times less than the reference frequency, FREF. The value of FREF is normally set by a crystal oscillator, whose preferred value is below 20 MHz. FREF is related to ωo (fo) in that fo is an integral power of 2 multiple of FREF (using a divider in the feedback loop of the PLL). Thus, for fo =1.8 GHz, and using a multiple of 27 =128 to bring FREF below 20 MHz, FREF becomes 14.06 MHz. Choosing the PLL open loop unity gain bandwidth to be 250 times less than FREF results in a unity gain bandwidth of 56.25 kHz. Choosing the unity gain frequency of the Q-control loop to be at least 20 times larger results in a frequency fQ =1.125 MHz.
Choosing CINT requires performing a small-signal analysis. Assume that GN can be approximated by a first-order polynomial function of its control voltage, VCON (i.e. GN =kVCON +GN0, where k and GN0 are constants). Using Equation (4), small-signal current ##EQU15## because GL does not change with VCON. The open-loop transfer function from VCON to iQ in the top of the loop of FIG. 6A is ##EQU16## The transfer function from iQ to VCON in the bottom of the loop of FIG. 6A is ##EQU17## The open loop transfer function becomes ##EQU18## and the unity gain frequency ##EQU19## In this equation C is the value of the capacitor in the LC-tank that is the basis of the VCO. For fo =1.8 GHz, C is chosen to be 1 pF and L is chosen to be 7.8 nH. For k=2×10-3 mho/V, CINT =150 pF.
The response of the system operated in the preferred frequency range yields similar results as those shown in FIG. 7, with controlled VCON and output VCO voltage. The only difference is that the fundamental frequency of the control voltage, VCON, is approximately three orders of magnitude faster than that shown in FIG. 7, i.e. approximately 5-10 MHz. The prior art circuit, which was not able to operate on a breadboard at 3 MHz, is also not able to operate at 1.8 GHz.
Thus, although the prior art loss control loop circuit may provide useful Q-control voltage, it does not provide effective amplitude regulation, which is crucial for the accuracy of frequency tuning. The loss control loop circuit of the present invention solves this problem and provides better frequency tuning matching by averaging or sampling and holding VCON.
Although the preferred embodiment of the loss control loop circuit is detailed herein, the invention is not limited to this preferred embodiment. Other types of current-mode circuits may be used, so long as they output a current which is proportional to ##EQU20## Other amplitude regulation schemes and other schemes for comparing VENV and VREF to derive amplitude regulation sourcing and sinking currents to be integrated by CINT may be used, as well as other charge pumps. The values of the parameters and components of the preferred embodiment, including the center frequency and Q, are also not fixed, but may be varied based on the IC technology used, available component values, component tolerances, and the preferences of the circuit designer.
While several embodiments have been illustrated and described, other variations and alternate embodiments will occur to those skilled in the art without departing from the spirit and scope of this invention, as defined by the appended claims.