US5371890A - Problem state cross-memory communication using communication memory domains - Google Patents

Problem state cross-memory communication using communication memory domains Download PDF

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Publication number
US5371890A
US5371890A US07/785,135 US78513591A US5371890A US 5371890 A US5371890 A US 5371890A US 78513591 A US78513591 A US 78513591A US 5371890 A US5371890 A US 5371890A
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memory
communication
application
application program
domain
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US07/785,135
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Gerald P. Bozman
John A. Pershing, Jr.
Joann Ruvolo-Chong
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International Business Machines Corp
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International Business Machines Corp
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Assigned to INTERNATIONAL BUSINESS MACHINES CORPORATION A CORP. OF NEW YORK reassignment INTERNATIONAL BUSINESS MACHINES CORPORATION A CORP. OF NEW YORK ASSIGNMENT OF ASSIGNORS INTEREST. Assignors: BOZMAN, GERALD P., PERSHING, JOHN A., JR., RUVOLO-CHONG, JOANN
Priority to JP4239650A priority patent/JP2501727B2/ja
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/543—User-generated data transfer, e.g. clipboards, dynamic data exchange [DDE], object linking and embedding [OLE]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54508—Configuration, initialisation
    • H04Q3/54533—Configuration data, translation, passwords, databases
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54575—Software application
    • H04Q3/54583—Software development, e.g. procedural, object oriented, software generation, software testing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13057—Object-oriented software

Definitions

  • This invention relates to a method and apparatus for providing cross memory communications between application programs in disjoint communication memory domains on either a set of disjoint computer systems coupled via cross-memory communication operations, or on a single computer system coupled with cross application domain operations.
  • a common architecture is the interconnection of a cluster of disjoint, distributed memory computers by providing inter-system signalling and inter-system memory read and write operations or their equivalent, or by providing more sophisticated operations that, for example, manipulate a named queue of memory elements on a separate system.
  • Another common architecture is for the distributed memory system to share a single common store that they manipulate via these types of operations.
  • the inter-system operations are typically designed to run in a privileged machine state (e.g., supervisor state in the 370) in order to prohibit unauthorized use whereas the operating system typically dispatches application processes in an unprivileged state (e.g., problem state on the 370). Therefore, a call to the operating system is required for these inter-system operations and this can easily increase their overhead (measured in machine cycles) by an order of magnitude due to the overhead involved in changing from problem state to supervisor state and then back to problem state. In addition to the overhead of saving and restoring the execution environment, the path through the operating system dispatcher can be significant.
  • an efficient implementation can have instruction path lengths on each system of 2500 or more instructions for sending even small messages.
  • An alert signal to a remote application takes the form of a message to the dispatcher in the remote system and is approximately the same overhead. Message-passing overhead of this magnitude severely limits the type of applications that can be efficiently executed on the parallel system.
  • unprivileged execution is allowed, then an erroneous or malicious application can see and alter memory contents to which it is not authorized.
  • Single systems that manifest a distributed memory view to applications also suffer from the same set of problems and can also benefit from this invention if they have a set of cross application domain communications operations (e.g., IUCV on VM/ESA) that either are or can be implemented in microcode.
  • applications e.g., MVS, VM/ESA
  • cross application domain communications operations e.g., IUCV on VM/ESA
  • U.S. Pat. No. 4,500,960 to Babecki et al discloses a multi-processor system wherein each processor supports a plurality of processors which communicate with each other via communication links.
  • U.S. Pat. No. 4,530,051 to Johnson et al discloses a telecommunication switching system covering remote procedure call and interprocessor message semantics used by the switching system.
  • U.S. Pat. No. 4,530,052 to King et al discloses a hardware means of allowing multiple operating systems to time muliplex a computer. This patent describes a means for segregating memory, control store and I/O. This patent appeared to be the Honeywell patent that is a precursor of U.S. Pat. No. 4,493,034.
  • U.S. Pat. No. 4,694,396 to Weisshaar et al discloses a network interface module in a distributed data processing system.
  • This network interface module uses addressing modes which facilitate message transmission between processors resident on different cells in a network.
  • Each cell is capable of conducting data processing operations independently of the other cells.
  • U.S. Pat. No. 4,851,988 to Trottier et al discloses data structures ("mailboxes") by which a process may receive an inter-process message from another process.
  • a process may have many mailboxes, but each mailbox belongs to only one process and has a unique mailbox identifier.
  • U.S. Pat. No. 4,837,674 to Takane et al discloses a circuit arrangement whereby an I/O interrupt intended for a specified virtual machine is redirected if delivered to another virtual machine.
  • Each node e.g., processor(s) and memory
  • This operating system may be different in each node or be a different instance of the same operating system.
  • Cross-memory communications refers to the execution of instructions from one application program using the communications memory domain of another application program.
  • instruction and “operation” are used interchangeably in this application.
  • this invention provides a method and apparatus for cross memory communication between at least two application programs running on two different nodes of a distributed system or in different application domains on a single system.
  • This cross memory communication is provided by having the operating system(s) store a table indicating which cross-memory operations and which portions of memory constitute the communication memory domain that may be used by the applications programs.
  • An application program may then only cross communicate with another application program of its own or another operating system if the table of its own or the other operating system indicates that the application may execute the cross-memory operation and use the communication memory domain of the other application.
  • the use of the above table eliminates the need for privileged state execution of cross-memory communication instructions.
  • the microcode implementing the communication operations then uses the information in the table to allow or disallow the execution of the operation.
  • FIG. 1A illustrates a distributed memory system connected via a matrix switch so that any system can read or write data from/to a peer via direct memory access operations.
  • FIG. 1B illustrates a distributed memory system with one common shared memory.
  • FIG. 1C illustrates a single system with separate application domains.
  • FIGS. 2 to 5 are detailed flow diagrams that describe the four major functions of the invention.
  • FIG. 2B comprising 2 and 2A, describes the initialization process where the peer operating systems satisfy the applications requests to use problem-state communication.
  • FIG. 3 describes the problem-state execution once the communications environment is initialized.
  • FIG. 4 describes how the operating system of the target dispatches a target application.
  • FIG. 5 describes how the peer operating systems terminate an applications session.
  • FIG. 6 illustrates the tables that support safe execution in a problem-state environment.
  • FIG. 1A shows a crosspoint switch 10 interconnecting four computer systems 15.
  • the invention can be also be implemented in a distributed system with a separate shared memory 20 and operations that move data in and out of the shared memory (FIG. 1B) or on a single system 35 with operations that communicate across application domains 30 (FIG. 1C).
  • this embodiment assumes a simple cross-memory read and write operation, the invention can be implemented with more complex operations (e.g., operations that queue and dequeue elements in a disjoint shared memory).
  • the queues that are assigned or dedicated to an application program can also be referred to as a communication memory domain.
  • Safe low-overhead problem-state cross-memory communication is implemented by peer operating systems (e.g., the CP component of VM/ESA) and the microcode implementing the inter-system operations (in this embodiment, read and write).
  • Problem-state communication is used by peer applications (e.g., virtual machines in VM). Applications communicate with their local operating system via a standard facility (e.g., diagnose in VM). Peer applications register their intention to use problem-state communication with their local operating system. An application then requests its local operating system to couple it to a peer application. The applications are now engaged in a communication session.
  • the microcode verifies the problem-state cross-memory operations used by the applications and implements them in its normal path (non problem-state) if they are deemed safe.
  • a cross-memory write is used to indicate in the remote process control block that the process (application) should be alerted about the arrival of a message.
  • a process control block is the software structure used by the operating system to control an application's state (e.g., in VM/ESA the VMDBK). When a session is broken the peer operating systems clean up the tables built during the registration and couple process.
  • FIG. 2 describes the initialization function of the invention.
  • An application wishing to set up problem-state communication with a peer must first communicate with that peer through a standard communications facility (e.g., APPC in IBM systems) to agree upon the creation of a session (step 100).
  • a standard communications facility e.g., APPC in IBM systems
  • Each application then registers with its local operating system (step 110), via a diagnose instruction, providing its set of buffer addresses and lengths, the operation(s) permitted on these buffers (e.g., read or write or both) and the identity of its peer (i.e., application-id and system-id).
  • a diagnose instruction providing its set of buffer addresses and lengths, the operation(s) permitted on these buffers (e.g., read or write or both) and the identity of its peer (i.e., application-id and system-id).
  • step 120 If this is the first instance of the application communicating with a remote peer (step 120) and if the application is authorized to use problem-state cross-memory operations (step 130), its operating system builds a system table for that application (step 150) and places its address in a protected location available to both the operating system and microcode (e.g., a control register in a 370) (step 160). A null address in this protected location indicates that the application is not authorized for problem state execution of cross-system communication operations. If at step 130, the application is not authorized then an error indication is returned (step 140).
  • step 180 If the application has not previously established communications with the target system (step 170), an application table is built (step 180) and its address is stored in the system table (step 190). If the application has previously established communications with the target system but not with that application an entry is added to the application table (step 200).
  • the operating system then pins (i.e., makes non-pageable) the set of pages corresponding to the area(s) specified by the application on its registration request (step 210) and creates a domain sub-table containing the logical address and its corresponding real address and size in granules appropriate to the interface and the operations permitted on each memory area (step 220). This domain sub-table will later be sent to the target operating system.
  • the operating system Once the operating system returns control to the applications, they exchange their sets of logical logical addresses and lengths and the operations that are permitted on each memory area. (step 230).
  • the applications After the applications register and exchange addresses, one of them must issue a couple call to its operating system, again via a diagnose instruction, specifying the peer (step 240).
  • the operating systems then communicate via normal communications facilities to verify that each application has registered (step 250). If not, the couple request is rejected (step 260). If so, the domain sub-tables are exchanged (step 270).
  • the application table entries for the remote peers are updated to point to the domain sub-table (step 280).
  • FIG. 3 describes the problem-state execution function of the invention.
  • step 400 the microcode determines if the operation was issued in problem-state (step 410). If not, the normal instruction path is followed (step 480). If the operation is problem-state and if the application does not have a system table (step 420), a privileged operation exception to the application is issued (step 430). If application does have a system table but there is no application table for the target system (step 440), a privileged operation exception is issued (step 430).
  • step 450 If there is an entry for the target application but the target area was not found in the domain sub-table (step 450), an addressing exception is issued (step 470). If there is an entry for the target system but the operation is not permitted (step 460), a privileged operation exception is issued (step 430). If the target area is within the domain sub-table, then the problem-state cross-memory operation has been deemed safe and the operation is executed (step 480).
  • FIG. 4 describes the dispatching function of the invention.
  • a dispatcher can be implemented so that it never enters an enabled wait state but rather continually scans the state of its active processes while enabled for interrupts: busy wait (e.g., as in VM/ESA).
  • the dispatcher can be modified to also look at adjunct state information in the form of process control blocks defined in the application tables (step 600).
  • Authorized applications on other systems can optionally set the unit of storage associated with the process control block on the target to its on value to "wake up" its peer.
  • the adjunct area is cleared (i.e., deactivated (step 640)), and an alert (e.g., a virtual external interrupt in VM) is indicated to be pending for the corresponding application (step 650).
  • This alert has a special external interrupt code to indicate that it was caused by a communicating peer and, optionally, a code defining the application-id and system-id of the originating application. Since this pending alert will of necessity remove the system from an idle state normal dispatching activity is then done at step 630 (in this case the dispatching of the application with an external interrupt). If at step 610 no areas are activated then a test is made of the system state at step 620. If the system is idle step 600 is reentered, otherwise normal dispatching activity is done at step 630.
  • FIG. 5 describes the termination function of the invention.
  • Normal termination is accomplished by peer applications notifying their respective operating systems of termination of a session with a specified peer (step 700).
  • Abnormal termination occurs when an application terminates without notifying the operating system of its intention to end active communication sessions (step 710).
  • the operating system then communicates with the peer operating system to coordinate the unpinning of buffer pages (step 720) and the updating of the appropriate tables.
  • the domain sub-table is deleted (step 730).
  • the entry for the peer application is deleted from the application table (step 740). If the application table has no more entries (step 750) the application table is deleted (step 760), and its address is deleted from the system table (step 770).
  • step 800 Another type of abnormal termination occurs when it is discovered that a peer is no longer active (step 800). In this case the storage associated with that system must not be used for other purposes until communication is reestablished (step 810).
  • the three application communications tables are the system table (900), the application table (902), and the domain sub-tables (904 and 916).
  • the system table (900) has a vector (906) or a null pointer 909 for each system in the cluster in order of their address.
  • the table is for a distributed memory system with 32 systems. For the application associated with this table, communication is permitted only with system 3.
  • the null pointer, in the system table, for the other systems indicates that there is no coupling with them by this application.
  • the vector for each coupled system points to a table containing information specific to target applications (902).
  • the first word of each application table contains the number of entries contained in that table (908). Each entry includes the application name (910) and the address of a small unit of storage associated with the process control block of each application (e.g., in VM/ESA the VMDBK) (912).
  • the application associated with this table has a session established with application A and B on system 3.
  • the application table also has a pointer (914) to the domain sub-table for each target application (904, 916).
  • the domain sub-table contains the buffer areas (918, 920, 922) of application A and B and the cross-memory operations allowed (924) on those buffer areas. Specifically, the buffer areas are defined by the logical addresses (918) and its corresponding real addresses (920) and size of each area (922).
  • a disjoint shared-memory environment can be supported by specifying the appropriate operations and communication memory domain in the application communications tables. For example, if the shared memory consisted of application message queues, then the operation allowed for an application's inbound message queue would typically be dequeue, while applications sending messages to another application would be permitted to enqueue.
  • the communication memory domain would represent the appropriate message queue. To the extent that the operating systems have independent access to authorization information then they would have no need to communicate in this environment and can independently set up the appropriate application communications tables.

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Cited By (12)

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WO1996031079A1 (de) * 1995-03-27 1996-10-03 Austel Licensing Gmbh Verfahren zum betrieb einer vermittlungsanlage und erweiterbares digitales schaltsystem zur durchführung des verfahrens
US5640591A (en) * 1995-05-15 1997-06-17 Nvidia Corporation Method and apparatus for naming input/output devices in a computer system
US6222529B1 (en) 1999-05-05 2001-04-24 Shareware, Inc. Method and apparatus for providing multiple sessions on a single user operating system
US20100162271A1 (en) * 2008-12-23 2010-06-24 International Business Machines Corporation Management of Process-to-Process Intra-Cluster Communication Requests
US20100161704A1 (en) * 2008-12-23 2010-06-24 International Business Machines Corporation Management of Process-to-Process Inter-Cluster Communication Requests
US20100162272A1 (en) * 2008-12-23 2010-06-24 International Business Machines Corporation Management of Application to I/O Device Communication Requests Between Data Processing Systems
US20100161705A1 (en) * 2008-12-23 2010-06-24 International Business Machines Corporation Management of Application to Application Communication Requests Between Data Processing Systems
US8225053B1 (en) * 2007-09-29 2012-07-17 Symantec Corporation Method and apparatus for mitigating performance impact of background processing on interactive application
US8499029B1 (en) 2008-12-23 2013-07-30 International Business Machines Corporation Management of process-to-process communication requests
GB2507339A (en) * 2012-10-29 2014-04-30 Ibm Accessing privileged objects in a server by means of semi privileged instruction
US20160034411A1 (en) * 2014-08-04 2016-02-04 Qualcomm Innovation Center, Inc. Subsystem Peripheral Ownership Scheduling and Reconfiguration for Highly Integrated System on Chips
US10191911B2 (en) * 2017-05-27 2019-01-29 Plesk International Gmbh Permanent website hosting on mobile devices

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Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996031079A1 (de) * 1995-03-27 1996-10-03 Austel Licensing Gmbh Verfahren zum betrieb einer vermittlungsanlage und erweiterbares digitales schaltsystem zur durchführung des verfahrens
US5640591A (en) * 1995-05-15 1997-06-17 Nvidia Corporation Method and apparatus for naming input/output devices in a computer system
US6222529B1 (en) 1999-05-05 2001-04-24 Shareware, Inc. Method and apparatus for providing multiple sessions on a single user operating system
US8225053B1 (en) * 2007-09-29 2012-07-17 Symantec Corporation Method and apparatus for mitigating performance impact of background processing on interactive application
US8769220B1 (en) 2007-09-29 2014-07-01 Symantec Corporation Method and apparatus for mitigating performance impact of background processing on interactive applications
US8521895B2 (en) * 2008-12-23 2013-08-27 International Business Machines Corporation Management of application to application communication requests between data processing systems
US9098354B2 (en) 2008-12-23 2015-08-04 International Business Machines Corporation Management of application to I/O device communication requests between data processing systems
US20100162272A1 (en) * 2008-12-23 2010-06-24 International Business Machines Corporation Management of Application to I/O Device Communication Requests Between Data Processing Systems
US8370855B2 (en) 2008-12-23 2013-02-05 International Business Machines Corporation Management of process-to-process intra-cluster communication requests
US8499029B1 (en) 2008-12-23 2013-07-30 International Business Machines Corporation Management of process-to-process communication requests
US20100161704A1 (en) * 2008-12-23 2010-06-24 International Business Machines Corporation Management of Process-to-Process Inter-Cluster Communication Requests
US8560594B2 (en) 2008-12-23 2013-10-15 International Business Machines Corporation Management of process-to-process communication requests
US20100161705A1 (en) * 2008-12-23 2010-06-24 International Business Machines Corporation Management of Application to Application Communication Requests Between Data Processing Systems
US20100162271A1 (en) * 2008-12-23 2010-06-24 International Business Machines Corporation Management of Process-to-Process Intra-Cluster Communication Requests
US9009214B2 (en) 2008-12-23 2015-04-14 International Business Machines Corporation Management of process-to-process inter-cluster communication requests
GB2507339A (en) * 2012-10-29 2014-04-30 Ibm Accessing privileged objects in a server by means of semi privileged instruction
US9230110B2 (en) 2012-10-29 2016-01-05 International Business Machines Corporation Accessing privileged objects in a server environment
US9769175B2 (en) 2012-10-29 2017-09-19 International Business Machines Corporation Accessing privileged objects in a server environment
US20160034411A1 (en) * 2014-08-04 2016-02-04 Qualcomm Innovation Center, Inc. Subsystem Peripheral Ownership Scheduling and Reconfiguration for Highly Integrated System on Chips
US10191911B2 (en) * 2017-05-27 2019-01-29 Plesk International Gmbh Permanent website hosting on mobile devices

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