US4710823A - Density conversion in image reproduction - Google Patents

Density conversion in image reproduction Download PDF

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Publication number
US4710823A
US4710823A US06/731,514 US73151485A US4710823A US 4710823 A US4710823 A US 4710823A US 73151485 A US73151485 A US 73151485A US 4710823 A US4710823 A US 4710823A
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image data
pixels
scanning
data
sub
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English (en)
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Yoshihiro Kitazawa
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Dainippon Screen Manufacturing Co Ltd
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Dainippon Screen Manufacturing Co Ltd
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Assigned to DAINIPPON SCREEN MFG. CO., LTD. reassignment DAINIPPON SCREEN MFG. CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST. Assignors: KITAZAWA, YOSHIHIRO
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/40—Picture signal circuits
    • H04N1/40068—Modification of image resolution, i.e. determining the values of picture elements at new relative positions

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  • the present invention relates to a density conversion apparatus and process in electronic image reproduction.
  • FIG. 9 In order to carry out such a density conversion process, there exists a method as shown in FIG. 9 by which every several pixels (marked by circles) of all the input pixels in the main and the sub-scanning directions (refer to FIG. 9(a)) are picked up to be used for recording a reproduction image as shown in FIG. 9(b). This assumes that all the pixels picked up in the input scanning process are utilized for recording. In the particular case of FIG. 9, four pixels (circled) out of twenty-five pixels (five pixels by five pixels) are picked up for the recording process.
  • Japanese Patent Laid Open No. 58-215165 provides a method by which a signal indicative of high and low levels for controlling a recording beam is obtained by comparing the average density value of a group of input pixels on each of which appropriate weight coefficients are imposed with a corresponding reference value.
  • Another object of the present invention is to provide a method of and apparatus for converting density free of omission of any rulings or dots.
  • a further object of the present invention is to provide a simple method of and apparatus for carrying out density conversion without averaging weighted image data.
  • image data of a plurality of pixels are first distributed into several groups, and the logical sum of each of the groups is obtained.
  • the image data of each of the pixel groups are obtained by regulating the image data of the scanning lines, shifting the image data in the main scanning direction by the number of the pixels in one scanning line, and then logically summing the image data of each group when the last pixel data of each group are shifted.
  • the pixels of one group can be either a pixel matrix of a composite number of the main and the sub-scanning directions (for instance, one group comprises 2 ⁇ 2 or 3 ⁇ 3 pixels) or be four pixel matrixes distributed from a pixel matrix of 5 ⁇ 5 pixels at a ratio of 3 to 2 of both the directions, i.e., main and sub-scanning directions.
  • the data regulating means is composed of a number of line memories of one fewer than that of the pixels of one pixel group submitted thereto in the sub-scanning direction, and so constructed that the output of each of the line memories is applied to a corresponding succeeding line memory.
  • the image data are shifted in a shifting means by a timing controller.
  • the timing controller comprises a main scanning counter for counting main scanning clock pulses M, a main scanning decoder, a counter for counting sub-scanning clock pulses N, a sub-scanning decoder, and a gate turned on by the output of the above two decoders when the counters sum the data of the main and the sub-scanning directions.
  • both the counters repeatedly count the main scanning direction pulses M and the sub-scanning direction pulses N, respectively.
  • the present invention can also be applied to one direction factor, e.g., main scanning only, of a two-dimensional image reproduction.
  • FIG. 1 is a circuit diagram of an embodiment of the present invention.
  • FIGS. 2(a) and (b) are representations of density conversion by means of the embodiment of FIG. 1.
  • FIG. 3 is a timing chart for the embodiment of FIG. 1.
  • FIG. 4 is a circuit diagram of another embodiment of the present invention.
  • FIGS. 5(a) and (b) are representations of density conversion by means of the embodiment of FIG. 4.
  • FIG. 6 is a timing chart on the embodiment of FIG. 4.
  • FIG. 7 is a circuit for generating a sub-scanning recording control pulse.
  • FIG. 8 is a timing chart for the circuit of FIG. 7.
  • FIGS. 9(a) and (b) are representations of a conventional density conversion method.
  • FIG. 2 shows an embodiment of the present invention, in which an image shown in FIG. 2(a) is reproduced as an image reduced by 4/25 in density, as show in FIG. 2(b). More particularly, 5 (in the main scanning direction) ⁇ 5 (in the sub-scanning direction) pixels of the original of FIG. 2(a), i.e., pixels numbered from 11 to 55, are distributed to four groups of: 3 ⁇ 3 pixels 11, 12, 13, 21, 22, 23, 31, 32 and 33; 3 ⁇ 2 pixels 14, 15, 24, 25, 34 and 35; 2 ⁇ 3 pixels 41, 42, 43, 51, 52 and 53; and 2 ⁇ 2 pixels 44, 45, 54 and 55, and the logical sums of the densities of the pixel groups are applied to produce the image of FIG. 2(b).
  • FIG. 1 shows a block diagram of a circuit for carrying out image reproduction depicted as in FIG. 2.
  • FIG. 3 shows a timing chart thereof, in which the "+" marks shown in signals D OR and D Q indicate logical additions.
  • image data of the first scanning line are applied to a flip-flop circuit 23 -9 which is the first one of the first level of flip-flop circuits 23 -1 to 23 -9 arranged three by three respectively for both the main and the sub-scanning directions.
  • the image data are also applied, synchronized with a main scanning direction clock pulse signal CK m , to certain addresses of a one-line memory 21.
  • image data of the first scanning line are transferred to the one-line memory 21
  • image data of the second scanning line begin to take the place of the image data of the first scanning line that are to be output to the flip-flop circuit 23 -6 (which is the first one of the second level of flip-flop circuits), as well as to certain addresses of a one-line memory 22.
  • image data of the first scanning line are transferred to the one-line memory 22
  • image data of the previous scanning line in certain addresses are output to the flip-flop circuit 23 -3 (the first flip-flop of the third level).
  • the main scanning clock pulse signal CK m is input to a five bit counter 27, the output of which is decoded by a decoder 28.
  • the sub-scanning clock pulse signal CK s is input to another five bit counter 29, having an output decoded by a decoder 30.
  • the output of a terminal "2" of the decoder 28 and the output of a terminal “2" of the decoder 30 are input to NAND-gate 31 a .
  • the output of a terminal "4" of the decoder 28 and the output of a terminal "2" of the decoder 30 are input to a NAND-gate 31 b .
  • the output of the terminal "2" of the decoder 28 and the output of the terminal "4" of the decoder 30 are input to a NAND-gate 31 c .
  • the output of the terminal "4" of the decoder 28 and the output of the terminal "4" of the decoder 30 are input to a NAND-gate 31.sub. d.
  • the NAND-gates 31 a , 31 b , 31 c and 31 d respectively output gate control signals G a , G b , G c and G d when image data of the last pixel of each of said four pixel groups (the pixels 33, 35, 53 or 55 shown in FIG. 2(a)) are input to the flip-flop circuit 23 -9 .
  • the gate control signal G a turns on OR-gates 32 b and 32 d and then the AND-gates 24 a , 24 b , 24 c , 24 d and 24 g to output the logical sum of the image data from all the flip-flop circuits 23 -1 to 23 -9 via the OR-gate 25.
  • the gate control signal G b turns on the OR-gate 32 b and then the AND-gates 24 b and 24 c to output the logical sum of the image data from the flip-flop circuits 23 -2 , 23 -3 23 -5 , 23 -6 , 23 -8 and 23 -9 via the OR-gate 25.
  • the gate control signal G c turns on the OR-gate 32 d and then the AND-gates 24 d and 24 g to output the image data from the flip-flop circuits 23 -4 to 23 -9 via the OR-gate 25.
  • the gate control signal G d is output, the logical sum of the image data from the flip-flop circuits 23 -5 , 23 -6 , 23 -8 and 23 -9 is output via the OR gate 25. Consequently, when the image data of the last pixel of each pixel group are input to the flip-flop circuit 23 -9 , the logical sum of the image data of the corresponding pixels are output via the OR-gate 25 to a flip-flop circuit 26 as a data signal D OR .
  • each of the gate control signals G a , G b , G c and G d opens an OR-gate 33 and a gate 34 to output a clock pulse signal CK 2 .
  • This causes flip-flop circuit 26 to output the data signal D OR as a data signal D Q when the image data of the corresponding last pixel are input to the flip-flop circuit 23 -9 .
  • the data output D Q also becomes "H” when at least one of the image data of the corresponding pixel group is "H” or becomes "L” when all the image data are "L".
  • the grouping of pixel image data can be managed by altering the outputs of the decoders 28 and 30 to be input to the NAND-gates 31 a to 31 d and the arrangement of the OR-gates 32 b and 32 d and the AND-gates 24 a , 24 b , 24 c , 24 d and 24 g .
  • FIG. 5 shows another embodiment of the present invention, in which an image shown in FIG. 5(a) is reproduced as an image as shown in FIG. 5(b) reduced by 2/5 in density in the main scanning direction. Density conversion of the sub-scanning direction factor is described hereinafter.
  • the logical sum of image data of three consecutive pixels 11, 12 and 13 of the first scanning line is output, then the sum of two (three) consecutive pixels 14 and 15 (14, 15 and 16) is output.
  • the logical sum of image data of three consecutive pixels 21, 22 and 23 of the second scanning line is output and the sum of two (three) consecutive pixels 24 and 25 (23, 24 and 25) is output.
  • the logical sum of image data of every three and two (three) pixels of the third and subsequent scanning lines are obtained to reproduce an image, as shown in FIG. 5(b).
  • FIG. 4 is a block chart of a circuit for carrying out image reproduction as depicted in FIG. 5, while FIG. 6 is a timing chart thereof.
  • pixel image data D.sub..0. are input to an AND-gate 11 as well as to a flip-flop circuit 12.
  • the flip-flop circuit 12 receives the image data D.sub..0. synchronized with a clock pulse signal CK 1 , and outputs the same to an OR-gate 14 as image data D 1 synchronized with the next pulse of the clock pulse signal CK 1 .
  • the image data D 1 from the flip-flop circuit 12 are also input to another flip-flop circuit 13, which outputs the same to the OR-gate 14 as image data D 2 synchronized with the second next pulse of the clock pulse signal CK 1 .
  • the clock pulse CK 1 is now input to a five bit counter 15 having an output decoded by a decoder 16.
  • the decoder outputs a gate control signal G 1-1 from a terminal ".0.” and another gate control signal G 1-2 from a terminal " 2".
  • the gate control signal G 1-1 is input to said AND-gate 11 to terminate input of the image data D.sub..0. to the OR-gate 14 every fifth pixel.
  • the gate control signal G 1-2 is input to NAND-gate 19 to form, with the other input G 1-1- thereto, a gate control signal G 2 which is synchronized with the outputs of the terminals ".0.” and "2" of the decoder 16.
  • the control signal G 2 together with an inverted pulse of the clock pulse CK 1 is input to a gate 17 to form a clock pulse signal CK 2 that controls a flip-flop circuit 18.
  • the flip-flop circuit 18 receives image data D 4 from the OR-gate 14 synchronized with the risetime of the clock pulse CK 2 and then outputs the same as image data D 5 . Since there are inputs of the image data D.sub..0., D 1 and D 2 to the OR-gate 14, the image data D 5 comprises the logical sum of the three image data, by which a reproduction image is recorded.
  • the above-mentioned embodiment is based on a manner of picking up image data of the first three pixels and further that of the remaining two pixels out of five, the image data of the subsequent three pixels (for instance, the pixel 14, 15 and 16 of the first scanning line) rather than that of the succeeding two pixels, can be picked up in the second stage, by eliminating the AND-gate 11 from the embodiment of FIG. 4.
  • the following method can be adopted in the sub-scanning direction, in which no density conversion is carried out.
  • image data of five consecutive sub-scanning lines s, t, u, v and w respectively are used for recording sub-recording lines S, T, U, V, and W of two and a half times as wide as the counterpart of the original, when the adjoining two sub-recording lines are partially overlapped by one-half the width of a sub-recording line.
  • the third sub-recording line is recorded using the image data of the third and fourth sub-scanning lines of the original in order not to drop out the image data of all scanning lines.
  • a circuit as shown in FIG. 7 can be adopted, by which a sub-scanning pulse signal CK 4 is generated every second pulse of a normal sub-scanning pulse signal CK 3 except every fourth pulse of the pulse signal CK 3 .
  • the circuit of FIG. 7 is composed of a counter 51 and a gate 52 which produces pulse waveforms, as shown in the timing chart of FIG. 8.
  • the density conversion ratio described as being 2/5, can of course be varied.
  • Density conversion of a positive thin line image (for instance a black ruling line on a white background) is carried out by obtaining the logical sum of each pixel group, while density conversion of a negative thin line image (for instance a white ruling line on a black background) is carried out by taking the logical product of each pixel group,
  • An outline image can be obtained in a combination Exclusive-OR circuit and OR-circuit.
  • An image data obtained directly from an input scanning device or via an image processor can be an input to each of the embodiments of FIGS. 1 and 4.
  • the present invention is suitable for coarse image reproduction in a certain stage of an image reproduction process.
  • the present invention featuring use of AND-gates and OR-gates is less expensive than a circuit for carrying out weighted coefficient averaging of image data.
  • the present invention can also be applied to image reproduction together with magnification conversion.

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Image Processing (AREA)
  • Editing Of Facsimile Originals (AREA)
US06/731,514 1984-06-08 1985-05-07 Density conversion in image reproduction Expired - Fee Related US4710823A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP59-118721 1984-06-08
JP59118721A JPS60261252A (ja) 1984-06-08 1984-06-08 画像信号の密度変換方法

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US (1) US4710823A (enrdf_load_stackoverflow)
JP (1) JPS60261252A (enrdf_load_stackoverflow)
DE (1) DE3517761A1 (enrdf_load_stackoverflow)
GB (1) GB2160057B (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4841377A (en) * 1986-06-14 1989-06-20 Konishiroku Photo Industry Co., Ltd. Continuous image estimation method
US4891692A (en) * 1986-11-13 1990-01-02 Canon Kabushiki Kaisha Color image reading apparatus having variable exposure control
US5153749A (en) * 1988-09-01 1992-10-06 Canon Kabushiki Kaisha Image encoding apparatus
US5438635A (en) * 1988-12-23 1995-08-01 U.S. Philips Corporation Method and apparatus for encoding and storing pixel values and for decoding and reproducing a digitised image

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB8528895D0 (en) * 1985-11-23 1986-01-02 Int Computers Ltd Processing digitised images
JP2523222B2 (ja) * 1989-12-08 1996-08-07 ゼロックス コーポレーション 画像縮小／拡大方法及び装置
US5138458A (en) * 1989-12-22 1992-08-11 Olympus Optical Co., Ltd. Electronic camera apparatus capable of providing wide dynamic range image signal
GB9012601D0 (en) * 1990-06-06 1990-07-25 Poulter Graham Plc Display system and method
WO1992009168A1 (en) * 1990-11-14 1992-05-29 Eastman Kodak Company Image scaling for thermal printers and the like
KR940005247B1 (ko) * 1991-12-07 1994-06-15 삼성전자 주식회사 화상처리 시스템의 해상도 변환방법
US5434953A (en) * 1992-03-20 1995-07-18 Xerox Corporation Use of fast textured reduction for discrimination of document image components
DE10018781A1 (de) * 2000-04-15 2001-10-25 Fresenius Kabi De Gmbh Infusionslösungen des Ciprofloxacins mit verbesserter Lagerfähigkeit

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GB1413340A (en) * 1971-12-10 1975-11-12 Xerox Corp Data compression methods and apparatus
GB1466211A (en) * 1974-01-04 1977-03-02 Cit Alcatel Facsimile system of transmitting a picture
GB1594346A (en) * 1977-07-26 1981-07-30 Micro Consultants Ltd Digital video standards conversion
JPS5757081A (en) * 1980-09-24 1982-04-06 Ricoh Co Ltd Conversion method for picture element density
US4328426A (en) * 1980-08-04 1982-05-04 Xerox Corporation Filter for image pixels
US4366506A (en) * 1978-05-18 1982-12-28 Kabushiki Kaisha Ricoh Picture transfer method and apparatus therefor
DE3225415A1 (de) * 1981-07-07 1983-02-10 Konishiroku Photo Industry Co., Ltd., Tokyo Bildaufzeichnungsverfahren und -vorrichtung
EP0095514A1 (de) * 1982-05-28 1983-12-07 DR.-ING. RUDOLF HELL GmbH Verfahren und Einrichtung zur Reproduktion eines Bildes mit gröberer Auflösung als bei der Bildabtastung
EP0102550A2 (de) * 1982-08-10 1984-03-14 Siemens Aktiengesellschaft Schaltungsanordnung zur Anpassung zweier Bildverarbeitungssysteme unterschiedlicher Auflösung
JPS5986965A (ja) * 1982-11-11 1984-05-19 Matsushita Graphic Commun Syst Inc 画像処理方式
JPS5995768A (ja) * 1982-11-24 1984-06-01 Ricoh Co Ltd 画素密度変換装置
US4551768A (en) * 1982-10-27 1985-11-05 Matsushita Electric Industrial Co., Ltd. Method and apparatus for processing image signal

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JPS5813066A (ja) * 1981-07-17 1983-01-25 Fuji Xerox Co Ltd 画像縮小方式

Patent Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1280152A (en) * 1968-03-29 1972-07-05 Smiths Industries Ltd Improvements in or relating to information transmission systems
GB1413340A (en) * 1971-12-10 1975-11-12 Xerox Corp Data compression methods and apparatus
GB1466211A (en) * 1974-01-04 1977-03-02 Cit Alcatel Facsimile system of transmitting a picture
GB1594346A (en) * 1977-07-26 1981-07-30 Micro Consultants Ltd Digital video standards conversion
US4366506A (en) * 1978-05-18 1982-12-28 Kabushiki Kaisha Ricoh Picture transfer method and apparatus therefor
US4328426A (en) * 1980-08-04 1982-05-04 Xerox Corporation Filter for image pixels
JPS5757081A (en) * 1980-09-24 1982-04-06 Ricoh Co Ltd Conversion method for picture element density
US4495522A (en) * 1981-07-07 1985-01-22 Konishiroku Photo Industry Co., Ltd. Recording apparatus and method of picture image
DE3225415A1 (de) * 1981-07-07 1983-02-10 Konishiroku Photo Industry Co., Ltd., Tokyo Bildaufzeichnungsverfahren und -vorrichtung
EP0095514A1 (de) * 1982-05-28 1983-12-07 DR.-ING. RUDOLF HELL GmbH Verfahren und Einrichtung zur Reproduktion eines Bildes mit gröberer Auflösung als bei der Bildabtastung
US4533942A (en) * 1982-05-28 1985-08-06 Dr. -Ing. Rudolf Hell Gmbh Method and apparatus for reproducing an image which has a coarser resolution than utilized in scanning of the image
EP0102550A2 (de) * 1982-08-10 1984-03-14 Siemens Aktiengesellschaft Schaltungsanordnung zur Anpassung zweier Bildverarbeitungssysteme unterschiedlicher Auflösung
US4533958A (en) * 1982-08-10 1985-08-06 Siemens Aktiengesellschaft Method of transmitting serial data between facsimile equipment and interface performing the same
US4551768A (en) * 1982-10-27 1985-11-05 Matsushita Electric Industrial Co., Ltd. Method and apparatus for processing image signal
JPS5986965A (ja) * 1982-11-11 1984-05-19 Matsushita Graphic Commun Syst Inc 画像処理方式
JPS5995768A (ja) * 1982-11-24 1984-06-01 Ricoh Co Ltd 画素密度変換装置

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4841377A (en) * 1986-06-14 1989-06-20 Konishiroku Photo Industry Co., Ltd. Continuous image estimation method
US4891692A (en) * 1986-11-13 1990-01-02 Canon Kabushiki Kaisha Color image reading apparatus having variable exposure control
US5153749A (en) * 1988-09-01 1992-10-06 Canon Kabushiki Kaisha Image encoding apparatus
US5438635A (en) * 1988-12-23 1995-08-01 U.S. Philips Corporation Method and apparatus for encoding and storing pixel values and for decoding and reproducing a digitised image

Also Published As

Publication number Publication date
DE3517761C2 (enrdf_load_stackoverflow) 1988-09-15
GB8511745D0 (en) 1985-06-19
JPS60261252A (ja) 1985-12-24
DE3517761A1 (de) 1985-12-12
GB2160057A (en) 1985-12-11
GB2160057B (en) 1988-05-11

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