US4694421A - Interface system which selectively provides impedance matching between a host computer and a control circuit - Google Patents

Interface system which selectively provides impedance matching between a host computer and a control circuit Download PDF

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Publication number
US4694421A
US4694421A US06/617,823 US61782384A US4694421A US 4694421 A US4694421 A US 4694421A US 61782384 A US61782384 A US 61782384A US 4694421 A US4694421 A US 4694421A
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Prior art keywords
terminals
terminal
interface system
host computer
elements
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Expired - Lifetime
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US06/617,823
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English (en)
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Tetsu Ogawa
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Canon Electronics Inc
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Canon Electronics Inc
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Assigned to CANON DENSHI KABUSHIKI KAISHA, 1248 OAZA SHIMOKAGEMORI, CHICHIBU-SHI, SAITAMA, reassignment CANON DENSHI KABUSHIKI KAISHA, 1248 OAZA SHIMOKAGEMORI, CHICHIBU-SHI, SAITAMA, ASSIGNMENT OF ASSIGNORS INTEREST. Assignors: OGAWA, TETSU
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/38—Impedance-matching networks

Definitions

  • the present invention relates to an interface system for connecting a control circuit to a host computer system by a plurality of signal lines.
  • FIGS. 1 and 2 a known interface system has a wiring arrangement as shown in FIGS. 1 and 2.
  • FIG. 1 illustrating a radial chain drive system
  • interface circuits 4a-4d are connected to a host computer 1 through individual signal cables 11a-11d which correspond respectively to a set of signals from the host computer 1 to the respective interface circuits.
  • FIG. 2 illustrating a parallel drive system
  • a set of signals from a host computer 1 are supplied commonly through a single signal cable 12 to a plurality of interface circuits 14a-14d, each having a select jumper connector 6 having jumper terminals SELECT 1-SELECT 4, and selectively drive these interfaces in accordance with a selected terminal of SELECT 1-SELECT 4.
  • the interface circuits 14a-14d in FIG. 2, which are driven in a parallel fashion, are shown in more detail in FIG. 3.
  • the interface circuits 14a-14d are generally designated by reference numeral 14, for the sake of simplicity.
  • the output signals from the host computer 21, for example, known outputs such as SELECT 1-SELECT 4, WRITE DATA, WRITE GATE, DIRECTION IN, STEP, MOTOR ON, SIDE SELECT, HEAD LOAD, are respectively connected to signal lines 9a-9k and 9a-9h, through signal lines 13i-13k and 13a-13h and an interface connector 5.
  • the output signals on the signal lines 9a-9h are supplied to a control unit 3 for controlling a magnetic disc unit 20.
  • the output signals SELECT 1-SELECT 4 on the signal lines 9i-9k and 9a are respectively connected to the select terminals SELECT 1-SELECT 4 of the jumper connector 6.
  • each of the interface circuits 14a-14d has a predetermined connection of the terminals by a short-circuiting pin, as shown in FIG. 2. This connection allows the host computer 21 to select any of the interface circuits 14a-14d by the signals SELECT 1-SELECT 4.
  • each of the signal lines 9a-9h is connected one terminal of a resistor element 2a-2h respectively of a terminal resistor array 2.
  • the other terminals of the resistor elements 2a-2h have a common connection to a power source of +5 V, for example. This connection controls the current in an interface buffer of the host computer 21 and provides impedance matching to reduce a reflecting wave in the interface cable 12.
  • the terminal resistor array 2 is connected to only the interface circuit 14d remote from the host computer 21, while the resistor arrays 2 in the remaining interface circuits 14a-14c are removed.
  • resistor elements 2a-2h are used in the circuit arrangement shown in FIG. 3, a signal transmitting through the resistor 2a into the signal line 9a is transmitted into the signal line 9b, since the resistor elements 2a and 2b are connected in series between the signal lines 9a and 9b. Similarly, a signal passing through the signal line 9a also flows through the resistor elements 2a and 2c-2h into the respective signal lines 9c-9h. Therefore, the terminal resistor array 2 must be removed if not necessary, as described above.
  • the interface circuits 14a-14d must be so designed as to facilitate an easy removal of the terminal resistor array 2 therefrom.
  • a manufacture of such an interface system delivers the interface systems having the terminal resistor arrays 2 inserted into the socket of each of the ICs containing the interface circuits.
  • some of the terminal resistor arrays 2 remain inserted into the IC sockets, as in the interface circuit 14d in FIG. 2, and some of the terminal resistor arrays 2 are removed from the sockets, as in the interface circuits 14a-14c.
  • the conventional arrangement needs the IC sockets for detachably connecting the resistor arrays 2.
  • Use of such a socket increases the manufacturing cost. It is required to design the interface systems in such a way that a user can easily remove the terminal resistor array from the socket.
  • an object of the present invention is to provide an interface system which is free from the above problems associated with the connection of the terminal resistor array to the interface circuit.
  • FIG. 2 is a circuit arrangement showing an example of a conventional parallel drive system
  • FIG. 3 is a circuit arrangement showing an example of a conventional interface circuit
  • FIG. 4 is a circuit arrangement showing an embodiment of an interface system according to the present invention.
  • FIG. 5 is a circuit arrangement showing a parallel drive system embodying the interface systems shown in FIG. 4.
  • the interface system has a diode array 7 (a group of diode elements) containing diode elements 7a-7h and a jumper connector 8 for a terminator.
  • the terminals of the resistor elements 2a-2h which are not connected to the signal lines 9a-9h, are respectively connected to the cathodes of the diode elements 7a-7h.
  • the anodes of the diode elements 7a-7h are connected commonly to one terminal 8a of the terminals of the connector 8, of which the other terminal 8b is connected to a power source +5 V.
  • the remaining circuit arrangement of FIG. 4 is the same as the corresponding part of FIG. 3.
  • a pair of the terminals 8a and 8b of the jumper connector 8 are short-circuited by a short-circuiting pin 8c, so that a current flows into the resistor elements 2a-2h from the terminal 8b of the jumper connector 8 connected to the power source via the short-circuiting pin, the terminal 8a, and the respective anodes and cathodes of the diode elements 7a-7h.
  • the short-circuiting pin 8c is removed to open the path between the terminals 8a and 8b.
  • the jumper connector 8 may be replaced by a switch.
  • a signal passing through the signal line 9a is prevented from passing through the signal lines 9b-9h by the diode elements 7a.
  • Signal-flow into the signal lines 9a-9h are also interrupted in a similar way.
  • the drive system does not require the troublesome physical work of installing or removing the terminal resistor array 2 in and from the socket which is essential to the prior art system. That is, for the interface circuits 4a-4c which do not require the terminal resistor arrays 2, the jumper connectors 8 are merely opened. For the interface circuit 4d requiring the terminal resistor array 2, the jumper connector 8 is closed.
  • the present invention merely requires the diode array and the jumper connector or the switch, without an expensive IC connector accompanied by troublesome physical work.
  • the interface system With such advantageous features reduces the manufacturing cost and provides simple and easy use for users.
  • no consideration must be given to the operation of removing the terminal resistor array, because in the interface system, it is not necessary to use a tool for removing the terminal resistor array or a tool for securing a space wide enough to handle the tool.
  • freedom in selecting a place to install the terminal resistor array is increased.
  • flexibility is secured in designing systems using the interface systems.
  • the main planes of the circuit board may be reversed, so that the disc system can have a thinner structure.

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Computer Hardware Design (AREA)
  • Information Transfer Systems (AREA)
  • Dc Digital Transmission (AREA)
  • Details Of Connecting Devices For Male And Female Coupling (AREA)
US06/617,823 1983-06-29 1984-06-05 Interface system which selectively provides impedance matching between a host computer and a control circuit Expired - Lifetime US4694421A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP58-101250 1983-06-29
JP1983101250U JPS6010336U (ja) 1983-06-29 1983-06-29 インタ−フエ−ス回路装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US07/038,708 Continuation US4792920A (en) 1983-06-29 1987-04-15 Interface providing impedance matching by selective connection of a resistor array to a power supply

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US4694421A true US4694421A (en) 1987-09-15

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US06/617,823 Expired - Lifetime US4694421A (en) 1983-06-29 1984-06-05 Interface system which selectively provides impedance matching between a host computer and a control circuit

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US (1) US4694421A (enrdf_load_stackoverflow)
JP (1) JPS6010336U (enrdf_load_stackoverflow)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4792920A (en) * 1983-06-29 1988-12-20 Canon Denshi Kabushiki Kaisha Interface providing impedance matching by selective connection of a resistor array to a power supply
FR2621432A1 (fr) * 1987-10-05 1989-04-07 Gen Electric Circuit de transformation d'impedance pour circuits numeriques paralleles multibits
EP0491179A1 (de) * 1990-12-11 1992-06-24 Bayerische Motoren Werke Aktiengesellschaft Linearer Datenbus
DE4142081A1 (de) * 1990-12-20 1992-07-23 Murata Manufacturing Co Abschlussschaltkreis zum abschluss einer datenbusleitung
US5287007A (en) * 1988-12-24 1994-02-15 Heidelberger Druckmaschinen Ag Device for coupling additional equipment to a machine
US5333177A (en) * 1991-10-19 1994-07-26 Cell Port Labs, Inc. Universal connection for cellular telephone interface
US6330138B1 (en) 1998-06-12 2001-12-11 Samsung Electronics Co., Ltd. Impedance matching circuit

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4084232A (en) * 1977-02-24 1978-04-11 Honeywell Information Systems Inc. Power confidence system
US4155115A (en) * 1977-12-30 1979-05-15 Honeywell Inc. Process control system with analog output control circuit
US4219881A (en) * 1977-12-30 1980-08-26 Honeywell Inc. Digital input control circuit
US4306299A (en) * 1976-06-10 1981-12-15 Pitney-Bowes, Inc. Postage meter having means transferring data from a working memory to a non-volatile memory under low power conditions
US4357598A (en) * 1981-04-09 1982-11-02 Westinghouse Electric Corp. Three-phase power distribution network communication system
US4471348A (en) * 1982-01-15 1984-09-11 The Boeing Company Method and apparatus for simultaneously displaying data indicative of activity levels at multiple digital test points in pseudo real time and historical digital format, and display produced thereby
US4495496A (en) * 1981-12-15 1985-01-22 Johnson Engineering Corp. Personnel monitoring and locating system
US4527247A (en) * 1981-07-31 1985-07-02 Ibg International, Inc. Environmental control system
US4538138A (en) * 1982-12-17 1985-08-27 American District Telegraph Company Integrated security system having a multiprogrammed controller
US4562550A (en) * 1983-11-01 1985-12-31 General Electric Company Remote load control relay processor
US4595923A (en) * 1981-10-21 1986-06-17 Elxsi Improved terminator for high speed data bus

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5896328U (ja) * 1981-12-23 1983-06-30 沖電気工業株式会社 終端抵抗器

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4306299A (en) * 1976-06-10 1981-12-15 Pitney-Bowes, Inc. Postage meter having means transferring data from a working memory to a non-volatile memory under low power conditions
US4084232A (en) * 1977-02-24 1978-04-11 Honeywell Information Systems Inc. Power confidence system
US4155115A (en) * 1977-12-30 1979-05-15 Honeywell Inc. Process control system with analog output control circuit
US4219881A (en) * 1977-12-30 1980-08-26 Honeywell Inc. Digital input control circuit
US4357598A (en) * 1981-04-09 1982-11-02 Westinghouse Electric Corp. Three-phase power distribution network communication system
US4527247A (en) * 1981-07-31 1985-07-02 Ibg International, Inc. Environmental control system
US4595923A (en) * 1981-10-21 1986-06-17 Elxsi Improved terminator for high speed data bus
US4495496A (en) * 1981-12-15 1985-01-22 Johnson Engineering Corp. Personnel monitoring and locating system
US4471348A (en) * 1982-01-15 1984-09-11 The Boeing Company Method and apparatus for simultaneously displaying data indicative of activity levels at multiple digital test points in pseudo real time and historical digital format, and display produced thereby
US4538138A (en) * 1982-12-17 1985-08-27 American District Telegraph Company Integrated security system having a multiprogrammed controller
US4562550A (en) * 1983-11-01 1985-12-31 General Electric Company Remote load control relay processor

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
C. J. Sippl et al, Computer Dictionary & Handbook, (Howard W. Sams Co., 1980), pp. 125 126. *
C. J. Sippl et al, Computer Dictionary & Handbook, (Howard W. Sams Co., 1980), pp. 125-126.

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4792920A (en) * 1983-06-29 1988-12-20 Canon Denshi Kabushiki Kaisha Interface providing impedance matching by selective connection of a resistor array to a power supply
FR2621432A1 (fr) * 1987-10-05 1989-04-07 Gen Electric Circuit de transformation d'impedance pour circuits numeriques paralleles multibits
US5287007A (en) * 1988-12-24 1994-02-15 Heidelberger Druckmaschinen Ag Device for coupling additional equipment to a machine
EP0491179A1 (de) * 1990-12-11 1992-06-24 Bayerische Motoren Werke Aktiengesellschaft Linearer Datenbus
DE4142081A1 (de) * 1990-12-20 1992-07-23 Murata Manufacturing Co Abschlussschaltkreis zum abschluss einer datenbusleitung
US5333177A (en) * 1991-10-19 1994-07-26 Cell Port Labs, Inc. Universal connection for cellular telephone interface
US6330138B1 (en) 1998-06-12 2001-12-11 Samsung Electronics Co., Ltd. Impedance matching circuit

Also Published As

Publication number Publication date
JPS6010336U (ja) 1985-01-24
JPH0116186Y2 (enrdf_load_stackoverflow) 1989-05-12

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