US4168467A - Measurement of pulse duration - Google Patents

Measurement of pulse duration Download PDF

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Publication number
US4168467A
US4168467A US05/870,165 US87016578A US4168467A US 4168467 A US4168467 A US 4168467A US 87016578 A US87016578 A US 87016578A US 4168467 A US4168467 A US 4168467A
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pulses
unknown
duration
measurement
signal
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US05/870,165
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Andrew T. J. Bailey
Roy W. Vanlint
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    • G—PHYSICS
    • G04—HOROLOGY
    • G04F—TIME-INTERVAL MEASURING
    • G04F10/00—Apparatus for measuring unknown time intervals by electric means
    • G04F10/04—Apparatus for measuring unknown time intervals by electric means by counting pulses or half-cycles of an ac
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/08—Locating faults in cables, transmission lines, or networks
    • G01R31/11—Locating faults in cables, transmission lines, or networks using pulse reflection methods

Definitions

  • the present invention relates to a method and apparatus for measuring the duration of pulses which are capable of being triggered repetitively.
  • An example of such pulses is those provided by cable fault locating equipment and representing the time taken for a test pulse to propagate to and from a reflecting fault in a cable under test.
  • the pulse whose duration is to be measured may be as short as 1 us and a 1% resolution of measurement then requires a clock pulse frequency of 100 MHz to give a period of 10 ns. While digital circuits capable of operating at such a frequency are available, they are relatively expensive and consume substantial power, making battery operation problematic.
  • Portable cable fault locating equipment is preferably battery-powered.
  • the present invention employs a circuit which will measure a pulse duration to a resolution smaller than the period of clock signals employed in the circuit. This enables cheaper circuitry to be employed in the main and power consumption can also be substantially reduced. For example, a resolution of 1 ns can be achieved using mainly CMOS circuitry which is inherently capable of operation only up to say, 1 MHz.
  • a method of measuring the duration of unknown pulses employing first and second clock pulses having closely adjacent frequencies f 1 and f 2 , whereby the resolution of measurement is the difference between 1/f 1 and 1/f 2 , characterised in that the first clock pulses are employed to trigger repetitively the unknown pulses and in that edges of predetermined sense of the second clock pulses which occur within one of the unknown pulses are counted to measure the duration.
  • apparatus for measuring the duration of unknown pulses employing first and second clock pulses having closely adjacent frequencies f 1 and f 2 , whereby the resolution of measurement is the difference between 1/f 1 and 1/f 2 , comprising a first oscillator providing a signal at f 1 to an output terminal for connection to a source of pulses of unknown duration, an input terminal for receiving these pulses, and a coincidence circuit responsive to a second oscillator providing a signal at f 2 and to the pulses on the input terminal to be enabled to pass a pulse to a counter each time an edge of predetermined sense of f 2 is coincident with one of the said pulses.
  • the said predetermined edges slip (in a sense depending upon which of the first and second clock pulses has the greater frequency) by an amount t per cycle of the first pulses, t being given by the difference between 1/f 1 and 1/f 2 where f 1 and f 2 are the frequencies of the first and second clock pulses.
  • t can be made very much shorter than either 1/f 1 or 1/f 2 .
  • the slip of the edges has the effect that only a number N of the edges will coincide with pulses whose duration is being measured where Nt is the said duration, which is thus measured to a resolution of t.
  • a further pulse of duration T may be derived from the beat frequency of f 1 and f 2 and the gating circuit can be enabled only during the presence of the further pulse to establish a measurement interval during which counting of the measurement pulses is possible.
  • the measurement interval could be determined in other ways, e.g., by the use of a one-shot circuit with a set time not exceeding T. However, it is possible to make the measurement over a period nT and divide the result by n to determine the time pulse duration. This technique will average any noise present in the system, and give greater accuracy.
  • FIG. 1 is a block diagram of the said embodiment.
  • FIGS. 2, 3 and 4 show explanatory waveforms.
  • the circuit shown in FIG. 1 comprises a first crystal oscillator 10 operating at a frequency f 1 of 1.001001 MHz and a second crystal oscillator 12 operating at a frequency f 2 of 1.000000 MHz.
  • the value of t is therefore 1 ⁇ s-0.999 ⁇ s, i.e., 1 ns. It should be noted that the absolute stability requirements of the oscillators are not excessive. Small variations of f 1 and f 2 are permissible provided t remains substantially constant and this can be achieved using matched crystals in the two oscillators.
  • Waveforms (a) and (b) in FIG. 2 show the clock signals at f 2 and f 1 respectively, while the time t is denoted in relation to waveform (b).
  • the signals at f 1 and f 2 are applied to a beat frequency generator 14 which provides a signal at the difference frequency f 1 -f 2 shown at waveform (c) in FIG. 2.
  • the beat frequency generator may be a D-type flip-flop with f 1 applied to the D input and f 2 to the clock input.
  • the difference frequency is actually 1.001 KHz. and will yield a period for the waveform (c) of 999 ⁇ s.
  • a divide-by-two flip-flop 16 provides a pulse of 999 ⁇ s duration shown in FIG. 2 as waveform (d) and this pulse establishes the duration T of the measurement interval.
  • An output terminal 18 is provided for applying the f 1 pulses as trigger pulses to a circuit 20, such as a known cable fault locator, which responds with pulses having an unknown duration and referred to as unknown pulses.
  • the unknown pulses are received at an input terminal 22.
  • This terminal is connected to the D input of a D-type flip-flop 24 which is clocked by the f 2 pulses.
  • the D-type flip-flop copies the state of the unknown pulse at the instants of the rising edges of f 2 .
  • FIG. 3 again shows the f 2 and f 1 signals at (a) and (b) and shows an example of the unknown pulse at (c) with an assumed very short duration of 5 ns.
  • the leading edge of each unknown pulse is coincident with a rising edge of f 1 because f 1 triggers the unknown pulses.
  • the rising edges of f 2 are shown at t 1 , t 2 , etc.
  • the flip-flop 24 is set because the unknown pulse goes true at this instant.
  • the unknown pulse remains true at t 2 , t 3 , t 4 and t 5 but is slipping back 1 ns per cycle of f 2 because of the 1 ns per cycle slip between f 2 and f 1 . Therefore, at t 6 the unknown pulse is going false as the edge of f 2 rises and the flip-flop 24 is reset.
  • the output of the flip-flop is thus a pulse of duration equal to five cycles of f 2 as shown at (d) in FIG. 3.
  • This pulse is applied as one input to a gate 26 which receives as other inputs the f 2 signal and the signal (d) of FIG. 2 from the flip-flop 16.
  • the gate 26 passes five f 2 pulses an measurement pulses indicating that the duration of the unknown pulses is 5 ⁇ t, i.e., 5 ns.
  • the output of the gate 26 is waveform (e) in FIG. 3 shown inverted relative to f 2 on the assumption that a NAND gate is employed.
  • the flip-flop 24 and gate 16 form a gating circuit responsive to the rising edges of f 2 and to the unknown pulses and also to the f 2 pulses themselves to pass the measurement pulses shown at (e) in FIG. 3.
  • FIG. 4 again shows at (a) the 999 ⁇ s pulse from the flip-flop 16.
  • Waveform (b) is the pulse from the D-type flip-flop 24 and waveform (c) shows the pulses passed by the gate 26. These pulses are applied to a counter 28 which counts the value of N, this being displayed by a conventional display device 30.
  • control logic 32 is provided as is customary for instruments which make repetitive measurements.
  • the control logic need merely reset the counter in response to each rising edge of the output from the flip-flop 16.
  • the display 30 would then need to buffer the counter contents which could be loaded into a buffer register on each falling edge of the output from the flip-flop 16.
  • the control logic could allow only one measurement to be made and held in the counter 28 whenever a front panel switch was pressed.
  • Other techniques well known in digital instruments of this nature could be employed.
  • the readout on the display device 30 is a measurement in nanoseconds.
  • Known techniques can be used to scale the digital readout to give a measurement in terms of some other quantity such as meters.
  • the invention could be used in connection with equipment other than cable fault locating equipment, e.g., sonar systems where the duration of the unknown pulses is changing sufficiently slowly to be effectively constant over the measurement interval.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Measurement Of Unknown Time Intervals (AREA)
  • Manipulation Of Pulses (AREA)
  • Radar Systems Or Details Thereof (AREA)
US05/870,165 1977-01-18 1978-01-17 Measurement of pulse duration Expired - Lifetime US4168467A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB1948/77 1977-01-18
GB1948/77A GB1558042A (en) 1977-01-18 1977-01-18 Measurement of pulse duration

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US4168467A true US4168467A (en) 1979-09-18

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US (1) US4168467A (fr)
JP (1) JPS5390973A (fr)
DE (1) DE2802070A1 (fr)
FR (1) FR2377639A1 (fr)
GB (1) GB1558042A (fr)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4310795A (en) * 1979-04-07 1982-01-12 Kernforschungsanlage Julich, Gesellschaft Mit Beschrankter Haftung Circuit measuring average period of periodic signal
US4397031A (en) * 1980-12-04 1983-08-02 Weber Paul A Time delay computer
US4933634A (en) * 1988-01-22 1990-06-12 Commissariat A L'energie Atomique Device and method to measure a short radiation pulse or an electric pulse
US5382910A (en) * 1993-04-06 1995-01-17 John Fluke Mfg. Co., Inc. Dual time base zero dead zone time domain reflectometer
US5514965A (en) * 1993-11-06 1996-05-07 Bicc Public Limited Company Method and apparatus for testing a communicating line using time domain reflectometry
US5521512A (en) * 1993-08-16 1996-05-28 The Penn State Research Foundation Time domain reflectometer using successively delayed test pulses and an interleaved sampling procedure
US6008655A (en) * 1996-08-20 1999-12-28 Nec Corporation Frequency divider testing circuit clock-sampling window variable with divider output
JP2018056985A (ja) * 2016-09-27 2018-04-05 セイコーエプソン株式会社 回路装置、物理量測定装置、電子機器及び移動体
US12130653B2 (en) 2018-11-12 2024-10-29 Nec Platforms, Ltd. Delay time detection circuit, stamping information generation device, and delay time detection method

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60162737U (ja) * 1985-03-19 1985-10-29 三菱重工業株式会社 防振継手
JP6659057B1 (ja) * 2018-11-12 2020-03-04 Ｎｅｃプラットフォームズ株式会社 遅延時間検出回路、打刻情報生成装置および遅延時間検出方法
WO2022070291A1 (fr) * 2020-09-30 2022-04-07 三菱電機株式会社 Dispositif de calcul de temps et procédé de calcul de temps

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2665410A (en) * 1951-03-15 1954-01-05 Hughes Tool Co Method and apparatus for automatically measuring time intervals
US3325750A (en) * 1963-12-23 1967-06-13 Gen Electric High resolution time interval measuring circuit employing a balanced crystal oscillator
US3611134A (en) * 1969-04-30 1971-10-05 Ibm Apparatus for automatically measuring time intervals using multiple interpolations of any fractional time interval

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1230722B (de) * 1962-08-03 1966-12-15 Kernforschung Mit Beschraenkte Verfahren und Vorrichtung zum genauen Messen von beliebig aufeinanderfolgenden Kurzzeitbereichen wechselnder Laenge
FR2208118B1 (fr) * 1972-11-27 1978-09-29 Dassault Electronique

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2665410A (en) * 1951-03-15 1954-01-05 Hughes Tool Co Method and apparatus for automatically measuring time intervals
US3325750A (en) * 1963-12-23 1967-06-13 Gen Electric High resolution time interval measuring circuit employing a balanced crystal oscillator
US3611134A (en) * 1969-04-30 1971-10-05 Ibm Apparatus for automatically measuring time intervals using multiple interpolations of any fractional time interval

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4310795A (en) * 1979-04-07 1982-01-12 Kernforschungsanlage Julich, Gesellschaft Mit Beschrankter Haftung Circuit measuring average period of periodic signal
US4397031A (en) * 1980-12-04 1983-08-02 Weber Paul A Time delay computer
US4933634A (en) * 1988-01-22 1990-06-12 Commissariat A L'energie Atomique Device and method to measure a short radiation pulse or an electric pulse
US5382910A (en) * 1993-04-06 1995-01-17 John Fluke Mfg. Co., Inc. Dual time base zero dead zone time domain reflectometer
US5440528A (en) * 1993-04-06 1995-08-08 Fluke Corporation Dual time base zero dead zone time domain reflectometer
US5521512A (en) * 1993-08-16 1996-05-28 The Penn State Research Foundation Time domain reflectometer using successively delayed test pulses and an interleaved sampling procedure
US5514965A (en) * 1993-11-06 1996-05-07 Bicc Public Limited Company Method and apparatus for testing a communicating line using time domain reflectometry
US6008655A (en) * 1996-08-20 1999-12-28 Nec Corporation Frequency divider testing circuit clock-sampling window variable with divider output
JP2018056985A (ja) * 2016-09-27 2018-04-05 セイコーエプソン株式会社 回路装置、物理量測定装置、電子機器及び移動体
US12130653B2 (en) 2018-11-12 2024-10-29 Nec Platforms, Ltd. Delay time detection circuit, stamping information generation device, and delay time detection method

Also Published As

Publication number Publication date
JPS5390973A (en) 1978-08-10
DE2802070A1 (de) 1978-07-20
FR2377639A1 (fr) 1978-08-11
GB1558042A (en) 1979-12-19

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