US3869644A - Pulses of the same or an opposite polarity to electrodes of a plasma display panel - Google Patents

Pulses of the same or an opposite polarity to electrodes of a plasma display panel Download PDF

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Publication number
US3869644A
US3869644A US388787A US38878773A US3869644A US 3869644 A US3869644 A US 3869644A US 388787 A US388787 A US 388787A US 38878773 A US38878773 A US 38878773A US 3869644 A US3869644 A US 3869644A
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pulses
pulse train
electrodes
supplying
pulse
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Expired - Lifetime
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US388787A
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English (en)
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Akira Yano
Norio Sato
Tunekiyo Iwakawa
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NEC Corp
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Nippon Electric Co Ltd
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/282—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using DC panels

Definitions

  • This invention relates to display driving circuitry and, more specifically, to a circuit for driving an external electrode discharge display panel in a time division manner.
  • External electrode discharge display panels or plasma display panels of various types are described in a first prior patent application Ser. No. 291,700 filed Sept. 25, 1972, by Tsunekiyo lwakawa and Togo Miyazaki. Like panels are described in a second prior patent application Ser. No. 306,843 filed Nov. 15, 1972, by Tsunekiyo lwakawa and Akira Yano. Similar panels are further described in a third prior patent application Ser. No. 328,055 filed Jan. 30, l973,by Tsunekiyo Iwakawa and Akira Yano. Conventional driving circuits for such plasma display panels are described in the above-referenced prior patent applications.
  • One of the conventional driving circuits described in the second andthe third prior patent applications comprises structure for'cyclically applying a pulse train of a predetermined duration to the electrodes of a firstgroup, such as the row electrodes, of a plasma display panel and structure for selectively supplying another pulse train of the opposite polarity to the electrodes of a second group, such as the column electrodes.
  • a gas discharge occurs in a gas discharge cell interposed be tween the opposing electrodes simultaneously supplied with the pulse trains.
  • the gas discharge produced is selected one or ones of the cells is observed as a display of a numeral, a letter, a symbol, and/or a combination of these.
  • each pulse voltage has the same amplitude V for simplicity of description.
  • V andV the voltage at which the discharge occurs in the cell as a result of rises in the respective pulse voltages and the voltage at which the discharge disappears as a result of decreases in the respective pulse voltages.
  • the inequality (1) provides a condition for the discharge to occur when both row and column electrodes are selectedsimultaneously and the inequality (2) provides another condition for the discharge not to occur when only a row or a column electrode is se lected.
  • the inequality (2) imposes an upper limit to the pulse voltage V. This makes it impossible to achieve higher brightness by raising the pulse voltages. From the inequalities (l) and (2), the relationship follows, in which the right side is dependent for the most part on the characteristics of the discharge cells.
  • the inequality (3) imposes a lower limit to the pulse height V. This prohibits the use of a plasma display panel with integrated circuits and the use of driving circuit switching elements characterized by a low breakdown voltage.
  • a circuit for driving an external electrode discharge display panel having a plurality of gas discharge cells, a first and a second group of electrodes disposed on opposite sides of said cells, and first means for cyclically applying a first pulse train of a predetermined duration to the electrodes of said first group
  • the improvement comprises second means for supplying a second pulse train to each electrode of said second group, said second pulse train comprising pulses of a polarity opposite to the pulses of said first pulse train for the duration of time in which the electrode of said first group is energized for second group electrodes associated with cells which are to glow and otherwise comprising pulses of the same polarity as the pulses of said first pulse train.
  • FIG. 1 depicts wave forms of pulse trains supplied to electrodes of a plasma display panel by a first conventional driving circuit
  • FIG. 2 shows wave forms of pulse trains supplied to electrodes of a plasma display panel by another conventional driving circuit
  • FIG. 3 illustrates the relationship between the pulse voltage supplied across a gas discharge cell of a plasma display panel and the brightness of the glow of the cell
  • FIG. 4 depicts wave forms of pulse trains supplied to electrodes of a plasma display panel in accordance with one aspect of the instant invention
  • FIG. 5' shows wave formsof pulse trains supplied to electrodes of a plasma display panel in accordance with another aspect of this invention
  • FIG. 6 is a schematic circuitdiagram of a fundamental embodiment of this invention.
  • FIG. 7 is a schematic circuit diagram of a first embodiment of the present invention.
  • FIG. 8 is a schematic circuit diagram of a second embodiment of this invention.
  • an external electrode discharge display panel comprises a plurality of row electrodes, n in number, and a plurality of column electrodes.
  • FIGS. 1 and 2 Before describing several preferred embodiments of the instant invention, operation of a conventional driving circuit for a plasma display panel will be analysed with reference to FIGS. 1 and 2 in order to facilitate an understanding of the principles-on which this invention is based.
  • a conventional driving circuit comprises structure (not shown) for cyclically supplying pulsed voltages to the first, the second, and the n-th row electrodes (not shown).
  • the pulsed voltages comprise pulse trains of a common duration T shifted by a common interval T as typified in FIGS. 1 (a) and 1(b) for the first and the second row electrodes.
  • the pulse trains of each pulsed voltage comprises plural pulses each characterized by an amplitude V, and the train and is refreshed at a period nT.
  • the driving circuit further comprises structure (not shown) for selectively supplying a similar pulsed voltage to each ofthe column electrodes (not shown) crossing the row electrodes at those gas discharge cells interposed therebetween wherein a discharge should be made to occur.
  • the voltage pulses supplied to a column electrode have a polarity opposite to the pulses supplied to the row electrodes and appear in coincident timed relation to the latter pulses.
  • an alternating voltage of necessary and sufficient amplitude is supplied across the first row m-th column cell as shown in FIG. 1(d) to make the cell glow during the duration of period T.
  • the second row m-th column cell is supplied with the voltage depicted in FIG. 1(e) and is made to glow for only a very short transient time by the first pulse applied thereacross.
  • the pulses supplied to the row and column electrodes have different amplitudes
  • the pulses supplied to the row electrodes have a pulse height V that is larger than a pulse height V of the pulses for the column electrodes as exemplified at FIGS. 2 (a), (b), and (c) for the first and second row electrodes and for the m-th column electrode.
  • the first row m-th column cell glow during the period allotted to the first row cells when the m-th column electrode is selected
  • the abscissa represents the pulse height V of the voltage supplied to each electrode when the pulse heights V and V are equal to each other and the ordinate shows the brightness of the glow of the cell actually measured for two pulse repetition frequencies 20 kHz and 10 kHz. As shown, the brightness increases with an increase in the pulse amplitude.
  • the inequality (2) imposes a limitation on the maximum brightness available with the conventional driving circuit.
  • the inequality (3) imposes alimitation on the lowest pulse height applicable to the conventional driving circuit.
  • the difference V, V amounts to as high as about 20 volts due to the deviation in the cell characteristics of a plasm display panel so that the pulse height of the voltage supplied to one of the electrodepair should be 40 volts or more. This results in the high breakdown voltage required for the switching elements used in the driving circuit and, accordingly, the high selling price of a driving circuit set.
  • a circuit for driving a plasma display panel in accordance with the principles of the present invention comprises first means (not shown) for cyclically supplying a first pulse train of a pulse height V and of a predetermined duration T to the first through the n-th row electrodes in a manner similar to the cyclic application of a pulse train described with reference to FIG. 1 or 2.
  • the pulse trains supplied to the first and the second row electrodes are exemplified in FIGS. 4(a) and (b).
  • the driving circuit further comprises second means (not shown) for simultaneously supplying second pulse trains to the respective column electrodes (not shown).
  • the second pulse train supplied to the m-th column electrode comprises pulses of a pulse height V and of the polarity opposite to the pulses supplied to the row electrodes during the period when the first row electrode is supplied with the first pulse train, and pulses of the pulse height V and of the same polarity as the pulses supplied to the row electrodes during the period when the second row electrode is supplied with the first pulse train, as illustrated in FIG. 4(0).
  • the voltages applied across the first row and the second row m-th column cells become as shown in FIGS. 4(d) and (e), respectively. It is necessary that the amplitudes V V and V of the pulses applied across the first row m-th column cell should satisfy the inequalities.
  • the pulse heights V, and V should satisfy Vr- V2 2 2V,, from which it is seen that the upper limit for the larger pulse height V, and the lower limit for the smaller pulse height V, are extended to 2(V,+ V and to V, V, in contrast to the corresponding limits 2V, and 2( V,- V,) for the conventional driving circuit. It is thus possible with a driving circuit according to this invention to provide a brighter display and to reduce the voltage that the switching elements must be capable of withstanding for pulses of the pulse height V to about a half of that required for the corresponding switching elements used in the conventional driving circuit.
  • negative going pulses may be supplied to the row electrodes as illustratged in FIGS. 5 (a) and (b) for the first and the second row electrodes.
  • the pulses supplied to each column electrode go positive when it is desired to make a discharge occur in the cell interposed between the column electrode and the particular row electrode simultaneously supplied with the pulse train, and go negative in other cases as depicted in FIG. 5(c) for the m-th column electrode.
  • the pulses applied across the first row and the second row m-th column cells under the illustrated condition are illustrated in FIG. 5(d) and (e).
  • This aspect of the present invention is preferable in that the discharge quickly occurs upon selection of a cell due to the stronger electric field present in the cell while the cell is not selected than the corresponding field produced by the pulse trains illustrated with reference to FIG. 4.
  • the first and second pulse trains cooperate to supply a direct-current component voltage approximately equal to V, V while the first pulse train is not supplied to the row electrodes disposed in registration with the last-mentioned cells.
  • Pulse trains illustrated with reference to FIG. 5 are supplied to the electrode via a row'driver 26 and a column driver 27 supplied with a clock pulse train from a clock generator 28 and with control pulses from a control signal generator 29.
  • the control pulses for the row driver rise to the logic I level cyclically.
  • the control pulses for the column driver 27 are selectively set to the logic 1 levely in timed relation to the control pulses for the row electrode or electrodes in accordance with the particular cell or cells that are to be made to glow.
  • the row driver 26 comprises two-input NAND gates 31, 32, 33, supplied with the clock pulses and the respective row control pulses, and row switching elements 41, 42, 43, driven by the respective outputs of the NAND gates 31, 32, 33, for supplying the row electrodes 11, 12, 13, with the pulse trains examplified in FIG. 5 (a) and (b).
  • the column driver 27 comprises an inverter 50 for inverting the clock pulses, two-input first AND gates 51, 52, 55, supplied with the clock pulses and the respective column control pulses to be enabled when the associated column electrodes are selected; control signal inverters 61, 62, 63, ,for inverting the respective column'control pulses; two-input second AND gates 71, 72, 73, supplied with the inverted clock pulses and the respective inverted column control pulses to be enabled when the first and second AND gates 51 and 71, 72 and 72, 55
  • the row switching circuits 41, 42, 43 comprise NPN transistors 101, 102, 103, and their collector resistors 111, 112, 113, supplied with a DC. voltage V, by a DC. source 110.
  • the outputs of the AND gates 31, 32', 33, used herein instead of the NAND gates 31, 32, 33, of the fundamental embodiment are supplied to the base electrodes of the NPN transistors 101, 102, 103,
  • the row electrodes ll, 12, 13, are supplied from the collector electrodes of the NPN transistors 101, 102, 103,
  • the column switching circuits 91, 92, 93, comprise PNP transistors 121, 122, 123, supplied with unother D. C. voltage Vl by another D.C. source 130 and the ir collector resistors 131,132, 133,
  • the column switching circuits 91, 92, 93 comprise PNP transistors 121, 122, 123, supplied with unother D. C. voltage Vl by another D.C. source 130 and the ir collector resistors 131,132, 133,
  • outputs of the NOR gates 81, 82, 83 are supplied to the base electrodes of the PNP transistors 121, 122, 123, and the column electrodes 21, 22, 23, are supplied from the collector electrodes of the PNP transistors 121, 122, 123,.
  • the voltages V; and V are 120 volts and volts, respectively, for a particular plasma display panel to be driven by the driving circuit depicted therein.
  • the DC. voltages V and V may be set at 220 volts and 24 volts. respectively.
  • the driving circuit supplies the row electrodes 11, 12, 13, with pulse trains whose amplitude is 220 volts and whose phase is opposite to the phhase of the clock pulses.
  • the column electrode or electrodes selected by the column selection pulses are supplied with driving pulses 24 volts in amplitude and of the same phase as the clock pulses.
  • the unselected column electrodes are supplied with pulse trains 24 volts in amplitude and a phase, opposite to the phase of the clock pulses.
  • the possibility of using MOS integrated circuit inverters for the PNP transistors 121, I22, 123, , has been confirmed.
  • MOS integrated circuit inverters for the PNP transistors 121, I22, 123, has been confirmed.
  • a circuit for supplying the pulse trains depicted in FIG. 5 to row electrodes 11,12, 13, and column electrodes 21, 22, 23, of a plasma display panel comprises a row driver 26 and a column driver 27 supplied from a control signal generator 29 and a DC. and'clock pulse source 150.
  • the row driver 26 comprises first NPN transistors 151, 152, 153, whose emit t er electrodes are supplied with inverted clock pulses d) from the source 150.
  • the collector electrodes of these transistors are suppliedwith a first DC.
  • the column driver 27 comprises second NPN transistors 181, 182, 183, having emitter electrodes supplied f om thesource 150 with first inverted clock pulses d)
  • the collector electrodes are supplied with a second D.C. voltage V from the source 150 through collector resistors 191, 192, 193, Second inverted clock pulses 4J supplied from the source 150 through first diodes 201, 202, 203, signals supplied from the control signal generator 29 through resistors 211, 212, 213, are combined and supplied to the base electrodes of the second NPN transistors 181, 182, 183. through capacitors 221, 222, 223,
  • the base electrodes are supplied with zero potential through resistors 231, 232, 233, and with a third DC.
  • a circuit for driving an external electrode discharge display panel having a plurality of gas discharge cells, a first and a second group of electrodes disposed on opposite sides of said cells, and means for cyclically supplying a first pulse train of a predetermined duration to the'electrodes of said first group, wherein the improvement comprises means for supplying a second pulse train to each electrode of said second group said second pulse train supplying means comprising means for supplying pulses of a polarity oppostie to the pulse traiin the display dishcarge cell, associated with the first and second group electrodes respectively receiving said first and second pulse trains is to glow, and means for otherwise supplying pulses of the same polarity as the pulses of said first pulse train further comprising a clock generator for supplying clock pulses to said first and second pulse train supplying means, respectively,
  • said second pulse train supplying means comprises an inverter for inverting said clock pulses, first AND gates supplied with said clock pulses and said second control signals, control signal inverters for inverting said second control signals, second AND gates supplied with the inverted clock pulses and the respective inverted second control signals, and NOR gates responsive to the output signals of said first AND gates and the corresponding second ANd gates forproducing said second pulse trains.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Transforming Electric Information Into Light Information (AREA)
  • Gas-Filled Discharge Tubes (AREA)
US388787A 1972-08-22 1973-08-16 Pulses of the same or an opposite polarity to electrodes of a plasma display panel Expired - Lifetime US3869644A (en)

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JP8428572A JPS5548318B2 (nl) 1972-08-22 1972-08-22

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US (1) US3869644A (nl)
JP (1) JPS5548318B2 (nl)
CA (1) CA996227A (nl)
DE (1) DE2342259C2 (nl)
FR (1) FR2197227B1 (nl)
GB (1) GB1428860A (nl)
NL (1) NL161597C (nl)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0254299A2 (en) * 1986-07-22 1988-01-27 Nec Corporation Plasma display apparatus
US4796093A (en) * 1985-06-10 1989-01-03 Fuji Xerox Co., Ltd. Method and system of driving light source
EP0316903A2 (en) * 1987-11-16 1989-05-24 Nec Corporation Plasma display apparatus
US20050104531A1 (en) * 2003-10-20 2005-05-19 Park Joong S. Apparatus for energy recovery of a plasma display panel
US20060061522A1 (en) * 2004-09-22 2006-03-23 Pioneer Corporation Driving circuit of display device, display device and driving control method of display device

Citations (7)

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Publication number Priority date Publication date Assignee Title
US3513327A (en) * 1968-01-19 1970-05-19 Owens Illinois Inc Low impedance pulse generator
US3588596A (en) * 1968-11-01 1971-06-28 Ibm Two-color matrix-type display panel
US3614739A (en) * 1969-05-02 1971-10-19 Owens Illinois Inc Integrated driving circuitry for gas discharge panel
US3668688A (en) * 1969-12-29 1972-06-06 Owens Illinois Inc Gas discharge display and memory panel having addressing and interface circuits integral therewith
US3673431A (en) * 1971-05-28 1972-06-27 Owens Illinois Inc Low voltage pulser circuit for driving row-column conductor arrays of a gas discharge display capable of being made in integrated circuit form
US3727102A (en) * 1970-08-03 1973-04-10 Owens Illinois Inc Selection and addressing circuitry for matrix type gas display panel
US3808501A (en) * 1971-11-17 1974-04-30 Nippon Electric Co Driving circuit for a plasma display panel comprising pnp and npn transistors

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1313762A (en) * 1969-10-31 1973-04-18 Mullard Ltd Electrical display devices

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3513327A (en) * 1968-01-19 1970-05-19 Owens Illinois Inc Low impedance pulse generator
US3588596A (en) * 1968-11-01 1971-06-28 Ibm Two-color matrix-type display panel
US3614739A (en) * 1969-05-02 1971-10-19 Owens Illinois Inc Integrated driving circuitry for gas discharge panel
US3668688A (en) * 1969-12-29 1972-06-06 Owens Illinois Inc Gas discharge display and memory panel having addressing and interface circuits integral therewith
US3727102A (en) * 1970-08-03 1973-04-10 Owens Illinois Inc Selection and addressing circuitry for matrix type gas display panel
US3673431A (en) * 1971-05-28 1972-06-27 Owens Illinois Inc Low voltage pulser circuit for driving row-column conductor arrays of a gas discharge display capable of being made in integrated circuit form
US3808501A (en) * 1971-11-17 1974-04-30 Nippon Electric Co Driving circuit for a plasma display panel comprising pnp and npn transistors

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4796093A (en) * 1985-06-10 1989-01-03 Fuji Xerox Co., Ltd. Method and system of driving light source
EP0254299A2 (en) * 1986-07-22 1988-01-27 Nec Corporation Plasma display apparatus
US4859910A (en) * 1986-07-22 1989-08-22 Nec Corporation Plasma display apparatus
EP0254299A3 (en) * 1986-07-22 1991-02-06 Nec Corporation Plasma display apparatus
EP0316903A2 (en) * 1987-11-16 1989-05-24 Nec Corporation Plasma display apparatus
EP0316903A3 (en) * 1987-11-16 1989-11-23 Nec Corporation Plasma display apparatus
US5003228A (en) * 1987-11-16 1991-03-26 Nec Corporation Plasma display apparatus
US20050104531A1 (en) * 2003-10-20 2005-05-19 Park Joong S. Apparatus for energy recovery of a plasma display panel
US7355350B2 (en) 2003-10-20 2008-04-08 Lg Electronics Inc. Apparatus for energy recovery of a plasma display panel
US7518574B2 (en) 2003-10-20 2009-04-14 Lg Electronics Inc. Apparatus for energy recovery of plasma display panel
US20060061522A1 (en) * 2004-09-22 2006-03-23 Pioneer Corporation Driving circuit of display device, display device and driving control method of display device
US7639242B2 (en) * 2004-09-22 2009-12-29 Panasonic Corporation Driving circuit of display device, display device and driving control method of display device

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DE2342259C2 (de) 1984-03-01
FR2197227B1 (nl) 1978-09-15
CA996227A (en) 1976-08-31
NL7311524A (nl) 1974-02-26
NL161597C (nl) 1980-02-15
JPS4940622A (nl) 1974-04-16
DE2342259A1 (de) 1974-02-28
FR2197227A1 (nl) 1974-03-22
NL161597B (nl) 1979-09-17
JPS5548318B2 (nl) 1980-12-05
GB1428860A (en) 1976-03-17

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