US3816822A - Amplitude-space converter, more particularly for dynamic display systems on matrices - Google Patents

Amplitude-space converter, more particularly for dynamic display systems on matrices Download PDF

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Publication number
US3816822A
US3816822A US00283211A US28321172A US3816822A US 3816822 A US3816822 A US 3816822A US 00283211 A US00283211 A US 00283211A US 28321172 A US28321172 A US 28321172A US 3816822 A US3816822 A US 3816822A
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Prior art keywords
binary
comparator
input
decoder
decimal
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US00283211A
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R Auchapt
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L'EQUIPEMENT ET LA CONSTRUCTION ELECTRIQUE
L'EQUIPEMENT ET LA CONSTRUCTION ELECTRIQUE-ECE Ste
NOUVELLE L'EQUIPEMENT ET LA CONSTRUCTION ELECTRIQUE dba NOUVELLE EC E 157 RUE PELLEPORT PARIS 20E FRANCE Ste
EQUIPMENT ET LA CONSTRUCTION E
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L'EQUIPEMENT ET LA CONSTRUCTION ELECTRIQUE-ECE Ste
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Assigned to SOCIETE NOUVELLE L'EQUIPEMENT ET LA CONSTRUCTION ELECTRIQUE, DBA NOUVELLE E.C. E. ,157 RUE PELLEPORT, PARIS, 20E ,FRANCE reassignment SOCIETE NOUVELLE L'EQUIPEMENT ET LA CONSTRUCTION ELECTRIQUE, DBA NOUVELLE E.C. E. ,157 RUE PELLEPORT, PARIS, 20E ,FRANCE ASSIGNMENT OF ASSIGNORS INTEREST. Assignors: SOCIETE L 'EQUIPEMENT ET LA CONSTRUCTION ELECTRIQUE E. C. E.
Assigned to L'EQUIPEMENT ET LA CONSTRUCTION ELECTRIQUE reassignment L'EQUIPEMENT ET LA CONSTRUCTION ELECTRIQUE CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). Assignors: SOCIETE NOUVELLE L'EQUIPMENT ET LA CONSTRUCTION ELECTRIQUE
Assigned to SOCIETE L'EQUIPEMENT ET LA CONSTRUCTION ELECTRIQUE-E.C.E. reassignment SOCIETE L'EQUIPEMENT ET LA CONSTRUCTION ELECTRIQUE-E.C.E. ASSIGNMENT OF ASSIGNORS INTEREST. Assignors: AUCHAPT, RENE
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R13/00—Arrangements for displaying electric variables or waveforms
    • G01R13/04—Arrangements for displaying electric variables or waveforms for producing permanent records
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06G—ANALOGUE COMPUTERS
    • G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/04—Input or output devices

Definitions

  • a remote visual indicator of magnitudes includes an amplitude-space converter comprising at least one comparator having a first input receiving a voltage representing a magnitude, a second input receiving a stepwise varying voltage, and an output delivering, at the particular step-valueat which the variable voltage attains the magnitude-representing voltage, a signal which is thus applied selectively to a line of same stepvalue on a display matrix.
  • cathode-ray tube it is possible to use a cathode-ray tube to display a variety of phenomena such as the variations, as a function of time, of some physical quantity translated into a voltage.
  • the current state of the semiconductor art includes the use of electroluminescent diodes, notably employing arsenic, phosphorus and gallium, and it has been proposed to utilize such diodes to form display matrices by arranging them in rows and columns at the intersection points of two series of conductors extending along these rows and columns.
  • This electronic system forms an amplitude-space converter interposed between an input, to which is applied a voltage representing a variable to be displayed, and the inputs to the lines of a matrix.
  • an electronic system comprising an interface and a secondary decoder, which decoder is connected to the outputs of a pair of latchable transfer storages arranged in series (hereinafter referred to as latches).
  • the first latch is connected to an encoder, forming a binary counter having a last terminal connected to the second latch whereby to transmit a signal thereto only when the binary counter has reached its maximum counting capacity.
  • the counter is controlled by a clock and energizes a primary decoder having an output connected to one of the inputs of a comparator whose other input receives the electrical signal translating the quantityto be displayed and whose output is connected to a control input of the first latch.
  • a clock may be used in conjunction with an interposed time-voltage translator, for instance.
  • the provision of a dual latch between the encoder and the secondary decoder allows storing, in binary form, the value of the signal to be displayed, which signal will be displayed-on the matrix only for the time needed to determine the rank of the next line, whereby the duration of excitation remains independent of the amplitude of the signal to be displayed.
  • an amplitude-space converter according to the invention is devised with chains of resistors associated to dual comparators.
  • FIG. 1 is a block diagram of a display unit according to the invention.
  • FIG. 2 is a schematic wiring diagram of an alternative embodiment of a converter with dual comparators.
  • FIG. 1 there is provided, on a fiat panel 1, a matrix of electroluminescent diodes arranged in criss-crossing lines forming rows and columns, along parallel conductors 2, 3, the two sets of conductors being connected, substantially at each of their intersection points, to the electroluminescent diodes, each of which releases photons whenever its two electrodes are raised to the voltage required for this functional mode of the diode.
  • the diodes have not been shown in detail, for greater clarity in the drawing. If the direction of the sets of conductors 2 and 3 are mutually perpendicular, then the matrix will determine a representation surface based on right-angled coordinates. Any number, equal or not, of rows and columns may be used.
  • a change in magnitude in this converter system is translated in the form of a voltage V, as a function of time t.
  • the variable voltage V is applied to one of the inputs of a comparator K1.
  • the second input of comparator K1 is connected to the output of an analog binary decoder D1.
  • a clock H delivering electric pulses in the form of square wave pulses (shown on the middle graph to the left of FIG. 1) feeds a binary encoder C1, having its binary outputs connected to the corresponding inputs of binary decoder D1.
  • Decoder Dl delivers a stepwise voltage, shown, on the graph to the left of FIG. 1.
  • the binary outputs of encoder Clare further connected to the corresponding inputs of a set of bi-stable latchable flip flops, referred to as a latchable transfer storage" or latch U1 and having a triggering input connected to the output of comparator Kl.
  • the outputs of the first latch L11 are connected to the inputs of a similar second latch L12 having a triggering input connected to a detector of the maximum capacity of the counter C1.
  • the outputs of secondary latch L12 are connected to the inputs of a secondary binary/decimal decoder D11, the decimal outputs of which are applied to the companion inputs of an amplifier unit or interface 11, whose output terminals are respectively connected to the line conductors 2, which lines form rows in the example herein considered.
  • the binary counter C1 activates both the primary decoder D1 (the output of which is the seat of the stepwise voltage) and the primary latch L11.
  • the comparator K1 delivers, on its output, a voltage for triggering the latch L11 when the signal issuing from decoder D1 is equal to or greater than the value of the voltage V existing on the first input of comparator K1 and corresponding tothe value to be displayed on matrix 1.
  • the binary value stored thus is transferred into secondary latch L12 when the counter C1 reaches the maximum value of its capacity, that is to say when its ultimate triggering output is energized, which in turn corresponds to energization of the triggering input of secondary latch L12 and a reverting of the counter C1 to its original counting position.
  • This energization lasts for at least the whole of the time during which counter C1 performs one of its counting cycles. 7
  • the desired amplitude-space conversion is accordingly achieved since, to a given amplitude of signal V on the first inputof comparator K1, there corresponds a determinate position of counter C1 and consequently a determinate row 2 on matrix 1.
  • the role of the two latches L11 and L12 is to permit storage, in binary form, of the value of the signal to be displayed.
  • the time for which a line 2 is energized is independent of the amplitude of the signal .to be displayed.
  • a similar circuitry may be used (using the same clock, for example) to energize in parallel the counter C1 and a further binary counter C21, whose outputs are themselves connected both to a primary binary decoder D21 and a primary latch L21.
  • a further compar' ator K2 has a first input connected to the translator of a second variable V1 to be considered, and a second input connected to the output of the corresponding primary decoder D21.
  • the circuitry can be simplified by simply connecting the input of secondary counter C21 di rectly to the output of the detector of the maximum capacity of first counter C1. in this simplified arrangement it is possible to dispense with comparator K2, decoder D21 and latches L21 and L22 and to connect the outputs of counter C21 directly to the corresponding inputs of decoder D22.
  • any type of comparator may be used.
  • a network of the type familiary designated as R2R and forming a decoder could be associated to comparators known under the designation type u A 711.
  • each comparison cell 7 has a first input connected to interconnection means between a resistor 5 of rank n and a resistor of rank (n l), and a second input connected to a junction between a resistor 6 of rank n and a resistor of rank (n 1).
  • the output of this comparator cell may be connected, directly or not, to a matrix line 1a.
  • the third inputs 8 of these dual comparators are parallel-connected to a conductor (not shown) carrying the voltage V representing the magnitude of the variable to be displayed.
  • each chain Into each chain are connected N resistors 5 (or 6) equal in number to the number of lines 1a on the matrix and to the number of comparators 7.
  • the voltage across the terminals of each resistor is E/N, where E is the potential applied to the chain.
  • each comparator 7 exhibits a sensitivity window equal to EIN for a signal applied to its control electrode.
  • the comparator which is connected between the resistors of rank (n l) and n in the first chain and between the resistors of rank n and (n l) in the second chain consequently delivers a voltage on its output, for the purpose of energizing the matrix line In connected thereto, when the voltage v on its control electrode assumes a value lying betweenthe ratios En/N and E(n 1)/N, so that one may write:
  • circuitry shown in FIG. 2-could include other interposed components of the kind shown in FIG. 1 should it be desired to enjoy the same advantages of independence between the matrix line energization and the magnitudes of the variables to be displayed, in respect of both the values of such magnitudes and the energization times.
  • An amplitude-space converter unit comprising, in combination, at least one comparator having a first input to which is applied a voltage representing the magnitude of a variable, at least one second input receiving a stepwise varying voltage, and anoutput; a display matrix constituted by electroluminescent diodes arranged in lines having respective step values; said comparator output delivering asignal to a line of said matrix having the same step value as that for which the stepwise varying voltage on said second comparator input becomes at least equal to the magnituderepresenting voltage on said first comparator input; a binary/decimal decoder having an output connected to said second comparator input; a decimal/binary encoder having outputs connected to inputs of said decoder, and having an end-of-scan output; a primary latchable storage having inputs connected to the outputs of said encoder and to the inputs of said decoder; a clock connected to the input of said encoder and delivering clock pulses thereto; a secondary latchable storage having inputs connected to corresponding outputs of said
  • a converter unit according to claim 1 including 6 two amplitude-space converters respectively connected to the two families of lines, to wit rows and columns, of said matrix.
  • a converter unit in which said two amplitude-space converters are identical, the first comparator inputs independently receiving voltages representing magnitudes of variables, and said matrix permitting visualization of the correlation between said variables.
  • a converter unit in which the same clock is used to control the two input encoders.
  • a converter unit including a set of dual comparators associated to a dual chain of equal resistors provided in equal numbers in the respective chains, which chains are raised to the same reference voltage, two second inputs of each dual comparator being connected between resistors, mutually offset in rank by one unit, in the respective chains, a first input of each dual comparator being connected to a single conductor to which is applied the voltage representing the magnitude of the variable to .be displayed, the output of each comparator being connected to a line on said matrix.
  • a converter unit in which, in order to represent the variations of a variable solely as a function of time, said matrix has two families of lines forming rows and columns, with one family of lines being energized by said amplitude-space converter and the other family of lines being energized by a second binary/decimal encoder; said second binary/decimal encoder having an input connected to that output of said first mentioned binary/decimal encoder detecting attainment of the maximum capacity of said firstmentioned binary/decimal encoder; a second binary/- decimal decoder having inputs connected directly to the outputs of said second binary/decimal encoder; and second interface means interposed between said second binary/decimal decoder and said display matrix and having inputs connected to corresponding outputs of said second binary/decimal decoder and having output connected to corresponding lines of said other family of lines on said display matrix.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Analogue/Digital Conversion (AREA)
  • Control Of El Displays (AREA)
US00283211A 1971-09-28 1972-08-23 Amplitude-space converter, more particularly for dynamic display systems on matrices Expired - Lifetime US3816822A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7134781A FR2154849A5 (xx) 1971-09-28 1971-09-28

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US (1) US3816822A (xx)
BE (1) BE787971A (xx)
DE (1) DE2242000C3 (xx)
FR (1) FR2154849A5 (xx)
GB (1) GB1372126A (xx)
IL (1) IL40208A (xx)
IT (1) IT966745B (xx)
LU (1) LU66163A1 (xx)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3946378A (en) * 1973-11-09 1976-03-23 International Business Machines Corporation Dynamic digital pulse display
FR2310605A1 (fr) * 1975-05-05 1976-12-03 Sigma Instruments Inc Dispositif pour l'affichage de valeurs analogiques
US4006412A (en) * 1974-10-29 1977-02-01 The United States Of America As Represented By The Secretary Of The Navy Digital display system circuit

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4210904A (en) * 1978-09-12 1980-07-01 Krautkramer-Branson, Incorporated Method and apparatus for converting analog ultrasonic echo signals into digital form

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2064630A (en) * 1935-08-07 1936-12-15 Ohio Brass Co Impulse generator
US2612550A (en) * 1950-09-27 1952-09-30 Gen Electric Voltage level selector circuit
US2688441A (en) * 1951-02-02 1954-09-07 Exact Weight Scale Co Distribution classifier
US2817815A (en) * 1948-02-02 1957-12-24 Thomas P Evans Transient signal recorder
US3671938A (en) * 1969-05-02 1972-06-20 Bell Telephone Labor Inc Gaseous display device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2064630A (en) * 1935-08-07 1936-12-15 Ohio Brass Co Impulse generator
US2817815A (en) * 1948-02-02 1957-12-24 Thomas P Evans Transient signal recorder
US2612550A (en) * 1950-09-27 1952-09-30 Gen Electric Voltage level selector circuit
US2688441A (en) * 1951-02-02 1954-09-07 Exact Weight Scale Co Distribution classifier
US3671938A (en) * 1969-05-02 1972-06-20 Bell Telephone Labor Inc Gaseous display device

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
LED Display with Inherent Memory by G. C. Georgallis, IBM Tech. Discl. Bull., Vol. 13, No. 11, 4/71. *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3946378A (en) * 1973-11-09 1976-03-23 International Business Machines Corporation Dynamic digital pulse display
US4006412A (en) * 1974-10-29 1977-02-01 The United States Of America As Represented By The Secretary Of The Navy Digital display system circuit
FR2310605A1 (fr) * 1975-05-05 1976-12-03 Sigma Instruments Inc Dispositif pour l'affichage de valeurs analogiques
US4163971A (en) * 1975-05-05 1979-08-07 Sigma Instruments Inc. Systems for displaying analog values

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IT966745B (it) 1974-02-20
GB1372126A (en) 1974-10-30
BE787971A (fr) 1972-12-18
DE2242000C3 (de) 1979-03-01
LU66163A1 (xx) 1973-01-17
DE2242000A1 (de) 1973-04-05
DE2242000B2 (de) 1978-07-06
IL40208A (en) 1975-04-25
IL40208A0 (en) 1972-11-28
FR2154849A5 (xx) 1973-05-18

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