US3802188A

US3802188A - Digital governor

Info

Publication number: US3802188A
Application number: US00177285A
Authority: US
Inventors: W Barrett
Original assignee: Individual
Current assignee: Individual
Priority date: 1971-09-02
Filing date: 1971-09-02
Publication date: 1974-04-09
Anticipated expiration: 1991-04-09
Also published as: CA969255A; CA969256A; CA961579A

Abstract

Electronic governors for controlling the speed of prime movers wherein signals corresponding in frequency to actual speed and desired speed are compared to produce an error signal for controlling a prime mover actuator in accordance with the time integral of the period difference between the compared signals, the rate of integration and overall gain of the governor servo loop being completely independent of the actual speed of the prime mover. Alternative governors are disclosed which include droop and isochronous versions as well as a governor featuring proportional plus integral control. All embodiments are entirely digital in design and inherently immune to drift due to temperature and power supply variations.

Description

United States Patent 1191 Barrett DIGITAL GOVERNOR Primary Examiner-Edgar W. Geoghegan Assistant Examiner-H. Burks Sr. [76] Inventor: William J. Barrett 2960-Imper1al Oak Dr Rockford, m 61614 Attorney, Agent, or Firm-Wolfe, Hubbard, Leyd1g,

V01t & Osann Ltd. [22] Filed: Sept. 2, 1971 1 PP 177,235 [57] ABSTRACT Electronic governors for controlling the speed of [52] US. Cl ..60/664, 318/318 prime movers wherein Signals corresponding i f [51] Int. Cl. F0ld 25/32, FOlb 25/16 quency to actual Speed and desired speed are [58] Field of Search 60/105; 415/17, 30; pared to produce an error signal for controlling a 1, 235/151; 318/318 prime mover actuator in accordance with the time integral of the period difference between the compared [56] References C'ted signals, the rate of integration and overall gain of the UNITED STATES PATE TS governor servo loop being completely independent of 3,174,504 3/1965 Rosenbrock 137/486 the a u sp f th prime moverv Alternative gov- 3,097,488 7/1963 Eggenberger 60/105 ernors are disclosed which include droop and isochro- 3,097,490 7/1963 Callan et a1.... 60/105 nous versions as well as a governor featuring propor- 3,552,872 1/1971 Giras et a1. 415 tional plus integral control. All embodiments are en- 3,572,959 3/1971 Shaughnessy 415/30 1 digital in design and inherently immune to drift due to temperature and power supply variations.

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SHEET, l 0F 15 DIGITAL GOVERNOR The present invention relates in general to apparatus for controlling the speed of prime movers and more specifically to electronic speed control governors employing digital techniques.

The primary function of speed governors is to maintain the speed of prime movers essentially constant during variations in the load on the prime mover. Conventional speed governors employ a reference signal representing the desired or set point speed. To this signal is compared a signal corresponding to the actual speed of the prime mover, the difference between these signals resulting in a servo correction signal for controlling, through an appropriate autuator, the energy flow to the prime mover to correctively adjust the speed and thereby to reduce deviations between the compared signals to zero. The performance of a typical governor in responding to speed changes to produce a correction signal is measured by the speed of correction or free dom from lag, the stability of control and the immunity from drift in operation due to the effects of temperature, aging, and power supply variation on components of the system. The speed governors heretofore available in the art were limited in their capacity for improvement in accordance with the above criteria in that they were inherently analog devices, relying on the stability and accuracy of discrete signal levels at all stages of decision and control within the system. These discrete signals, be they mechanical, electrical or hydraulic signals, were inherently dependent for their reliability on devices subject to the above-mentioned environmental factors.

Accordingly, it is the primary object of the present invention to provide a speed governor for prime movers which is inherently immune to drift in its operating characteristics due to temperature, aging, and power supply variations. It is a related object to provide such a governor which is nonetheless characterized by fast response and excellent stability over wide ranges of load variations on the prime mover.

It is another object of the present invention to provide an electronic governor which is all-digital in design and which relies to only a minimal extent on the stability of discrete components within the system.

There are two basic types of governors, droop governors and isochronous governors. A droop" governor controls energy flow to the prime mover in a fashion such that as load torque on the prime mover (operating as a single unit) increases, the steady state speed decreases from the no-load set point value. For a given set point, there is a particular steady state speed which obtains for each value of load. Droop governors are employed principally to control prime movers driving alternators connected in parallel and thus subjected to synchronizing torque, at least one governor-prime mover-alternator system being isochronous to maintain the electrical system frequency. By adjusting the set point signal of a droop governor so connected to control a prime mover driving an on line alternator, the share of system load provided by that alternator is changed. An isochronous governor, on the other hand, simply controls the rate of energy flow to the prime mover to make actual speed equal to set point speed, and thus to make the steady state speed error substantially zcro. Time integral and time derivative signal components may be utilized to reduce transient times and inhibit hunting. As such, an isochronous governor is inherently droop-free."

A further object is the provision of an all-digital design technique and apparatus which is applicable to the various common forms of governor controls, including both droop and isochronous governors, with equal effectiveness and with a minimum of complexity in converting from one form of control to the other.

Still another object of the present invention is the provision of a governor responding to speed variations of a prime mover at a rate and in an amount which is dependent only on speed variations and which is essentially independent of the adjusted value of the nominal steady state set point speed at which the prime mover is being maintained.

Another object is the provision of an all-digital electronic governor characterized by proportional control for an immediate response to load changes and resulting speed errors and integral control for reducing speed errors during prolonged off-speed periods.

It is a further object to provide a governor in which two periodically recurring signals respectively proportional in frequency to the actual speed of the prime mover and the desired set point speed are compared digitally to signal a number proportional to the integral of the difference in their respective periods.

A more specific object is the provision of digital signal comparing apparatus including a counter controlled to repetitively compare two recurring wave trains by counting up and down respectively during non-coincident periods of the respective wave trains, with the attendant advantage that the count in the counter at the end of each comparison operation provides a digital representation of the time integral of the difference in the periods of the respective wave trains. A related object is the provision of such signal comparison apparatus in which the counter capacity is minimized without loss of comparison accuracy by rendering the counter inoperative during the actual overlap of the two periods being compared during any given comparison operation.

An ancillary object of the present invention is the provision of a speed governor in which all internal computations are performed digitally, but which nonetheless is suitable for use with conventional electromechanical actuators. More specifically, it is an object to provide such a governor in which an electrical output signal suitable for driving an analog actuator is provided having an average d.c. content which is proportional to a digitally computed number representing the desired energy flow.

Yet another object of the present invention is the provision of a variable frequency oscillator for producing a speed reference signal having a period corresponding to the algebraic sum of a plurality of binary coded input signals. It is a related and more specific object to provide a variable frequency oscillator in which a binary up-down counter is employed and controlled to consecutively monitor a plurality of input signals and to count in a direction and for a period corresponding respectively to the sense and binary magnitude of each of said input signals, with the advantage that the time interval required for completing the sequence of monitoring each input signal and counting up or down for periods corresponding to the binary magnitude of each signal is linearly related to the algebraic sum of the binary numbers representing the values of the respective signals.

Other objects and advantages of the present invention will become apparent upon reading the following description, taken in conjunction with the accompanying drawings in which:

FIG. 1 is a simplified block diagram of an isochronous governor constructed in accordance with the present invention, showing the control equations associated with the various functional elements.

FIG. 2 is a block diagram of a modified version of the governor shown in FIG. 1 which is operational as a droop governor.

FIG. 3 is a block diagram of amodification of the governor shown in FIG. 2 illustrating the duplication of existing hardware for converting the governor of FIG. 2 into an isochronous governor.

FIG. 4 is a block diagram of a further modification of the governor of FIG. 2.

FIG. 5 is an explanatory diagram showing the manner in which FIGS. 6a-6f may be joined to form a composite, detailed schematic diagram of the governor shown by the generalized blocks in FIGS. 1-4.

FIGS. 6a-6f are detailed schematics of the actual circuits used in the generalized block shown in FIGS. 14.

FIGS. 713 are timing diagrams illustrating the operational features of the various circuits of FIGS. 6a-6f. While the invention has been shown and will be described in connection with certain preferred embodiments thereof, there is no intention that the invention is to be limited to the particular embodiments set forth.

On the contrary, it is intended to cover the various modifications, alternatives and equivalents falling within the spirt and scope of the invention.

AS used herein, the term signal is to be taken in a generic sense and is intended to include any electrical manifestation having information content. Thus a signal may be a voltage or current carriedby two lines or it may. be the parallel combination of binary bits presented simultaneously on a plurality of lines equal to the number of bits. In the former case the magni tude of the signal is measured in terms of current, voltage, frequency or period, whereas in the latter case the magnitude of the signal is measured by the binary numberrepresented by the simultaneously occuring logic states on the parallel lines.

The logic elements shown in connection with the following description typically operate between supply voltage levels of UV. and 5v., and in the descriptionto follow a logic I is assumed to be the 5v. level, while a logic 0 is the 0v. level.

In certain drawings digital circuit elements have been symbolically illustrated in the manner commonly used in the electronics art. In view of the widespread usage of certain elements, it is unnecessary to give a detailed description of the combination of components constituting each logic element, and it will be readily appreciated by one skilled in the art that many different variations and combinations of components can be used to perform the logic function assigned to each logic element. However, a brief description of the operation of these common elements will be helpful in understanding the operation of the digital control system of this invention. A flip-flop is a two stage circuit having two stable states. In one state, the first stage conducts and the second stage is cut off. In the other state, the sec- 0nd stage conducts and the first stage is cut off. The flip-flops are illustrated as rectangles having a set section S and a reset section R. Input terminals are attached to the left side of the flip-flops, as illustrated in the drawings, and output terminals are attached to the right side thereof. When an input signal or pulse is applied to the input terminal of the S section, the flip-flop is set and the desired output signal, typically a logic I, is provided at the S output terminal only. When an input signal or pulse is applied to the R input terminal, the flip-flop is reset" and the desired output signal 1 is provided at the R output terminal only. Naturally, the S and R outputs must always have opposite logic levels. A small circle at the input of a logic element indicates that the element responds to a negative-going or trailing edge of a pulse applied at that input, whereas an uncircled input terminal indicates that the logic element responds to a positive-going or leading edge of a pulse applied at that terminal. A small circle at the output terminal of a logic element indicates that the desired output signal will be negative-going or logic 0, whereas an uncircled output indicates that adesired output signal will be positive-going or logic I. When an input signal or pulse is shown as applied to a terminal connected to the junction to the S and R sections, the element is intended to represent a clocked flip-flop, characterized by the fact that the stable state at the input of the S and R sections will be shifted to the outputs of the S and R sections respectively only upon the occurrence of a clock" pulse at the junction terminal. A clocked type flip-flop will act as a binary counter. if the R output is connected to the S input and the S output is connected to the R input (commonly known as the .I-K configuration). With these cross connections, the flip-flop is set with each even numbered clock pulse at the clock terminal and reset with each odd numbered pulse at the clock terminal. Clocked flipflops normally have an additional pair of input terminals 8,, and R, for directly setting or resetting the flipflop without waiting for the occurrence of a clock pulse. In practice, a set flip-flop is said to be in the 1 state, while a reset flip-flop is in the 0 state.

An OR gate as used herein produces a desired output I level signal in response to a 1 input signal at any of its input terminals, while an AND gate produces a desired l output signal only in response to 1 level input signals at all of its input terminals simultaneously. When the desired output signal is a logic 0, the gates are respectively termed NOR and NAND gates. An inverter (INV) converts a 1 level signal into a 0 level signal and vice versa. Finally, certain logic functions in the embodiments to be described, such as binary counting and multiplexing, may be performed by multi-function logic elements which have been standardized in the digital art and which are available in single-package integrated circuits. While these multi-function circuits are characteristically combinations of simple flip-flops and gates, their operation is better understood by reference to the overall function and input-output characteristics. Thus the detailed description of the internal construction of these elements is incorporated by reference to the manufacturer and his assigned type number for the element.

GENERAL DESCRIPTION OF THE VARIOUS EMBODIMENTS AND THEIR OPERATION Turning now to FIG. 1, a functional block diagram illustrates a digital governor constituting an exemplary embodiment of the present invention. A prime mover to be governed is supplied from an energy source 12, the rate of supply being regulated by a throttle valve 14 mechanically controlled by an actuator 16. The prime mover 10 is shown mechanically connected to drive a load 18 while additionally being connected to aspeed signal generator or transducer 20.

The prime mover 10 may, for example, be an internal combustion gasoline engine, in which case the energy source 12' would'be a gasoline supply having an output conduit controlled by the throttle valve 14. Alterna tively, the prime mover 10 may take the form of hydraulic turbine whose load is an electric generator, in which event the energy source 12 may be a source of pressure fluid from a hydraulic pressure head such as the pen stock of a power dam.

The primary purpose of a speed governor is to maintainthe speed of the prime mover 10 substantially constant at a selected set point speed regardless of variations in the load 18* and the torque it imposes on the prime mover. Where the load is an electric generator, the torque variations will be due to sudden changes'in the amount of current drawn from the generator. Similarly, if the prime mover is an engine for driving a vehicle, the load 18 will vary due to changes in the terrain over which the vehicle passes. The conventional speed governor employs a speed reference against which a signal proportional to the actual speed of the prime mover is compared to produce a speed error signal for adjusting the actuator, which in turn adjusts the rate of energy flow tothe prime mover to close the control loop.

In conventionalgovernors, either of two basic actuator types may be used, integrating or proportional." A proportional actuator is characterized by the fact that the position of the control throttle is at all times proportional to the magnitude of the signal supplied thereto;

In contrast, an integrating actuator moves the throttle at a velocity depending upon or proportional to the magnitude of the signal supplied theireto and by an amount determined by the time integral of the inputsignal.

The actuator 16 shown in FIG. 1 of the proportional type, an example of which is shown and fully described in U.S. Pat. No. 3,442,277, issued May 6, 1969 to Bernard B. Barnes andassigned to the assignee of the present invention. Reference may be made to the above-identified patent for a more complete explanation of the advantages of the proportional acutators over integrating actuators.

The speed governor of the present invention departs considerably from the conventional speed governors discussed above, and, as will be more fully explained in the discussion to follow, applicants governor is readily adaptable for operation as either a droop or non droop" (isochronous) governor, with the further advantage that the proportional-type actuator 16 may be used in either mode of operation.

As illustrated in FIG. 1, the governor of the present invention includes a reference signal generator 22 for producing a signal in the form of a train of pulses having a reference frequency f, proportional to the desired speed of the prime mover. The reference signal period t, is thus inversely proportional to the desired speed, bearing in mincl the basic and well known relationship that the period t of any recurring event or wave is equal to the reciprocal ofthe event or wave frequencyf, i.e., t=l/f. This pulse train, along with a train of pulses from the transducer 20 having a period t, or spacing inversely proportional to the actual speed of the prime mover, is fed to a comparator-integrator unit 40 which produces a binary encoded servo control signal Z having a numerical magnitude proportional to the time integral of the difference between the respective periods t, and r, of the two pulse trains. The servo control signal Z is then fed through a digital-to-analog converter 46 to the proportional actuator 16 which correctively adjusts the throttle l4, and thus the rate of energy flow and the speed of the prime mover 10 so that the difference between the periods 1 and t of the respective pulse trains is reduced substantially to zero. The reference frequency may, in different embodiments, represent the instantaneous desired speed or the long term desired set point speed.

Although an exemplary form of the reference signal generator 22 will be later described, for the embodiment of FIG. 1 any of a wide variety of simple pulse generators known to the art may be employed. In one preferred form, the generator 22 will supply a highly stable constant, but manually adjustable, frequency f, equal to the frequency f, of the speed pulses when the prime mover is stabilized at the desired set point speed. In an alternative form to be described, the generator 22 may provide a reference frequency f, which changes quickly in response to variable factors represented by signaled, changeable input numbers.

For the purpose of producing a train of pulses having a period varying with the speed of the prime mover, the speed signal generator 20 is in the fonn of a speed-tofrequency converter or transducer, having a mechanical input from the prime mover 10 which is effective to produce a train of speed pulses on an output line 38 having a period t, which varies inversely in accordance with the speed of the prime mover. The speed signal generator 20 may, for example, comprise a toothed or gear wheel mounted for rotation by the prime mover 1 0 for cutting either a light path to a photosensitive pickup or a flux path of an inductive pickoff in a manner well known in the art. The electrical pulses generated by the photoelectric or inductive pickup constitute the'aforementioned train of speed pulses.

The signal comparator-integrator 40 is connected to receive the reference pulses on line 36 and the speed pulses on line 38. The device 40 includes an input logic section 42 for effectively measuring the respective periods t and t, by selectively controlling the counting of high frequency pulses during time segments proportional to t, and t, in a manner to be hereinafter described. The period measuring logic supplies an input to an integrating counter-register combination 44 which functions by successive iterations to perform the indicated algebraic functions, wherein e represents the instantaneous difference (measured at iteration time interval n) of the periods t, and 1,, C, is a multiplication factor, and the servo correction signal Z is a binary number representing the sum of the accumulated measurements of the time differece between the periods t, and t, or, effectively, the time integral of the period difference (t,,t,-). The control signal 2 is coupled to the proportional actuator 16 through the digital-to-analog (D to A) converter 46 to close the primary governor servo loop. The analog form of the digital signal Z is here designated Z to distinquish the two.

The system thus far described governs the speed in an isochronous manner. A drop in the speed in the prime mover 10 due to an increase in load will produce a period difference t,,t, which, through amplification and integration, will increase the control signal Z and the rate of energy flow through the valve 14 to return the prime mover to the desired set point speed. Such a governor will control the engine speed satisfactorily for certain engines in which induction loss is high. For other prime mover configurations, however, an added degree of stability is desirable to prevent hunting or oscillation of the speed error, especially when overall system gain is high.

The embodiment of the invention shown in FIG. 2 provides this additional degree of stabilization by inclusion of a reference signal generator 22 having operative elements responsive to the servo control Z for varying the period t, of the reference pulses in accordance with variations in the control signal Z. To this end, the reference signal generator 22 is illustrated as being driven by a clock pulse source 26 andproviding a frequency division function,

fr fc 1 wherein f, is the constant frequency of the clock source 26, f, is the frequency of the reference pulse train and B is anon-dimensional number representing the algebraic sum of a plurality of binary coded signals provided at

inputs

28 and 30 respectively. in the present instance,

where Z, received at input 30, is the binary coded servo correction number previously described and R, received at input 28, is a set point number which in this instance is a binary ls complement of a set point number R signaled by a series of adjustable digit switches hereinafter described. Since the frequency f, of the reference pulse train appearing on the output line 36 is inversely proportional tothe algebraic summation number B,, an increase in the set point number R will cause a decrease in the frequency f, and therefore an increase in the period t,. In other words, the period t, is directly proportional to the manually settable number R.

At this point, and to avoid momentary confusion, it should be noted that the number R appears as a positive number in the expression B, R Z labeled in FIG. 2. As will appear more fully below, the set point number R is the l' complement of a true, conventional set point number R. The binary ls complementing device 29 is provided so that the frequency f, ries in sense with variations in the manual setting of R.

Similarly, as 2 increases, the divisor B increases and the period t, of the reference pulses increases. The period t, thus changes directly in accordance with variations in the control signal Z. If the load 18 is a single unit (and not an alternator connected to an infinite bus"), the result of the feedback of Z on the path 47 will be to introduce a finite speed error, or droop, to the system, the magnitude of which depends on the load. As the servo control signal Z increases in response to a load increase on the prime mover 10, the period I, also increases to approach the period t, and

v to restore the periods t, and t, to a condition of equality with each other. As a result, the period difference t,-t,

will be quickly reduced before appreciable lags in the governor control loop can introduce serious overshoot in the response.

As an additional feature of the invention, the digital governor system shown in FIG. 2 as a droop type system may be readily expanded, by duplication of the same hardware building blocks and the adjustment of constants, into an isochronous system. Such a conversion has been illustrated in the embodiments shown by FIG. 3 and FIG. 4, the lower portion of each comprising a droop digital governor essentially identical to that shown in FIG. 2. Focusing first on the embodiment of FIG. 3, the upper portion of the drawing shows the functional block diagram ofwhat is, in effect, a second governor acting to control the output frequency f, of the reference signal generator 22 of the primary governor. Thus the functional blocks of the primary governor already described are duplicated and the reference numbers remain the same as for the identical elements of FIGS. 1 and 2.

Accordingly, the embodiment of FIG. v3 includes all the elements and produces all the control signals of the embodiment of FIG. 2 but further includes an auxiliary signal generator 50 settable to produce a third train of pulses at a predetermined fixed frequency f equal to the frequency which the aforementioned reference and speed pulses will attain under no-load, droop-free conditions of the embodiment of FIG. 2. The period t, of this third train of pulses provides a standard for and is compared with the period t of the reference pulses in a second comparator-integrator 64 which produces a binary coded reference control signal Z having a numerical magnitude which varies in accordance with the time integral of the difference between the respective periods t, and t The reference control signal Z is connected to the input 34 of the reference signal generator 22 in opposition to the servo control signal Z. The rate of integration of the second (upper) comparatorintegrator 64 is chosen to be much slower than that of the first (lower) comparator-integrator 40 so that the reference control signal Z will gradually eliminate the effect of the servo control signal Z-on the factor B, and thus on the period t, of the reference signal. Therefore, the upper portion of the embodiment of FIG. 3 effectively de-droops the droop governor shown in the lower portion, but it does so at a rate which is too slow to interfere with the stabilizing effect provided by the feedback of the servo control signal Z to the reference generator 22. As such, the embodiment of FIG. 3 provides a reset or integral correction over the term.

The auxiliary generator 50 performs a frequency division function as indicated by the equations labeled in the frequency divider 52 and the reference control logic 54. Inputs 56, 58 are shown to illustrate a capacity for algebraic summation of binary signals in the generator 50, but in isochronous operation (with a switch open, as shown) the only input signal to the control logic S4 is the speed set point number R, the auxiliary signal generator 50 producing an output frequency f fc/ which remains constant at all times. The second comparator-integrator 64 is connected to receive the reference pulses at a frequency f, from the primary governor and the auxiliary pulses at a frequency f from the auxiliary generator 50 appearing on a line 66. Like the comparator-integrator 40 of the primary governor, the device 64 provides a period measuring logic function, an error detection function, a multiplication or

Claims

1. In an electronic governor for controlling the speed of a prime mover by controlling the flow of energy thereto, the combination comprising means including a transducer for producing a first train of pulses spaced by a period ts which varies in accordance with the actual value of said speed, a reference signal generator for producing a second train of pulses having a period tr corresponding to a desired speed set point, signal comparison means coupled to said transducer and said reference signal generator for producing a servo control signal Z digitally representing the numerical value of the time integral of the difference between the respective periods of said first and second pulse trains such that Z integral C(ts-tr)dt, means including an actuator responsive to said servo control signal for correctively adjusting the rate of said energy flow to restore equality between the periods of said speed and reference pulses.

2. An electronic governor for conTrolling the speed of a prime mover by controlling the flow of energy thereto, comprising means including a transducer for producing a first train of pulses spaced by a period ts which varies in accordance with the actual value of said speed, a reference signal generator for producing a second train of pulses having a period tr corresponding to a desired speed set point, signal comparison means coupled to said transducer and said reference signal generator for producing a servo control signal Z having a magnitude which varies in accordance with the time integral of the difference between the respective periods of said first and second pulse trains such that Z Integral C(ts-tr)dt, means including an actuator responsive to said servo control signal for correctively adjusting the rate of said energy flow to reduce the time difference between the respective periods of said pulse trains to zero, and stabilizing means operatively associated with said reference signal generator and responsive to said servo control signal for varying the period of said reference pulses in accordance with variations in said servo control signal.

3. An electronic governor according to claim 2 in which said servo control signal is in binary coded form and digitally represents the numerical value of the time integral of said period difference and wherein said means for adjusting the rate of said energy flow includes a digital-to-analog converter connected for receiving said servo correction signal and for producing a dc. electrical signal of a magnitude proportional to the binary magnitude of said servo control signal, said d.c. signal being coupled to said actuator for effecting adjustment of the energy flow.

4. An electronic governor for controlling the energy flow to a prime mover to stabilize the speed thereof at a desired set point, comprising means including a transducer for producing a first train of pulses spaced in accordance with the actual value of said speed, a reference signal generator for producing a second train of pulses having a reference pulse frequency and period; signal comparison means coupled to said transducer and said reference signal generator for producing a servo control signal having a magnitude which varies in accordance with the time integral of the difference between the respective periods of said first and second pulse trains, stabilizing means operatively associated with said reference signal generator and responsive to said servo control signal for varying the period of said reference pulses in accordance with variations in said servo control signal, means including an actuator responsive to said servo control signal for correctively adjusting the rate of said energy flow, whereby the actual value of said speed tends to be maintained at a speed corresponding to the period of said reference pulses, means including an auxiliary signal generator settable to produce a third train of pulses at a frequency equal to the frequency of said first and second pulse trains when said speed is stabilized at a desired set point value, and means connected to receive said second and third pulse trains for producing a reference control signal varying in accordance with the time integral of the difference between the periods of said second and third pulse trains, said reference control signal being connected to said reference signal generator in opposition to said servo control signal for gradually eliminating the effect of said servo control signal on the period of said reference pulses.

5. An electronic governor according to claim 4 wherein said servo control and reference control signals are produced in binary coded form and have binary magnitudes digitally representing the numerical values of said integrals of the respective period differences and wherein said reference signal generator and said means for controlling the energy flow are adapted for response to Said binary coded signals.

6. An electronic governor for controlling the energy flow to a prime mover to stabilize the speed thereof at a desired set point, comprising means including a transducer for producing a first train of pulses spaced in accordance with the actual value of said speed, a reference signal generator for producing a second train of pulses having a reference frequency and period, signal comparison means coupled to said transducer and said reference signal generator for producing a servo control signal having a magnitude which varies in accordance with the time integral of the difference between the respective periods of said first and second pulse trains, stabilizing means operatively associated with said reference signal generator and responsive to said servo control signal for varying the period of said reference pulses in accordance with variations in said servo control signal, means including an actuator responsive to said servo control signal for correctively adjusting the rate of said energy flow so that the difference between the periods of said first and second pulse trains is reduced to zero, means including an auxiliary signal generator settable to produce a third train of pulses at a frequency equal to the frequency of said first and second pulse trains when the said speed is stabilized at the desired set point, and means connected to receive said first and third pulse trains for producing a reference control signal varying in accordance with the time integral of the difference between the periods of said first and third pulse trains, said reference control signal being connected to said reference signal generator in opposition to said servo control signal for gradually eliminating the effect of said servo control signal in varying the period of said second pulse train.

7. An electronic governor according to claim 6 wherein said servo control and reference control signals are produced in binary coded form to digitally represent the numerical value of said respective measured time integrals and wherein said reference signal generator and said means for controlling the energy flow are adapted for response to binary coded signals.

8. In an electronic governor for controlling the flow of energy to a prime mover to stabilize the speed thereof at a desired set point, the combination comprising means including a transducer for producing a first train of pulses spaced in accordance with the actual value of said speed, a reference signal generator having an input circuit for simultaneously receiving a plurality of number-representing, multi-bit binary coded signals, an output terminal and means responsive to said binary coded signals for producing at said output terminal a second train of pulses spaced in accordance with the algebraic sum of the numbers represented by said binary coded input signals, manually settable means for producing a first one of said binary coded input signals with a numerical value corresponding to the desired set point speed, signal comparison means coupled to receive said first and second pulse trains for producing a binary coded servo control signal digitally representing the numerical value of the time integral of the difference between the respective periods of said first and second pulse trains, and means including an actuator responsive to said servo control signal for correctively adjusting the rate of said energy flow to reduce said difference between said respective periods to zero, said servo control signal additionally being coupled to said generator input circuit to provide a second binary coded input signal whose numerical value is algebraically summed with that of said manually settable binary signal to effect stabilization in the response of the governor to variations in said speed.

9. In an electronic governor, the combination according to claim 8, further comprising an auxiliary signal generator settable to produce a third train of pulses at a frequency equal to the frequency of said first and second pulse trains when the actual value of said speed is stabilized at the desired set point speed; and means connected to receive said second and third pulse trains for producing a reference control signal digitally representing the numerical value of the time integral of the difference between the periods of said second and third pulse trains, said reference control signal being connected as a third binary coded input signal to said generator input circuit in opposition to said servo control signal for gradually eliminating the effect of said servo control signal on the period of said second train of pulses.

10. In an electronic governor, the combination according to claim 8, further comprising an auxiliary signal generator settable to produce a third train of pulses at a frequency equal to the frequency of said first and second pulse trains when the actual value of said speed is stabilized at the desired set point speed; and means connected to receive said first and third pulse trains for producing a reference control signal digitally representing the numerical value of the time integral of the difference between the periods of said first and third pulse trains; said reference control signal being in binary form and connected to said generator input circuit in opposition to said servo control signal for gradually eliminating the effect of said servo control signal on the period of said second train of pulses.

11. In an electronic governor for maintaining the speed of prime mover by controlling the flow of energy thereto, the combination comprising means including a transducer for producing a first train of pulses spaced by periods ts which vary inversely in accordance with the actual value of said speed, a reference signal generator for producing a second train of pulses having a reference period tr, signal comparison means including a. a source of clock pulses at a high frequency, b. a multi-stage binary counter having first and second clock input terminals for selectively controlling the direction of counting in an up-count and down-count direction respectively, c. a logic circuit coupled to receive said first and second pulse trains and adapted to control the coupling of said clock pulse source to said first and second clock input terminals respectively for intervals corresponding to the respective periods ts and tr of said speed and reference pulse trains, d. a holding register controlled by said logic circuit for samplng the contents of said counter at predetermined intervals to produce a binary coded control signal having a numerical magnitude which varies in accordance with the average value of the count in said counter, and means including an actuator responsive to said binary control signal for correctively adjusting the rate of said energy flow to reduce the time difference between the respective periods of said first and second pulse trains to zero.

12. In an electronic governor for maintaining the speed of a prime mover by controlling the flow of energy thereto, the combination comprising means including transducer for producing a first recurring signal having a period ts which varies inversely according to changes in the actual value of said speed; a reference signal generator for producing a second recurring signal having a reference period tr; period difference integrating means including an up-down binary counter and a counter logic circuit selectively controlling the direction of counting, said logic circuit being responsive to said first and second signals and causing said counter to count up and down respectively for intervals correspondng to the non-overlapping portions of partially overlapping respective periods ts and tr; a digital register means for sampling and holding the counter contents at the end of each up-and-down operatiOn of said control logic circuit, said register having output means for producing a servo control signal digitally representing the numerical value of the time integral of the difference between said periods; and means including an actuator responsive to said servo control signal for correctively adjusting the rate of said energy flow to reduce the time difference between respective periods of said pulse trains to zero.

13. The combination defined in claim 12 wherein said counter logic circuit is operative during each up-and-down operation to inhibit counting in either direction during the interval of timing overlap of the respective periods ts and tr so that unnecessarily large excursions by the counter are prevented.

14. The combination defined in claim 12 further including a source of clock pulses for driving said counter in an up-count or down-count directon under the control of said counter logic circuit and wherein the rate at which said servo control signal changes in response to a given difference between the respective periods ts and tr is dependent only upon the frequency of said clock pulses.

15. The combination defined in claim 11 wherein the frequency of said clock pulses is several orders of magnitude higher than the frequencies of the said first and second signals, and wherein said summing means operates at a gain factor C dependent only upon said clock pulse frequency, the servo control signal having an average value of Sigma C(ts-tr) where C (ts-tr) is the net change in the counter number resulting from each up-and-down operation.

16. An electronic governor for maintaining the speed of a prime mover by controlling the flow of energy thereto, comprising means including a transducer for producing first recurring signal having a period ts which varies inversely according to the actual value of said speed, means including a reference signal generator for producing a second recurring signal having a reference period tr, signal comparison means coupled to said transducer and said reference signal generator for producing a servo control signal having a magnitude which varies in accordance with the time integral of the difference between the respective periods ts and tr of said first and second signals, said comparison means including a. an up-down counter, b. a source of clock pulses of a given frequency, c. means for causing said counter in effect to count the clock pulses up during successive ones of said periods ts and down during successive ones of said periods tr, and d. means for periodically reading out the contents of said counter at the end of up-down cycles to thereby produce a servo control signal numerically representing said time integral, and means including an actuator responsive to said servo control signal for correctively adjusting the rate of said energy flow to reduce the time difference between the respective periods of said pulse trains to zero, whereby the servo control signal varies with an average value equal to Integral C (ts-tr) and the gain factor C is entirely independent of the frequencies and periods of the first and second signals.

17. The combination set forth in claim 5 further characterized in that said signal comparison means includes a. an up-down counter b. a source of clock pulses c. means for causing said counter in effect to count the clock pulses upwardly and downwardly respectively during the periods of said first and second trains of pulses so that the net change in the counter contents is equal to the difference in the respective periods multiplied by a factor C proportional to the clock pulse frequency, and d. means for reading out the contents of said counter after each up-down count cycle to form said servo control signal which thereby is affEcted in gain only by the clock pulse frequency and not by the frequencies or periods of said first and second trains.

18. In a governor for controlling the rate of energy input to a prime mover to control its speed, the combination comprising means for producing a signal having a parameter varying in accordance with the actual value of said speed, means for producing a second signal having a reference parameter adjustable or variable in accordance with the desired speed set point, means responsive to said first and second signals for producing a servo control signal digitally representing a changeable number and for updating said number during successive iteration periods by an amount which is the product of a gain factor and the difference between the parameters of said first and second signals, and means for varying said rate of energy input according to the average value of the number represented by said servo control signal.

19. In a governor for controlling the rate of energy input to a prime mover to control its speed, the combination comprising means for producing a first signal having a first parameter varying in accordance with the actual value of said speed, means for producing a second signal having a reference parameter adjustable or variable in accordance with the desired value of speed, a source of clock pulses having a clock frequency, a reversible counter, means responsive to said first and second signals for causing said counter to count said clock pulses upwardly and downwardly during different time portions of repeating count operation cycles, the up portion of each counting cycle being proportional to said first parameter and the down portion being proportional to said reference parameter, means for periodically reading out the number contents of said counter to signal a periodically updated servo control number which in average value varies as the time integral of the product of a gain constant C times the difference between said first and reference parameters, and means for making said rate of energy input proportional to said signaled servo control number, whereby the gain constant C is determined by and is proportional to the clock pulse frequency and is independent of the values of the first and reference parameters.

20. A speed governor for controlling the rate of energy flow to a prime mover to maintain the speed thereof at a desired set point, comprising in combination manually settable means for producing a first signal having a parameter corresponding to a desired set point speed, means associated with said prime mover for producing a second signal havng a parameter varying with the actual value of said speed, servo control means connected to receive said first and second signals including a digital signal comparator and amplification device for producing a control signal having a magnitude proportional to the departure of said second signal from said first signal, servo means including an actuator coupled to said servo control means for correctively adjusting and maintaining said flow of energy at a rate proportional to the magnitude of said control signal, and trim means connected to receive said first and second signals for generating a third signal having a parameter which varies in accordance with the time integral of speed departures from the desired set point, said third signal being connected to said servo control means to effect a gradual adjustment of said servo control signal and thereby to restore the actual value of said speed to the desired set point, said servo control means being operative to produce said control signal with a high degree of amplification which is independent of the set point or actual speed.

21. An electronic governor for controlling the flow of energy to a prime mover to stabilize the speed thereof comprising manually settable means for generating a first binary coded signal correspOnding in numerical value to a desired set point speed, means including a transducer for producing a train of speed pulses having a frequency varying with the actual value of said speed, reference generating means for producing a train of reference pulses, comparison means adapted to receive said actual value and reference pulses for producing a second binary coded signal corresponding to deviations in the actual value of said speed from the desired set point, means including an actuator responsive to said second binary coded signal for adjusting the rate of said energy flow to correct for said speed deviation, said reference generating means including a variable frequency oscillator responsive to said first and second binary coded signals and operative to produce said reference pulses at a frequency which varies in accordance with the algebraic sum of said binary coded signals.

22. In a system for controlling the rate of energy input to a prime mover to govern the speed of the latter, the combination comprising means for producing a first signal having a parameter which varies according to the actual value of said speed, means for producing a reference signal having a variable parameter indicative of the instantaneously desired speed, means responsive to said signals for iteratively signaling in numerical form the error e constituted by the difference between the parameter values of the first and second signals, means coupled to said signaling means for signaling plural bits which in binary or coded binary notation represent an iteratively updated number Z which changes during successive iterations according to the relation Zn Zn 1+ C e where C is a gain factor and n designates the successive iteration periods, and means responsive to said signaled bits for making said rate of energy input proportional to the number Z.

23. In a system for controlling the rate of energy input to a prime mover to govern the speed of the latter, the combination comprising means for producing first recurring signals having a period ts inversely related to the actual value of said speed, a reference signal generator having means to produce second recurring signals having a reference period tr, means responsive to said first and reference signals for signaling plural bits which in binary or binary coded notation represent an iteratively updated number Z which changes during successive iterations according to the relation Zn Zn 1+ C (ts - tr)n where C is a gain constant and n designates the successive iteration periods, and means responsive to said plural bit signals for varying said rate of energy input in accordance with variations of the represented number Z.

24. In a system for controlling the rate of energy input to a prime mover to govern the speed of the latter, the combination comprising means for producing first recurring signals having a period ts inversely related to the actual value of said speed, a reference signal generator having means to produce second recurring signals having a reference period tr, means responsive to said first and second signals for signaling a first set of plural bits which in binary or binary coded notation represent an iteratively updated number Z which changes during successive iterations according to the relation Zn Zn 1 + C (ts - tr)n where C is a gain factor and n designates the successive iteration periods, means responsive to said plural bit signals for varying the said rate of energy input in accordance with variations of the represented number Z, and means coupled to receive said plural bit signals and responsive thereto for causing the reference period tr of said second signals from said generator to vary in accordance with variations of the represented number Z.

25. The combination set forth in claim 24 further characterized in that said last-named means comprises means for causing said generator to vary the period tr according to the relation: tr A + Z/ fc where A is the composite sum of other numbers which may be constants or variables and fc is a fixed or variable proportionality factor.

26. The combination set forth in claim 25 further characterized in that A is equal to R, and R is a number representing set point speed in a relationship wherein increases in R correspond to decreases in set point.

27. The combination set forth in claim 25 further characterized in that A is equal to R - Z'', where R is a number representing desired set point speed in a relationship wherein increases in R correspond to decreases in set point, and Z'' is a number which varies as the time integral of the difference (tr-ta), the period ta being directly variable according to changes in R.

28. The combination set forth in claim 27 further characterized in that the period ta is directly variable according to changes in the sum R + Z.

29. In a system for controlling the rate of energy input to a prime mover to govern the speed of the latter, the combination comprising means for producing first recurring signals having a period ts inversely related to the actual value of said speed, a reference signal generator having means for producing second recurring signals having a reference period tr, means responsive to said first and second signals for signaling plural bits which in binary or binary coded notation represent an iteratively updated number Z which changes during successive iterations according to the relation Zn Zn 1 + C1 (ts - tr)n where C1 is a gain constant and n designates the successive iteration periods, means responsive to said plural bit signals for varying said rate of energy input in accordance with variations of the represented number Z, means for producing auxiliary recurring signals having a period ta, means responsive to said second and auxiliary signals for signaling a second set of plural bits which in binary or binary coded notation represent a second iteratively updated number Z'' which changes during successive iterations according to the relation Z''n Z''n 1 + C2(tr - ta)n where C2 is a gain factor and n designates the successive iteration periods, and means responsive to said first and second sets of plural bit signals for controlling said reference signal generator to vary said reference period tr according to changes in the sum (Z - Z'').

30. The combination set forth in claim 29 further including means for producing a third set of plural bit signals representing an adjustable set point number R, means associated with said auxiliary signal producing means and responsive to said third set of bit signals for causing the period ta to vary directly according to the value of the number R, and said means for controlling said reference signal generator including means responsive to said first, second and third sets of bit signals for varying said reference period tr according to changes in the sum R + Z - Z''.

31. The combination set forth in claim 30 further characterized in that said means associated with said auxiliary signal producing means includes means responsive to said first and third sets of bit signals for causing the period ta to vary directly according to the value of the sum R + Z.

32. The combination set forth in claim 29 wherein the factor C1 is greater than the factor C2.

33. In a system for controlling the rate of energy input to a prime mover to govern the speed of the latter, the combination comprising means for producing first recurring signals having a period ts inversely related to the actual value of said speed, a reference signal generator having means to produce second recurring signals having a reference period tr, means responsive to said first and second reference signals for signalling a first set of plural bits which in binary or binary coded notation represent an iteratively updated number Z which changes during successive iterations according to the relation: Zn Zn 1 + C1 (ts -tr)n where C1 is a gain constant and n designates successive iteration periods, means responsive to said first set of plural bit signals for varying said rate of energy input in accordance with variations in the represented number Z, means for producing auxiliary recurring signals having a perDwd ta, means responsive to said first and auxiliary signals for signaling a second set of plural bits which in binary or binary coded notation represent an iteratively updated number Z'''' which changes during successive iterations according to the relation Z''''n Z''''n 1 + C2(ts -ta)n where C2 is a gain factor and n designates the successive iteration periods, and means responsive to said first and second sets of bit signals for controlling said reference signal generator to vary said reference period tr according to changes in the algebraic sum (Z - Z'''').

34. The combination set forth in claim 33 further including means to vary the auxiliary reference period ta in accordance with a signaled set point number R, and said means for controlling said reference signal generator includes means responsive to said first and second sets of bit signals and the signaled number R for varying the reference period tr in accordance with changes in the sum R + Z - Z'').