US3777471A - Presettable frequency divider for electronic timepiece - Google Patents

Presettable frequency divider for electronic timepiece Download PDF

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Publication number
US3777471A
US3777471A US00175662A US3777471DA US3777471A US 3777471 A US3777471 A US 3777471A US 00175662 A US00175662 A US 00175662A US 3777471D A US3777471D A US 3777471DA US 3777471 A US3777471 A US 3777471A
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Prior art keywords
frequency
divider
pulses
stages
standard
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US00175662A
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English (en)
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D Koehler
J Zupfer
J Prak
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Bulova Watch Co Inc
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Bulova Watch Co Inc
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    • G—PHYSICS
    • G04—HOROLOGY
    • G04G—ELECTRONIC TIME-PIECES
    • G04G3/00—Producing timing pulses
    • G04G3/02—Circuits for deriving low frequency timing pulses from pulses of higher frequency
    • G—PHYSICS
    • G04—HOROLOGY
    • G04G—ELECTRONIC TIME-PIECES
    • G04G3/00—Producing timing pulses
    • G04G3/02—Circuits for deriving low frequency timing pulses from pulses of higher frequency
    • G04G3/022—Circuits for deriving low frequency timing pulses from pulses of higher frequency the desired number of pulses per unit of time being obtained by adding to or substracting from a pulse train one or more pulses
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/64—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two
    • H03K23/66—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses
    • H03K23/662—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses by adding or suppressing pulses

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  • ABSTRACT PP 175,662 An electronic timepiece in which the output of a stable, high-frequency standard such as a crystal oscilla- 52 U.S. Cl. 58/23 R, 58/50 R, 58/855, is fed to a Presettable frequency-divider to P 328/44 Jerusalem periodic low-frequency output pulses for actuat- 51 Int C
  • a stable, high-frequency standard such as a crystal oscilla- 52 U.S. Cl. 58/23 R, 58/50 R, 58/855
  • This invention relates generally to electronic timepieces, and more particularly to a timing system in which low-frequency periodic pulses for actuating a time display are derived from a presettable frequencydivider coupled to a stable high-frequency source.
  • the frequency standard or time base is generally in the form of a piezoelectric crystal-controlled oscillator or any other highly stable high-frequency source.
  • the time display is adapted to indicate time in terms of seconds, minutes and hours, and it is therefore necessary to divide'down the frequency of the time base to a low rate suitable for the associated display.
  • an electronic timepiece wherein pulses at a rate of one per second are generated, the pulses serving to actuate a liquid-crystal display for indicating the passage of time.
  • a crystalcontrolled oscillator operating at a frequency of 32,768 Hz, the output of the oscillator being applied to a chain of binary divider stages yielding an output of exactly one pulse per second.
  • a crystal-controlled time base operating at a frequency of 16,384 Hz is divided down by fourteen binary stages in tandem to yield one pulse per second for actuating a motor driving the gears of a conventional mechanical display having timeindicating hands.
  • the frequency of a crystal-controlled oscillator is divided down to produce one pulse per minute for activating an electronic display using light-emitting diodes.
  • the crux of the timepieces disclosed in the abovenoted patents lies in the crystal-controlled oscillator.
  • This high-Q oscillator not only has the advantage of being inherently more stable than other species of frequency standards, but it is further characterized by an insensitivity to position error.
  • the timepiece is in the form of a wrist watch, the frequency of the standard and hence the timing of the watch, is not adversely affected by changes in attitude.
  • a conventional crystal-controlled timepiece is a precise timekeeper only if the crystal is dimensioned to function at an assigned frequency.
  • one pulse per second for actuating the display is produced by dividing down the output of a crystal oscillator operating at a frequency of exactly 32,768 Hz. Should the crystal frequency be displaced from this particular value, the timepiece will be inaccurate to an extent depending on the degree of displacement. An error of only one part in 10 thousand in the crystal frequency will give rise to a timekeeping error of about ten seconds a day or five minutes a month. This error, under modern standards of accuracy for electronic watches, is unacceptable.
  • the frequency divider in the timekeeping system is an invariable element
  • the only means for assuring precise timekeeping is to provide a crystal operating at the assigned frequency.
  • the processes involved are elaborate and costly. Highly trained personnel are required to carry out the techniques entailed in exactly dimensioning a crystal so that it operates at an assigned frequency.
  • the crystal in an oscillator circuit having an adjustable reactor or a group of reactors which are selectively switched into the crystal circuit in order to slightly shift the oscillator frequency so that it operates at an assigned value. Should the deviation be fairly large, it is not possible even with large reactance values, to bring the oscillator frequency to the assigned value.
  • the frequency standard includes a crystal resonator whose frequency lies in a range slightly below said ideal value, whereby the crystal, since it need not meet highly restrictive tolerances, may be mass produced at reasonable cost.
  • an object of the invention is to provide a system including a presettable frequency divider operating in conjunction with a high-frequency standard whose frequency lies slightly below the ideal value at which the resultant low-frequency pulses are yielded at the desired repetition rate, which system is arranged to add pulses to the divider to an extent compensating for the deficiency of the standard.
  • an object of this invention is to provide a presettable divider of the above type which may be constructed as an integrated circuit and which may be readily adjusted to add the required number of pulses to the clock pulsessupplied by the standard.
  • clock pulses from a high-frequency time standard whose frequency is somewhat below an ideal frequency are applied to the main divider section of a presettable divider circuit having a predetermined number of binary divider stages, which number is such as to yield with respect to an ideal high-frequency, low frequency output pulses for activating a time display at a rate affording precise time indication.
  • the output pulses from the main divider section are applied to a supplemental divider section to generate a frequencyadjustment control pulse at a rate depending on the number of supplemental stages.
  • the control pulse is applied to a preset section coupled to selected stages of the main divider section, which preset section is adjustable to introduce a correction number in the main divider section compensating for the deficiency in the standard frequency whereby the total number of pulses yielded by the main divider, within a given period, is equal to the number of pulses that would have been yielded had the standard operated at the ideal frequency.
  • FIG. 1 is a block diagram showing the basic sections of a presettable frequency divider circuit in accordance with the invention, the circuit operating in conjunction with a timing display system;
  • FIG. 2 illustrates the logic circuit of one preferred embodiment of the presettable divider
  • FIG. 3 is a block diagram of a presettable divider in accordance with the invention, using electronic rather than mechanical switching means for adjusting the divider;
  • FIG. 4 shows the logic circuit for the presettable divider illustrated in FIG. 3, and
  • FIG. 5 is a block diagram of the logic circuit of another embodiment of the presettable divider.
  • FIG. 1 there is shown in block diagram the basic elements of an electronic timing system in accordance with the invention.
  • the system includes a stable, high-frequency time source 10, preferably in the form of a crystal-controlled oscillator having an output frequency f,,.
  • the output of oscillator is fed to a presettable divider arrangement including a main divider section 11 having n stages of binary division to produce output pulses at the desired rate for actuating a time display 12.
  • Display 12 may be in any available form, such as a liquid-crystal time indicator, an electro-luminescent time indicator or a mechanical time indicator.
  • the nature of the display forms no part of the present invention except that it must be of the type which can be actuated or synchronized by timed, low-frequency pulses.
  • the frequency f, of oscillator 10 lies within a range slightly below that of an ideal frequency f at which, as suming a non-settable frequency divider having n stages rather than a presettable divider of the same number of stages, would yield the desired output (i.e. 1 Hz).
  • ideal frequencyf 2".
  • the number of stages in main divider section 11 is such as to provide a 1 Hz signal from a 2" Hz source. If, therefore, one wishes, with a time source having a frequency f, slightly lower than frequency f, to produce output pulses which average f/n I-Iz, it is necessary to add an appropriate number of pulses to the main divider section to obtain this result.
  • This addition of pulses is accomplished in the presettable divider by means of a supplemental divider section 13 coupled to the output of main divider section 11.
  • the supplemental divider section is provided with m stages to yield a frequency adjustment increment or resolution of one part in 2"
  • the main divider section 11 cooperates with a preset section 14 coupled to the output of supplemental divider section 13, the preset section furnishing appropriate inputs to the preliminary stages (L) of the main divider.
  • main divider section 11 in combination with supplemental divider section 13 creates a divider chain of 20 stages. If we now allow for one additional input to each of the first six stages of the presettable divider, one obtains a total frequency adjustment range of 2 1 parts in 2" or 63 parts in 2 7 or 60 parts per million. This upper limit of the frequency adjustment range is equivalent to 5.2 seconds per day.
  • An alternative method to setting in a number in the first L stages of the main divider section once in every 2" input pulses is to enter an additional pulse in the first stage of'the divider up to 2' times during a complete cycle of the divider. By distributing the additional pulses evenly over the cycle, irregularity in a relatively high output frequency can be obviated.
  • m can be zero, in which event the resolution is 1 Hz in 2" Hz; and also that L can be one, in which case the adjustment range is one part in 2" Moreover, should a resolution of one part in 2" be greater than is desired, then m can be made negative. Under this circumstance, no supplemental dividing stage is required at all, and a feedback output may be generated at the (nm) stage in the divider chain.
  • the presettable divider functions to add pulses at the input of the main divider section to make up for a deficiency in the output of the high-frequency oscillator whose frequency f, is slightly less than the ideal frequency f.
  • the presettable divider therefore acts in an additive way to furnish the requisite number of pulses to make the output, on the average, equal to flu Hz.
  • the resonant frequency of a crystal depends on the dimensions of the crystal slab and the relationship between the geometry of the slab and the geometry of the crystal structure.
  • the crystal is first cut to a size approaching its assigned frequency, and then by extended lapping techniques, the crystal dimensions are slowly reduced until the frequency of the crystal reaches its assigned value. This means that great care must be exercised to prevent overshooting the assigned frequency, for once this happens, the crystal must be rejected.
  • FIG. 2 there is shown the logic circuit necessary to perform the preset function in the presettable divider composed of the main divider section 11, the supplemental divider section 13, and the preset section 14. Conventional symbols are used to represent flip-flop and gating functions.
  • the main divider section is composed of an appropriate number of binary counter stages 11,, 11 11,, 11,, to 1 1 the preliminary stages 1 l 11,, and 11 of which constitute the L stages.
  • the supplemental or m divider section 13, which is coupled to the output of the main divider section, is shown with a first stage 13,, and a last stage 13,
  • time source 10 The output of time source 10 is applied to the divider chain and when the m" divider section has attained full count, its last stage 13,, generates a pulse which is applied to and sets a flip-flop FFl.
  • Flip-flop FFl is associated both with a first AND gate G and a second AND gate G one input of each gate being coupled to time source 10.
  • the other input of gate G is connected to the Q output of flip-flop FFl while the other input of gate G is connected to the Q output thereof.
  • flip-flop FFl is set by a pulse derived from the last stage 13,, in the chain, which enables Gate G
  • the next clock pulse from time source 10 sets the L stages (11 11,, and 11 of the main divider section to the state determined by the setting of switches 8,, 8,, and 8,.
  • switch 8 If switch 8,, is in its x position, then the next clock pulse sets the associated binary stage 11,, to the 1 state, but if switch 8,, is on the y contact, then the clock pulse has no effect on the binary stage which remains in the 0 state.
  • flip-flop FFZ Associated with flip-flop FFl is flip-flop FFZ, whose C input is coupled to time source 10 and whose D input is connected to the Q output of flip-flop FFl.
  • the same clock pulse acting to enable gate G also sets flip-flop FF2, in that its D input was placed at the 1 level by the setting of flip-flop FFl.
  • flip-flop FFZ sets, this generates an output at its Q output which is applied to reset R of flip-flop FFl to reset this flip-flop, thereby causing gates G and G to revert to their original states in which Gate G is enabled and gate G disabled.
  • main divider section 11 The L stages of main divider section 11 are now connected as a ripple counter, which means that the counter with the next clock pulse from time source 10,
  • Switches 8,, 8,, and 8 though shown in the drawing as mechanical in nature, may in practice, be in the form of thin film connections on an integrated or printed circuit board, which connections are capable of being abraded for opening the related switch, or resoldered for closing the switch. Thus no discrete switching elements are necessary.
  • the divider is preset manually by a multiple choice switching technique. Once the minumum increment of frequency adjustment is chosen (i.e. 0.1 sec/day), the range of adjustment is limited by the available choice of connections. As a practical matter, these connections can be provided within the limited space existing in a wrist watch.
  • switches M M M M and M at the L input stages of main divider section 11 are constituted by electronic switches.
  • Such electronic switches which are used only to contain the switch state information, are each formed by a memory element.
  • the physical phenomenon incorporated in the memory element need not be electronic in nature, whereas the interrogation, the reading in and reading out of the state information, must be electrical in character in order to operate the electronic divider.
  • the memory elements may be in the form of magnetic cores, magnetic bubble devices or semiconductor devices.
  • switches M, to M Operation of switches M, to M is effected by a programmable memory element 15, consisting of an L stage binary counter with a reset input Y and signal input X. Signal pulses fed into input X are counted by the memory element, and if the number of pulses fed in is less than 2 1, this number will appear in binary form at the switching points M,, to M For example, if six pulses are fed into the counter, the output stages will appear as A 0, B l, C l, D (and following) 0. These states constitute the settings of the switches M M,,, M,, M etc. necessary for the presettable divider.
  • FIG. 4 shows in greater detail one embodiment of the electronic logic circuitry necessary to perform the electronic presettable feature.
  • a logic 1 level at its input is electronically the same as if the mechanical switch were in its down" or closed position (again refer to FIG. 2), while a logic 0 at its input is the same as saying the mechanical switch is in the up or open position.
  • the logic level at each input is controlled by the state of the corresponding flip-flop.
  • These flip-flops are connected to gether to form a ripple counter, and additionally if this counter counts in the same manner as the n and/or m divider, then this counter need only to receive the number of pulses equal to the preset number required. In the example previously given, the preset number is 135. Therefore, if pulses are fed into the counter after it has been reset to zero, then these flip-flop stages will be in the proper state so that 135 will be set into the n divider when the system requires it.
  • the programmable memory is programmed by connecting the X and Y inputs to an external circuit. This circuit first applies a pulse to the Y input thereby resetting all stages to zero. Next the circuit applies a number of pulses to the X input numerically equal to the preset number. The memory now retains this number until it is changed again by the external circuit.
  • FIG. 5 there is shown still another embodiment of a logic circuit for a presettable divider in which the output stage of the supplemental or m divider section is applied to a third flip-flop FF3.
  • the pulse yielded thereby will trip FF3 and start an 0" state pulse on the reset R line of flip-flop FF3 for a duration determined by the states of the input lines associated with the L stages of the divider chain. These lines are connected to an 0 or a l depending on the desired frequency adjustment.
  • flip-flop FF When the first divider stage next. reaches the I state, it will trip flip-flop FF] which resets the first divider stage to the 0 state, thereby adding one pulse.
  • flip-flop FF2 When the input of the divider changes to a 0 state, flip-flop FF2 is reset, thereby removing the 1 state from the reset line of the first divider stage and allowing the next input pulse to trip it. The system is now in readiness for the next pulse to flip-flop FF2.
  • a timing system for producing low-frequency control pulses to actuate a time display as well as other pulse-actuatable devices requiring accurately-timed control pulses comprising:
  • a main frequency divider coupled to the standard and having a series of binary stages in tandem relation to divide the operating frequency of the standard by an integer 2", where n is equal to the number of stages, to produce said low-frequency control pulses which within a given time period, have a deficient count which is less than the count derivable from said ideal frequency, and
  • C. means to add pulses to said main divider to cause the number of control pulses yielded within said period to equal that obtainable from an ideal frequency
  • said means including a multi-stage supplemental divider coupled to the output of said main divider to generate supplemental pulses at a rate depending on the number of stages in said supplemental divider and means to apply said supplemental pulses to a preset section coupled to selected stages of the main divider, said preset section being adjustable to introduce a correction number in said main divider compensating for the deficiency in the count.
  • said preset section adjustment means includes switches for connecting said preset section to selected stages of said main divider.
  • switches are formed by connections, each of which may be closed or interrupted to make or break a connection to the associated stage.
  • switches are constituted by memory elements presettable by means of electronic circuits external to the timing system.
  • An electronic timepiece comprising:
  • a presettable divider coupled to said standard to derive therefrom said timing pulses for driving said time display, said divider including a main frequency divider section coupled to said standard and having a series of binary stages in tandem relation to divide the operating frequency of the standard by an integer 2", where n is equal to the number of stages, to produce low-frequency output pulses whose count falls below said predetermined count for said timing pulses, a supplemental divider section coupled to the output of said main divider section to generate control pulses at a rate depending on the number of stages in said supplemental divider section, and means to apply said control pulses to a preset section coupled to selected stages of the main divider section, said preset section being adjustable to introduce a correction number in the main divider to cause the output thereof to contain precisely the said predetermined count within a given time period.
  • a timing system for producing low-frequency control pulses to actuate a time display as well as other pulse-actuatable devices requiring accurately-timed control pulses comprising:
  • n is equal tothe number of stages to produce said low-frequency control pulses which within a given period, have a deficient count that is less than the count derivable from said ideal frequency
  • a supplemental divider coupled to the output of said main divider to generate supplemental pulses at a rate which is still lower than the rate of the control pulses

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US (1) US3777471A (enrdf_load_stackoverflow)
JP (1) JPS5236429B2 (enrdf_load_stackoverflow)
CA (1) CA972823A (enrdf_load_stackoverflow)
CH (2) CH1210672A4 (enrdf_load_stackoverflow)
FR (1) FR2150838B1 (enrdf_load_stackoverflow)
GB (1) GB1398537A (enrdf_load_stackoverflow)
HK (1) HK23976A (enrdf_load_stackoverflow)
IT (1) IT962549B (enrdf_load_stackoverflow)

Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3910030A (en) * 1973-09-12 1975-10-07 Ise Electronics Corp Digital clocks
US3916612A (en) * 1972-10-02 1975-11-04 Citizen Watch Co Ltd Electronic timepiece
US3922844A (en) * 1973-04-25 1975-12-02 Suwa Seikosha Kk Electronic timepiece
US3931703A (en) * 1973-02-27 1976-01-13 Ebauches S.A. Correcting device for an electronic watch
US3945194A (en) * 1973-12-15 1976-03-23 Itt Industries, Inc. Electronic quartz clock with integrated circuits
US3948036A (en) * 1973-12-24 1976-04-06 Citizen Watch Co., Ltd. Electronic timepiece
US3962701A (en) * 1974-12-23 1976-06-08 Rockwell International Corporation Coded counting sequence and logic implementation thereof to drive a display pattern
US3967442A (en) * 1973-02-01 1976-07-06 Berney Jean Claude Electric watch having an electromechanical movement including a correction mechanism for small errors
US3975898A (en) * 1974-07-11 1976-08-24 Kabushiki Kaisha Suwa Seikosha Electronic timepiece
US3978649A (en) * 1973-07-20 1976-09-07 Kabushiki Kaisha Suwa Seikosha Quartz crystal electronic timepiece
US4015208A (en) * 1974-09-16 1977-03-29 Centre Electronique Horloger S.A. Frequency generator compensated as a function of at least one physical parameter of the environment
US4015419A (en) * 1972-10-02 1977-04-05 Citizen Watch Co., Ltd. Electronic timepiece
US4020626A (en) * 1974-05-14 1977-05-03 Kabushiki Kaisha Daini Seikosha Electronic timepiece
US4028879A (en) * 1974-07-26 1977-06-14 Eurosil G.M.B.H. Switching arrangement for setting time-measuring apparatus
US4043109A (en) * 1973-01-11 1977-08-23 Kabushiki Kaisha Suwa Seikosha Electronic timepiece
US4051663A (en) * 1973-12-05 1977-10-04 Kabushiki Kaisha Suwa Seikosha Electronic timepiece
USRE29423E (en) * 1970-12-17 1977-10-04 Kabushiki Kaisha Suwa Seikosha Time correction device for digital watches
US4055945A (en) * 1975-12-15 1977-11-01 Timex Corporation Frequency adjustment means for an electronic timepiece
US4062178A (en) * 1973-04-19 1977-12-13 Kabushiki Kaisha Suwa Seikosha Electronic timepiece
US4093873A (en) * 1976-10-28 1978-06-06 Intel Corporation Compensating digital counter for quartz crystal oscillator
US4098070A (en) * 1975-01-13 1978-07-04 Kabushiki Kaisha Suwa Seikosha Digital display electronic wristwatch
US4118922A (en) * 1975-12-27 1978-10-10 Canon Kabushiki Kaisha Electronic watch or clock and accessory devices therefor
US4155218A (en) * 1976-04-23 1979-05-22 Ebauches S.A. Electronic watch
US4162608A (en) * 1974-06-05 1979-07-31 Kabushiki Kaisha Suwa Seikosha Electronic timepiece frequency regulating circuit
US4165605A (en) * 1976-05-29 1979-08-28 Casio Computer Co. Ltd. Electronic timepiece
EP0069372A1 (fr) * 1981-07-06 1983-01-12 OMEGA Louis Brandt & Frère S.A. Procédé pour contrôler la marche d'une pièce d'horlogerie et pièce d'horlogerie adaptée à ce procédé
US4407019A (en) * 1977-07-21 1983-09-27 Kabushiki Kaisha Suwa Seikosha Electronic wristwatch
WO2000013067A1 (fr) * 1998-08-28 2000-03-09 Swatch Ag Piece d'horlogerie electronique comportant une indication horaire fondee sur un system decimal

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH554015A (enrdf_load_stackoverflow) * 1971-10-15 1974-09-13
JPS4991276A (enrdf_load_stackoverflow) * 1972-12-29 1974-08-31
JPS4994365A (enrdf_load_stackoverflow) * 1973-01-09 1974-09-07
JPS4996769A (enrdf_load_stackoverflow) * 1973-01-18 1974-09-12
JPS49130774A (enrdf_load_stackoverflow) * 1973-04-19 1974-12-14
JPS5039977A (enrdf_load_stackoverflow) * 1973-08-13 1975-04-12
JPS5756034B2 (enrdf_load_stackoverflow) * 1973-09-10 1982-11-27
JPS5125441A (enrdf_load_stackoverflow) * 1974-08-27 1976-03-02 Kobe Steel Ltd
JPS51146268A (en) * 1975-06-10 1976-12-15 Seiko Instr & Electronics Ltd Frequency divider for clock
JPS5191762A (enrdf_load_stackoverflow) * 1975-10-15 1976-08-11
CH624536B (fr) * 1978-11-24 Ebauches Sa Piece d'horlogerie electronique a affichage analogique comportant un diviseur a taux de division ajustable.

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3530663A (en) * 1967-09-01 1970-09-29 Patek Philippe Sa Automatic and continuous time adjusting device for a clock
US3540207A (en) * 1968-09-20 1970-11-17 Timex Corp Electronic watch counting circuit
US3541779A (en) * 1968-03-19 1970-11-24 Corning Glass Works Electronic timepiece
US3629582A (en) * 1969-04-24 1971-12-21 Dale R Koehler Timepiece with radioactive timekeeping standard
US3646751A (en) * 1969-12-05 1972-03-07 Detection Sciences Digital timing system
US3653204A (en) * 1969-08-20 1972-04-04 Seiko Instr & Electronics Digital display world clock
US3672155A (en) * 1970-05-06 1972-06-27 Hamilton Watch Co Solid state watch

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3530663A (en) * 1967-09-01 1970-09-29 Patek Philippe Sa Automatic and continuous time adjusting device for a clock
US3541779A (en) * 1968-03-19 1970-11-24 Corning Glass Works Electronic timepiece
US3540207A (en) * 1968-09-20 1970-11-17 Timex Corp Electronic watch counting circuit
US3629582A (en) * 1969-04-24 1971-12-21 Dale R Koehler Timepiece with radioactive timekeeping standard
US3653204A (en) * 1969-08-20 1972-04-04 Seiko Instr & Electronics Digital display world clock
US3646751A (en) * 1969-12-05 1972-03-07 Detection Sciences Digital timing system
US3672155A (en) * 1970-05-06 1972-06-27 Hamilton Watch Co Solid state watch

Cited By (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE29423E (en) * 1970-12-17 1977-10-04 Kabushiki Kaisha Suwa Seikosha Time correction device for digital watches
US4015419A (en) * 1972-10-02 1977-04-05 Citizen Watch Co., Ltd. Electronic timepiece
US3916612A (en) * 1972-10-02 1975-11-04 Citizen Watch Co Ltd Electronic timepiece
US4043109A (en) * 1973-01-11 1977-08-23 Kabushiki Kaisha Suwa Seikosha Electronic timepiece
US3967442A (en) * 1973-02-01 1976-07-06 Berney Jean Claude Electric watch having an electromechanical movement including a correction mechanism for small errors
US3931703A (en) * 1973-02-27 1976-01-13 Ebauches S.A. Correcting device for an electronic watch
US4062178A (en) * 1973-04-19 1977-12-13 Kabushiki Kaisha Suwa Seikosha Electronic timepiece
US3922844A (en) * 1973-04-25 1975-12-02 Suwa Seikosha Kk Electronic timepiece
US3978649A (en) * 1973-07-20 1976-09-07 Kabushiki Kaisha Suwa Seikosha Quartz crystal electronic timepiece
US3910030A (en) * 1973-09-12 1975-10-07 Ise Electronics Corp Digital clocks
US4051663A (en) * 1973-12-05 1977-10-04 Kabushiki Kaisha Suwa Seikosha Electronic timepiece
US3945194A (en) * 1973-12-15 1976-03-23 Itt Industries, Inc. Electronic quartz clock with integrated circuits
US3948036A (en) * 1973-12-24 1976-04-06 Citizen Watch Co., Ltd. Electronic timepiece
US4020626A (en) * 1974-05-14 1977-05-03 Kabushiki Kaisha Daini Seikosha Electronic timepiece
US4162608A (en) * 1974-06-05 1979-07-31 Kabushiki Kaisha Suwa Seikosha Electronic timepiece frequency regulating circuit
US3975898A (en) * 1974-07-11 1976-08-24 Kabushiki Kaisha Suwa Seikosha Electronic timepiece
US4028879A (en) * 1974-07-26 1977-06-14 Eurosil G.M.B.H. Switching arrangement for setting time-measuring apparatus
US4015208A (en) * 1974-09-16 1977-03-29 Centre Electronique Horloger S.A. Frequency generator compensated as a function of at least one physical parameter of the environment
US3962701A (en) * 1974-12-23 1976-06-08 Rockwell International Corporation Coded counting sequence and logic implementation thereof to drive a display pattern
US4098070A (en) * 1975-01-13 1978-07-04 Kabushiki Kaisha Suwa Seikosha Digital display electronic wristwatch
US4055945A (en) * 1975-12-15 1977-11-01 Timex Corporation Frequency adjustment means for an electronic timepiece
US4118922A (en) * 1975-12-27 1978-10-10 Canon Kabushiki Kaisha Electronic watch or clock and accessory devices therefor
US4155218A (en) * 1976-04-23 1979-05-22 Ebauches S.A. Electronic watch
US4165605A (en) * 1976-05-29 1979-08-28 Casio Computer Co. Ltd. Electronic timepiece
US4093873A (en) * 1976-10-28 1978-06-06 Intel Corporation Compensating digital counter for quartz crystal oscillator
US4407019A (en) * 1977-07-21 1983-09-27 Kabushiki Kaisha Suwa Seikosha Electronic wristwatch
EP0069372A1 (fr) * 1981-07-06 1983-01-12 OMEGA Louis Brandt & Frère S.A. Procédé pour contrôler la marche d'une pièce d'horlogerie et pièce d'horlogerie adaptée à ce procédé
US4400093A (en) * 1981-07-06 1983-08-23 Omega Louis Brandt & Frere S.A. Method for inspecting the running of a timepiece and timepiece adapted for such method
WO2000013067A1 (fr) * 1998-08-28 2000-03-09 Swatch Ag Piece d'horlogerie electronique comportant une indication horaire fondee sur un system decimal
US6809993B1 (en) 1998-08-28 2004-10-26 Swatch Ag Electronic timepiece including a time related data item based on a decimal system

Also Published As

Publication number Publication date
IT962549B (it) 1973-12-31
JPS4833859A (enrdf_load_stackoverflow) 1973-05-14
CH1210672A4 (enrdf_load_stackoverflow) 1974-08-15
DE2241514A1 (de) 1973-03-01
FR2150838A1 (enrdf_load_stackoverflow) 1973-04-13
FR2150838B1 (enrdf_load_stackoverflow) 1977-03-18
JPS5236429B2 (enrdf_load_stackoverflow) 1977-09-16
DE2241514B2 (de) 1976-02-19
GB1398537A (en) 1975-06-25
CA972823A (en) 1975-08-12
CH558559A (enrdf_load_stackoverflow) 1975-01-31
HK23976A (en) 1976-04-30

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