US3179541A - Vapor growth with smooth surfaces by introducing cadmium into the semiconductor material - Google Patents

Vapor growth with smooth surfaces by introducing cadmium into the semiconductor material Download PDF

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US3179541A
US3179541A US248520A US24852062A US3179541A US 3179541 A US3179541 A US 3179541A US 248520 A US248520 A US 248520A US 24852062 A US24852062 A US 24852062A US 3179541 A US3179541 A US 3179541A
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semiconductor material
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Edward M Hull
Vincent J Lyons
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International Business Machines Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/02546—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02581—Transition metal or rare earth elements

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  • Vapor growth is a general designation for processes of growing semiconductor materials from the vapor phase onto a substrate so as to create an epitaxial extension of the substrate.
  • epitaxial as used in the semiconductor art refers to the fact that the deposited material retains the same periodicity and orientation as the substrate.
  • vapor growth which has been developed and has found wide application is a technique which involves a halide reaction, wherein a halogen transport element is caused to combine in one zone of a reaction container with a source of semiconductor material at a prescribed temperature. Following the initial reaction there is diffusion of the products of the reaction to another temperature zone where decomposition takes place, with the result that the semiconductor material forms an epitaxial crystalline growth region on the substrate situated in the second zone.
  • III-V compounds gallium arsenide (GaAs)
  • GaAs gallium arsenide
  • the advantages of the described vapor growth technique have been well recognized; the advantage, for example, of controllable doping of the source material, a facility for broad area junction formation and discrete device fabrication. Furthermore, the technique allows for the formation of abrupt junctions within the crystal structure because the growth may be accomplished at comparatively low temperatures, thereby minimizing impurity diffusion.
  • the figure is a schematic illustration of the apparatus and reaction utilized in the technique of the invention, including an exemplary correlated temperature profile.
  • a multiple temperature stage furnace is shown schematically.
  • a sealed reaction container or tube 1 which is made of quartz or other refractory material, is surrounded by a plurality of independent heating coils 2a and 2b, which provide the requisite temperature in the respective zones of the container.
  • the coils 2a and 2b are connected to a source of power, not shown, in order to obtain the required temperatures.
  • a sealed container or tube has been illustrated, and hence the reaction to be described takes place in a sealed system, it will be understood that an open tube system may be utilized if desired.
  • a temperature of approximately 700 C. is provided in the first temperature zone of the container 1, on the left.
  • a source of GaAs labelled 3 is situated in this zone adjacent the semiconductor source 3 is a source 4 of iodine, or other halogen, and a source 5 of one or more impurity materials.
  • a substrate 6 is provided at the other end of the reaction container at a second tempera ture zone having a temperature of approximately 650 C.
  • the substrate 6 may be of any conductivity type as desired and in any configuration such as the single block or wafer shown. If preferred, the substrate 6 may be appropriately masked thereby preventing deposition in unwanted places and enabling the formation of a plurality of discrete devices.
  • the system functions in the following manner. With the higher temperature of approximately 700 C. established in the vicinity of GaAs source 3, the source 4 of iodine is vaporized so as to provide the ambient. The iodine reacts with the GaAs source 3 and several reaction products are formed.
  • the basic reaction may be written:
  • the source of Cd or Cd plus some other suitable dopant is shown at 5.
  • the initial Cd concentration in the vapor source in the system is critical for the given system with respect to obtaining a smooth surface.
  • T he Cd concentration should be such that there is produced in the depositing material a Cd doping at. the solubility limit for Cd in the depositing material.
  • iodine is used as the halogen essentially all of the Cd is used to form Cdl
  • a rate of growth of 0.25 mil per hour occurs with smooth surfaces.
  • Slightly higher concentrations of Cdl result in the formation of a condensed phase at the cooler regions of the tube. The presence of this condensed phase does not appear to affect the system as far as obtaining a smooth surface is concerned.
  • the reaction proceeds such that the products previously found are decomposed with the result that GaAs is freed and deposits epitaxially onto the substrate 6 forming the grown layer '7.
  • additional material forms on the sides of the substrate but schematically, for device fabrication, the layer is shown as simply formed on the top surface.
  • the substrate 6 With the selection of the substrate 6 to be of n conductivity type a p-n junction is realized since, with the use of the acceptor impurity, Cd, in the system the deposited layer '7 is of p conductivity type.
  • the mechanism responsible for the smooth surface obtained by using Cd is not known, it is postulated that the Cd influences a chemisorbed surface layer so as to change the crystalline growth kinetics.
  • the GaAs grown under the conditions described above has been p type with hole carrier concentrations of 3X10 per cc. and with mobilities of about 100 cm. /volt-sec.
  • the system is then doped with both the Cd and another group II element, for example, zinc.
  • the zinc or other group II impurity is incorporated in the GaAs source 3 or in the impurity source labelled 5 in the figure.
  • a vapor growth method for obtaining smooth-surfaced deposits of semiconductor material comprising the steps of reacting a halogen transport element with a source of semiconductor material and with a source of Cd in a first temperature zone of a reaction container, thereby to produce a composite vapor and decomposing said composite vapor in a second temperature zone of said reaction container to produce an epitaxial deposit of said semiconductor material on a substrate situated in said second zone with a Cd concentration in said epitaxial deposit of approximately the solubility limit for Cd in said semiconductor material whereby smooth surfaces are obtained in the epitaxial deposit.
  • a vapor growth method for producing epitaxial deposition of semiconductor material on a substrate, the deposit on the substrate having a thickness greater than several mils, whereby the deposit has a smooth surface and a high degree of crystallographic perfection comprising the steps of situating in a first temperature zone of a reaction container a source of semiconductor material and a halogen transport element which is reactive with said semiconductor material situating in a second temperature zone of said reaction container a substrate of semiconductor material, reacting said source of semiconductor material with the halogen transport element to produce a composite vapor in said first temperature zone. decomposing said composite vapor in said second temperature zone to produce epitaxially deposited material on said substrate and,
  • a vapor growth method for producing epitaxial deposition of GaAs on a substrate, the deposit on the substrate having a thickness greater than several mils, whereby the deposit has smooth surfaces and a high degree of crystallographic perfection comprising the steps of:
  • a halogen transport element is reacted with a source of semiconductor material in a first temperature zone of a reaction container and the reaction is reversed in a second temperature zone of the reaction container so as to produce an epitaxial deposit of the semiconductor material on a substrate situated in the second zone
  • the improvement which comprises introducing a quantity of cadmium into the composite vapor source so as to create a doping concentration of approximately the solubility limit for the cadmium in the epitaxial deposit, whereby smooth surfaces are obtained for the epitaxial deposit.
  • a vapor growth method for producing epitaxial deposition of semiconductor material on a substrate, the deposit on the substrate having a thickness greater than several mils, whereby the deposit has smooth surfaces and a high degree of crystallographic perfection comprising the steps of,
  • a vapor growth method for producing epitaxial deposition of GaAs on a substrate, the deposit on the sub strate having a thickness greater than several mils, Whereby the deposit has smooth surfaces and a high degree of crystallographic perfection comprising the steps of:

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Crystals, And After-Treatments Of Crystals (AREA)

Description

Aprll 20, 1965 E. M. HULL ETAL 3,179,541
VAPOR GROWTH WITH SMOOTH SURFACES BY INTRODUCING CADMIUM INTO THE SEMICONDUCTOR MATERIAL Filed Dec. 51, 1962 u'. 1' L: Q
INVENTORS EDWARD M. HULL VINCENT J. LYONS WKW ATTORNEY United States Patent VAPOR GROWTH WITH SMOOTH SURFACES BY INTRODUCING CADMKUMI INTO THE EME- CONDUCTOR MATERIAL Edward M. Hull, Mahopac, and Vincent J. Lyons, Mount Kisco, N.Y., assignors to International Business Machines Corporation, New York, N.Y., a corporation of New York Filed Dec. 31, 1962, Ser. No. 248,520 9 Claims. (Cl. 148-175) This invention relates to the formation of semiconductor bodies and, in particular, to a vapor growth technique for forming such bodies which are useful in making semiconductor devices.
Vapor growth is a general designation for processes of growing semiconductor materials from the vapor phase onto a substrate so as to create an epitaxial extension of the substrate. The term epitaxial as used in the semiconductor art refers to the fact that the deposited material retains the same periodicity and orientation as the substrate.
One particular form of vapor growth which has been developed and has found wide application is a technique which involves a halide reaction, wherein a halogen transport element is caused to combine in one zone of a reaction container with a source of semiconductor material at a prescribed temperature. Following the initial reaction there is diffusion of the products of the reaction to another temperature zone where decomposition takes place, with the result that the semiconductor material forms an epitaxial crystalline growth region on the substrate situated in the second zone.
The vapor growth technique briefly described above has been practiced with a variety of semiconductor materials, both elemental and those of compound form, such as the IILV compounds. One of these Ill-V compounds, gallium arsenide (GaAs), has. received a great deal of attention, especially due to the fact that it has been found recently that emission of radiation may be produced efficiently within this material upon proper biasing of a junction formed therein.
The advantages of the described vapor growth technique have been well recognized; the advantage, for example, of controllable doping of the source material, a facility for broad area junction formation and discrete device fabrication. Furthermore, the technique allows for the formation of abrupt junctions within the crystal structure because the growth may be accomplished at comparatively low temperatures, thereby minimizing impurity diffusion.
A specific application of the vapor growth technique,
including a detailed study of various vapor phase equilibria involving the semiconductor material, GaAs, has been previously set forth in an article by V. I. Silverstri and V. I. Lyons in the Journal of the Electrochemical Society, vol. 109, No. 10, October 1962, p. 963.
. Although vapor growth has thus been successfully exploited in depositing GaAs onto substrates, it has been generally observed that the surfaces of the vapor grown crystals develop, in an uncontrollable fashion, pyramids when the film thickness exceeds approximately one mil. The pyramids, or facets, cause the surfaces to be uneven resulting in nonuniform thickness. This situation is intolerable where the fabrication is directed to the formation of athick, low resistivity, layer for rugged device packaging.
Accordingly, it is a primary object of the present invention to enable vapor growth of GaAs and similar materials, for example, GaP, InAs, InP, such that the depositing material has a smooth surface and high crystallographic perfection.
What has been discovered it that when elemental Cd above specific concentrations is introduced into the composite vapor source in the reaction container for the growth of GaAs, the resulting surfaces of the vapor grown GaAs are free from pyramids, thus resulting in smooth surfaces and thickness uniformity even when the deposited film is as thick as 10 mils. Additional advantage is in the greater crystallographic perfection of the deposited GaAs. The underlying principle of the aforesaid discovery is one obviously applicable to the other III-V arsenides and also the phosphides.
The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular description of a preferred embodiment of the invention, as illustrated in the accompanying drawing.
In the drawing:
The figure is a schematic illustration of the apparatus and reaction utilized in the technique of the invention, including an exemplary correlated temperature profile.
Although reference will be made hereinafter to the specific technique of halide vapor growth, it will be understood that the advantage of obtaining smooth surfaces and high degrees of crystallographic perfection can also be obtained with other forms of vapor growth.
Referring now to the figure, the exemplary apparatus and reaction involved in the vapor growth technique in accordance with the present invention is illustrated. A multiple temperature stage furnace is shown schematically. A sealed reaction container or tube 1, which is made of quartz or other refractory material, is surrounded by a plurality of independent heating coils 2a and 2b, which provide the requisite temperature in the respective zones of the container. The coils 2a and 2b are connected to a source of power, not shown, in order to obtain the required temperatures. Although a sealed container or tube has been illustrated, and hence the reaction to be described takes place in a sealed system, it will be understood that an open tube system may be utilized if desired.
In the first temperature zone of the container 1, on the left, a temperature of approximately 700 C. is provided. A source of GaAs labelled 3, is situated in this zone adjacent the semiconductor source 3 is a source 4 of iodine, or other halogen, and a source 5 of one or more impurity materials. A substrate 6 is provided at the other end of the reaction container at a second tempera ture zone having a temperature of approximately 650 C. The substrate 6 may be of any conductivity type as desired and in any configuration such as the single block or wafer shown. If preferred, the substrate 6 may be appropriately masked thereby preventing deposition in unwanted places and enabling the formation of a plurality of discrete devices.
In operation the system functions in the following manner. With the higher temperature of approximately 700 C. established in the vicinity of GaAs source 3, the source 4 of iodine is vaporized so as to provide the ambient. The iodine reacts with the GaAs source 3 and several reaction products are formed. The basic reaction may be written:
The source of Cd or Cd plus some other suitable dopant, is shown at 5. The initial Cd concentration in the vapor source in the system is critical for the given system with respect to obtaining a smooth surface. T he Cd concentration should be such that there is produced in the depositing material a Cd doping at. the solubility limit for Cd in the depositing material. It is hypothesized that in the instant vapor growth system wherein iodine is used as the halogen essentially all of the Cd is used to form Cdl It has been shown that in vapor growth at 650 (1., it is necessary to maintain a Cdl pressure of approximately 110 mm. of Hg. Under these conditions a rate of growth of 0.25 mil per hour occurs with smooth surfaces. Slightly higher concentrations of Cdl result in the formation of a condensed phase at the cooler regions of the tube. The presence of this condensed phase does not appear to affect the system as far as obtaining a smooth surface is concerned.
in the lower temperatures shown on the right where the substrate 6 is located, the reaction proceeds such that the products previously found are decomposed with the result that GaAs is freed and deposits epitaxially onto the substrate 6 forming the grown layer '7. Of course, additional material forms on the sides of the substrate but schematically, for device fabrication, the layer is shown as simply formed on the top surface.
With the selection of the substrate 6 to be of n conductivity type a p-n junction is realized since, with the use of the acceptor impurity, Cd, in the system the deposited layer '7 is of p conductivity type.
Although the mechanism responsible for the smooth surface obtained by using Cd is not known, it is postulated that the Cd influences a chemisorbed surface layer so as to change the crystalline growth kinetics. The GaAs grown under the conditions described above has been p type with hole carrier concentrations of 3X10 per cc. and with mobilities of about 100 cm. /volt-sec.
In the event that it is desired to increase the carrier concentration and still retain the smooth surface which is afforded by the use of the Cd, the system is then doped with both the Cd and another group II element, for example, zinc. In the schematic illustration, the zinc or other group II impurity is incorporated in the GaAs source 3 or in the impurity source labelled 5 in the figure.
By following the technique outlined for obtaining very high carrier concentrations, it was found that by using zinc the resulting vapor grown GaAs had the surface typical of Cd doping alone and the grown layer had a carrier concentration of 7 10 Tunnel diodes were made from this highly doped crystal.
What has been disclosed herein is a novel technique useful in the vapor growth of semiconductor devices in those cases where it is required that thicknesses of approximately greater than several mils be attained. This technique involves the use of Cd as the principal dopant and permits the attainment of smooth surfaces and high crystallographic perfection. The Cd has a concentration of approximately the solubility limit in the deposited material.
While the invention has been particularly shown and described with reference to a preferred embodiment thereof, it will be understood by those skilled in the art that the foregoing and other changes in form and details may be made therein without departing from the spirit and scope of the invention.
What is claimed is:
l. A vapor growth method for obtaining smooth-surfaced deposits of semiconductor material, having a thickness greater than several mils, comprising the steps of reacting a halogen transport element with a source of semiconductor material and with a source of Cd in a first temperature zone of a reaction container, thereby to produce a composite vapor and decomposing said composite vapor in a second temperature zone of said reaction container to produce an epitaxial deposit of said semiconductor material on a substrate situated in said second zone with a Cd concentration in said epitaxial deposit of approximately the solubility limit for Cd in said semiconductor material whereby smooth surfaces are obtained in the epitaxial deposit.
2. A vapor growth method for producing epitaxial deposition of semiconductor material on a substrate, the deposit on the substrate having a thickness greater than several mils, whereby the deposit has a smooth surface and a high degree of crystallographic perfection comprising the steps of situating in a first temperature zone of a reaction container a source of semiconductor material and a halogen transport element which is reactive with said semiconductor material situating in a second temperature zone of said reaction container a substrate of semiconductor material, reacting said source of semiconductor material with the halogen transport element to produce a composite vapor in said first temperature zone. decomposing said composite vapor in said second temperature zone to produce epitaxially deposited material on said substrate and,
introducing into the composite vapor a quantity of Cd having a concentration such that in said second zone Cd is incorporated in the deposited material on said substrate at a concentration of approximately the solubility limit for Cd in said semiconductor material whereby smooth surfaces are obtained in the epitaxial deposit.
3. A vapor growth method for producing epitaxial deposition of GaAs on a substrate, the deposit on the substrate having a thickness greater than several mils, whereby the deposit has smooth surfaces and a high degree of crystallographic perfection comprising the steps of:
situating in a first temperature zone of a reaction container a source of gallium arsenide and a halogen transport element which is reactive with said gallium arsenide,
situating in a second temperature zone of said reaction container a substrate of gallium arsenide,
reacting said source of gallium arsenide with the halogen transport element to produce a composite vapor in said first temperature zone decomposing said composite vapor in said second temperature zone to produce epitaxially deposited gallium arsenide on said substrate and,
introducing into the composite vapor a quantity of cadmium having a concentration such that in said second zone cadmium is incorporated into the deposited material on said substrate at a concentration of approximately the solubility limit for cadmium in said gallium arsenide whereby smooth surfaces are obtained in the epitaxial deposit.
4. A vapor growth method as defined in claim 2 wherein said first temperature zone has a temperature of approximately 700 C., said second temperature zone has a temperature on the order of 650 C., and the cadmium incorporated in the deposited material has a concentra tion of approximately 3x10 atoms per cc.
5. In a method for producing epitaxial deposition of semiconductor material on a substrate where a halogen transport element is reacted with a source of semiconductor material in a first temperature zone of a reaction container and the reaction is reversed in a second temperature zone of the reaction container so as to produce an epitaxial deposit of the semiconductor material on a substrate situated in the second zone, the improvement which comprises introducing a quantity of cadmium into the composite vapor source so as to create a doping concentration of approximately the solubility limit for the cadmium in the epitaxial deposit, whereby smooth surfaces are obtained for the epitaxial deposit.
6. In a method for producing epitaxial deposition of semiconductor material on a substrate where a halogen transport element is reacted with a source of gallium arsenide in a first temperature zone of a reaction container and the reaction is reversed in a second temperature zone of the reaction container so as to produce an epitaxial deposit of the gallium arsenide on a substrate situated in the second zone, the improvement which comprises introducing a quantity of cadmium into the composite vapor source so as to create a doping concentration of approximately 3 l0 atoms/cc. in the epitaxial deposit, whereby smooth surfaces are obtained for the epitaxial deposit.
7. A vapor growth method for producing epitaxial deposition of semiconductor material on a substrate, the deposit on the substrate having a thickness greater than several mils, whereby the deposit has smooth surfaces and a high degree of crystallographic perfection comprising the steps of,
situating in a first temperature zone of a reaction container a source of semiconductor material and a halogen transport element which is reactive with said semiconductor material, situating in a second temperature zone of said reaction container a substrate of semiconductor material,
reacting said source of semiconductor material with the halogen transport element to produce a composite vapor in said first temperature zone,
decomposing said composite vapor in said second temperature zone to produce epitaxially deposited material on said substrate,
introducing into the composite vapor a quantity of Cd having a concentration such that in said second zone Cd is incorporated in the deposited material on said substrate at a concentration of approximately the solubility limit for Cd in said semiconductor material, and
further introducing a quantity of another group II element such that there is incorporated in the deposited material a total dopant concentration of approximately 7 1O atoms/ cc.
8. A vapor growth method for producing epitaxial deposition of GaAs on a substrate, the deposit on the sub strate having a thickness greater than several mils, Whereby the deposit has smooth surfaces and a high degree of crystallographic perfection comprising the steps of:
situating in a first temperature zone of a reaction container a source of GaAs and a halogen transport element which is reactive with said GaAs, situating in a second temperature zone of said reaction 5 container a substrate of GaAs,
reacting said source of GaAs with the halogen transport element to produce a composite vapor in said first temperature zone, decomposing said composite vapor in said second temperature zone to produce epitaxially deposited GaAs on said substrate, introducing into the composite vapor a quantity of Cd having a concentration such that in said second zone Cd is incorporated into the deposited material on said substrate at a concentration of approximately the solubility limit for Cd in GaAs, and further introducing a quantity of another group II element such that there is incorporated in the deposited material a total dopant concentration of approximately 7X10 atoms/ cc. 9. The invention as defined in claim 8 wherein said group II impurity element is zinc.
References Cited by the Examiner UNITED STATES PATENTS 2,929,859 3/60 Loferski 148-15 3,092,591 6/63 Jones et al 252-62.3
OTHER REFERENCES Silvey: I.B.M. Technical Disclosure Bulletin, vol. 4, No. 7, December 1961, page 62.
Kamath: I.B.M. Technical Disclosure Bulletin, vol. 4, No. 10, March 1962, page 51.
DAVID L. RECK, Primary Examiner.

Claims (1)

1. A VAPOR GROWTH METHOD FOR OBTAINING SMOOTH-SURFACED DEPOSITS OF SEMICONDUCTOR MATERIAL, HAVING A THICKNESS GREATER THAN SEVERAL MILS, COMPRISING THE STEPS OF REACTING A HALOGEN TRANSPORT ELEMENT WITH A SOURCE OF SEMICONDUCTOR MATERIAL AND WITH A SOURCE OF CD IN A FIRST TEMPERATURE ZONE OF A REACTION CONTAINER, THEREBY TO PRODUCE A COMPOSITE VAPOR AND DECOMPOSING SAID COMPOSITE VAPOR IN A SECOND TEMPERATURE ZONE OF SAID REACTION CONTAINER TO PRODUCE AN EPITAXIAL DEPOSIT OF SAID SEMICONDUCTOR MATERIAL ON A SUBSTRATE SITUATED IN SAID SECOND ZONE WITH A CD CONCENTRATION IN SAID EPITAXIAL DEPOSIT OF APPROXIMATELY THE SOLUBILITY LIMIT FOR CD IN SAID SEMICONDUCTOR MATERIAL WHEREBY SMOOTH SURFACES ARE OBTAINED IN THE EPITAXIAL DEPOSIT.
US248520A 1962-12-31 1962-12-31 Vapor growth with smooth surfaces by introducing cadmium into the semiconductor material Expired - Lifetime US3179541A (en)

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GB47382/63A GB1002528A (en) 1962-12-31 1963-12-02 Manufacture of semiconductive bodies
DEJ25051A DE1240826B (en) 1962-12-31 1963-12-30 Process for the production of doped monocrystalline semiconductor bodies by epitaxial growth from the vapor phase
FR958802A FR1378629A (en) 1962-12-31 1963-12-30 Growth from a vapor phase with formation of smooth surfaces

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3271637A (en) * 1963-07-22 1966-09-06 Nasa Gaas solar detector using manganese as a doping agent
US3303067A (en) * 1963-12-26 1967-02-07 Ibm Method of fabricating thin film transistor devices
US3377209A (en) * 1964-05-01 1968-04-09 Ca Nat Research Council Method of making p-n junctions by hydrothermally growing
US3541678A (en) * 1967-08-01 1970-11-24 United Aircraft Corp Method of making a gallium arsenide integrated circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2929859A (en) * 1957-03-12 1960-03-22 Rca Corp Semiconductor devices
US3092591A (en) * 1960-03-21 1963-06-04 Texas Instruments Inc Method of making degeneratively doped group iii-v compound semiconductor material

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL252532A (en) * 1959-06-30 1900-01-01
NL254846A (en) * 1959-08-29

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2929859A (en) * 1957-03-12 1960-03-22 Rca Corp Semiconductor devices
US3092591A (en) * 1960-03-21 1963-06-04 Texas Instruments Inc Method of making degeneratively doped group iii-v compound semiconductor material

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3271637A (en) * 1963-07-22 1966-09-06 Nasa Gaas solar detector using manganese as a doping agent
US3303067A (en) * 1963-12-26 1967-02-07 Ibm Method of fabricating thin film transistor devices
US3377209A (en) * 1964-05-01 1968-04-09 Ca Nat Research Council Method of making p-n junctions by hydrothermally growing
US3541678A (en) * 1967-08-01 1970-11-24 United Aircraft Corp Method of making a gallium arsenide integrated circuit

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