US2886240A - Check symbol apparatus - Google Patents

Check symbol apparatus Download PDF

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Publication number
US2886240A
US2886240A US484715A US48471555A US2886240A US 2886240 A US2886240 A US 2886240A US 484715 A US484715 A US 484715A US 48471555 A US48471555 A US 48471555A US 2886240 A US2886240 A US 2886240A
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United States
Prior art keywords
condition
counter
digit
proof
digits
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Expired - Lifetime
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US484715A
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English (en)
Inventor
Linsman Marcel
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International Standard Electric Corp
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International Standard Electric Corp
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/104—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error using arithmetic codes, i.e. codes which are preserved during operation, e.g. modulo 9 or 11 check

Definitions

  • a is a set of associated numerical symbols such as those forming a decimal number
  • b is one of a group of predetermined fixed :integer coelficients and each characteristic of the position of a symbol in the group
  • n is the number of symbols
  • p is a predetermined fixed integer used as :a modulus so as to limit the number of different possible values of the function to p.
  • the proof :symbol for 278498 will be given by In other words, 6 is the remainder after dividing 149 by 11.
  • the number with its proof symbol can, for example, be written as 278498-6 by putting the proof symbol on the right. Then whenever the number is transcribed and there are possibilities of errors, the
  • function (1) can be computed from the transcribed digits and checked against the transcribed proof digit.
  • transpositions between any two 'digits of a number there remains the possibility of a transposition between a normal digit and the proof symbol. This may be just as likely to happen as an ordinary transposition, especially if the ordinary digits are also used for the proof symbols and, moreover, if it is possible to use the same keys for typing the proof digit as those used for typing the other digits.
  • Some considerations on a possible transposition between the proof symbol and one of the ordinary symbols are given in the Belgian patent mentioned above, but the proof symbol is treated as a special case distinct from the other symbols.
  • any decimal number to be keyed should have a proof symbol permanently associated with it at all times when such errors can occur. As each digit a, of such a number would be keyed into a machine, this machine would compute the partial function:
  • the rank selector will have to make a total number of steps which varies as the number of the digits varies. In one case the rank selector would be left in one position after the keying of a number, while in another case it would be in another position after the keyingof another number having another number of digits, which means that the rank selector would have to be restored to normal after the keying of every number and would require as many positions as the maximum number of digits forming a number.
  • the coefficients b can be chosen in such a way that they satisfy the relation where r is also a fixed predetermined integer.
  • the coefiicients form a geometric progression of common ratio r such as 68,69 where r is equal to 6, or
  • An object of the invention is to calculate a function F (the proof symbol) of the form given by (6) and where the coefficients b (0 i n) are of the form given by (8), by using a recorder with p stable conditions in a novel and advantageous manner.
  • a first and a second electrical ring counters both with p stable conditions, a first pulse source and a second pulse source having r times the frequency of the first one are provided, and upon the second ring counter being set in a condition a, corresponding to the numerical symbol a, while the first ring counter is in a condition F,- the first and the second counter are both driven by the first pulse source until they respectively pass through the conditions 0 and (F,- +a,) (mod.p) which O-condition of the first counter causes a two-condition device to be displaced from its first to its second condition, thereby causing the second pulse source to drive the first counter while the second counter remains driven by the first pulse source until the first and second counters respectively reach their r(F,- +a,-) (mod.p) and O-conditions which last condition, in conjunction with the two-condition device in its second condition, causes the disconnection of said pulse sources from said counters which remain in the conditions attained.
  • the ring counter CT which is represented as a rectangle divided into into eleven squares each indicating a possible stable condition or stage of the counter.
  • the stages are successively numbered from 1 to 9, 10, 0 which last stage is coupled back to the first stage 1 as shown.
  • This counter will permit-the finding of residues with respect to 11 used as a modulus of functions fed to it by way of pulses, the number of pulses characterizing the function.
  • a lead is shown to be con nected to all the stages of the counter and it is on this lead that the pulses will be applied, each pulse causing the counter to step from one condition to the next, eg. from condition 5 to condition 6.
  • counters which permit the achievement of this shift reference is made to the United States Patent No. 2,649,502, issued August 18, 1953, where a suitable counter using a cold cathode tube for each stage is described.
  • a second counter GT which can be of the same type indicating that no keying error has been made and that one can proceed with keying the next number, while -1 is used to indicate the corresponding condition of a counter or of a bistable device, an unblocked gate or 8.
  • 0 is used to indicate the corresponding condition of a counter or of a bistable device, a blocked gate or an as the first, also has eleven stable conditions or stages :5 closed make contact, or an OK. signal. If digits of a successively numbered from to 2, 1, 0, which last number have already been keyed, the original condition stage is coupled back to the first stage 10 through a gate F, for counter CT represents a sum (mod. 11) of G which is shown as a circle with the input and output partial functions of the type given by (7) e.g. if the first leads in line and pointing towards the center of the circle.
  • Counter CT is in the O-con- CT will in efiect be a ring counter, as is CT The closed dition due to previous keying.
  • the additional horizontal arrow at the control leads of gates G and G indicate lines in the O-squares of the counters CT and CI, indithat these gates are normally unblocked and are blocked cate preferred conditions.
  • the start cir- A lead is also connected to all the stages of CT and cuit should put these stages on, e.g. the corresponding each pulse appearing at terminal P connected to this lead cold cathode tubes should be ionized. will drive the counter CT from one condition to the The bistable devices BS and BS which are of the twonext.
  • This terminal P is connected to the output of 21 input (shown on the long sides of the rectangle) type are bistable electronic device BS e.g. a bistable multiviin the O-condition.
  • the gates G and G are unblocked brator, represented by a rectangle divided into two squares 25 and a signal is applied tothe gate G Bistable device 1 and 0 representing the two stable conditions.
  • the de- BS should initially be in the l-condition, except when an vice BS, is driven by the pulses appearing at the output incorrect number has just been keyed.
  • the notation 0/1 of gate 6, which is of the same functional type as G is therefore used.
  • the gates G G G and G are and whose input is connected to terminal P at which blocked, while the gates G and G are blocked or unpulses of a suitable repetition frequency are constantly blocked depending on the conditions of BS and CT; delivered.
  • G is normally blocked, but respectively.
  • No O.K. signal is delivered, since this when it is unblocked, as will be explained later, B8,, is is controlled by a shift key (not shown) which should continuously driven from one condition to the other and be operated only after a full number has been keyed. pulses appear at terminal P at half the frequency of Contacts s and s of this shift key appear on the figure.
  • Gates G and G the moment that one of the ten digit keys (not shown) are also unblocked.
  • the potential at terminals P, is also constituting a digit selector is depressed actuating a corapplied to stage 0 of GT and will be assumed to cause responding contact such as k this stage to return to the o condition.
  • stage 8 will be ionized as B8,; is always left in the 1- condition after the keying of-a digit, for which condition "the potential at terminal P is sufficientl low to permit the ionization.
  • the frequency of the pulses will be chosen so that it is compatible with the keying speed. A frequency of 10 kc./s. for the pulses at terminal P appears amply suflicient.
  • p (p 4) When p (p 4) is prime, p1 can be decomposed into prime factors. If P is any one of these factors, one
  • the normal number 1 will require 9 as a proof digit and therefore, 19 will nevertheless be used, but as 1 followed by the proof digit 9.
  • Such a scheme evidently cannot be applied when all numbers have to be used, e.g. numbers on which calculations are to be performed. But for numbers which represent a designation such as bank account numbers for example, a selection of the numbers to be used is permissible.
  • the scheme has the great advantage that no extra symbol need be introduced and the proof digit is treated exactly as the others, no separation from the normal digits or special sign being necessary.
  • the first 45 decimal numbers which satisfy For all the numbers above, the last digit is always nonsignificant in so far as the designation conveyed by the number is concerned, but permits the checking of errors in transcription.
  • the circuit shown could still be used, keycontacts for the eleventh symbol, e.g. the decimal point, being used to break the connection between P3 and'BS and that between stage 0 of counter GT and the ten decoupling means such as R and to drive BS BS andBS to the l-condition when the eleventh symbol is keyed.
  • the number such as 267.4 would become 267.47 with the proof digit 7 on the extreme right and a wrong position of the decimal point would always be checked.
  • any error. in transcription has 10 chances out of 11 to be detected. Any single wrong digit or any single transposition will always be detected if the number of digits forming a number is limited to 10. A skipped last digit will also be detected in all cases. Several consecutive digits which all suffer the same increase or decrease as a result of a transcription error, e.g. 234 becoming 345, will also be detected in all cases.
  • the circuit can be used for an automatic determination of the proof digit. It is merely necessary for the operator to key the significant part of the number and by applying a suitable potential at terminal P one of the lamps L will be lit, indicating the value of the proof digit, e.g. if counter 0T has been left with the stage 7 on, lamp L, which is connected between terminal P and a suitable point of stage 7 will glow. The operator can then further key the proof digit, e.g.
  • the embodiment shown carries the computation by means of counters on a dynamic basis as formula 16 is particularly well adapted to such a computation.
  • counters using cold cathode tubes, and to a particular type of these, this is merely an example and other types of counters including electro-mechanical counters could also be used.
  • Electro-mechanical counters should however be fast enough for the purpose and the use of step-by-step switches for instance, would be dependent on the keying speed desired and on the value of p.
  • the bi-sta'ble circuits for example can be realized electronically as Eccles-Jordan circuits using vacuum or gas tubes, with electro-magnetic relays, or in any desired and suitable manner.
  • Such details as the polarity of the pulses, the eventual need for pulse inverters, capacitive or DC. couplings, and shaping circuits have not been particularly mentioned, since they depend on the various elements which the designer will wish to combine in accordance with his requirements and facilities and in the manner in which these will be best used, e.g. anode or cathode outputs for vacuum tube circuits.
  • the two-condition device BS permits the avoidance of the undesirable effects which contact vibrations, e.g. k would have on the state of the gates such as G If contact arrangements can be designed in such a way that no vibrations occur, then a trigger device such as BS becomes redundant.
  • Iclaim 1. Calculating mcansto'calculate-a function "'wherea w i n) is onev of a set of associated numerical symbols, n+1, the number of symbols, p, a predetermined source having r times the frequency of said first source,
  • Calculating means comprising a first ring counter and a second ring counter each having a predetermined plurality of stable'conditions, selective means for setting said second counter in a desired condition corresponding to a numerical symbol, means responsive to the release of said setting means for causing both said counters to step successivelyfrom one stable condition to the next stable condition until said first counter reaches a predetermined particular stable condition, means responsive to said first counter reaching said particular stable condition for thereafter altering said stepping means to cause said first counter to step successively from one stable condition to the next at a rate which is a predetermined multiple of the rate at which said second counter is stepped, means responsive to said altering means for thereafter stopping both said counters when said second counter reaches a predetermined particular stable condition, and means for indicating whether or not said first counter has stopped on said particular stable condition.
  • Calculating means as claimed in claim 2, further comprising means for indicating at which stable condition the first counter has stopped.

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)
  • Input From Keyboards Or The Like (AREA)
  • Character Spaces And Line Spaces In Printers (AREA)
  • Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)
  • Transmission And Conversion Of Sensor Element Output (AREA)
US484715A 1954-04-02 1955-01-28 Check symbol apparatus Expired - Lifetime US2886240A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL777286X 1954-04-02
NL2911149X 1955-09-17

Publications (1)

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US2886240A true US2886240A (en) 1959-05-12

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US484715A Expired - Lifetime US2886240A (en) 1954-04-02 1955-01-28 Check symbol apparatus
US602857A Expired - Lifetime US2911149A (en) 1954-04-02 1956-08-08 Calculating means

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US602857A Expired - Lifetime US2911149A (en) 1954-04-02 1956-08-08 Calculating means

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US (2) US2886240A (de)
BE (1) BE551084A (de)
DE (1) DE1101819B (de)
FR (2) FR1133374A (de)
GB (2) GB777286A (de)
NL (4) NL92330C (de)

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3028089A (en) * 1959-10-19 1962-04-03 David L Ringwalt Delay line function generator
US3029024A (en) * 1956-04-11 1962-04-10 Cornelis A S Hamelink Checking system
US3040985A (en) * 1957-12-02 1962-06-26 Ncr Co Information number and control system
US3055587A (en) * 1958-11-24 1962-09-25 Ibm Arithmetic system
US3089058A (en) * 1956-09-11 1963-05-07 Bell Punch Co Ltd Totalisator system
US3138701A (en) * 1959-12-29 1964-06-23 Ibm Self-checking numbering devices
US3163748A (en) * 1961-11-21 1964-12-29 Burroughs Corp Data checking apparatus
US3183482A (en) * 1958-07-03 1965-05-11 Sperry Rand Corp Check digit verifiers
US3186639A (en) * 1961-04-13 1965-06-01 Itt Mechanically variable elements to calculate check symbols
US3235716A (en) * 1961-12-05 1966-02-15 Ncr Co Data entry checking apparatus
US3304373A (en) * 1962-03-30 1967-02-14 Int Standard Electric Corp Long distance tasi communication systems having answer-back signalling
US3422250A (en) * 1964-11-06 1969-01-14 Sperry Rand Corp Weighted hole count check for punch card equipment
US3430037A (en) * 1964-06-30 1969-02-25 Philips Corp Apparatus for checking code-group transmission
US3431406A (en) * 1958-07-03 1969-03-04 Sperry Rand Corp Check digit verifiers
US3448254A (en) * 1965-07-28 1969-06-03 Anker Werke Ag Data checking system
US3484744A (en) * 1967-02-14 1969-12-16 Ultronic Systems Corp Apparatus for verifying or producing check digit numbers
US3525073A (en) * 1967-12-04 1970-08-18 Sylvania Electric Prod Parity-checking apparatus for coded-vehicle identification systems
US3531768A (en) * 1965-01-27 1970-09-29 Philips Corp Circuit arrangement for calculating control characters for safeguarding series of information characters
US3582636A (en) * 1968-12-24 1971-06-01 Philips Corp Circuit arrangement for calculating a check digit
US3778766A (en) * 1971-12-29 1973-12-11 Texaco Inc Check digit calculator

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL255870A (de) * 1960-09-14 1964-03-25
DE1295245B (de) * 1964-08-14 1969-05-14 Philips Patentverwaltung Vorrichtung zur Pruefzeichenberechnung oder zur Addition von Quotienten im Zahlensystem der Restklassen
GB1170160A (en) * 1966-10-31 1969-11-12 Tokyo Shibaura Electric Co Code Checking Systems
US4656633A (en) * 1985-03-15 1987-04-07 Dolby Laboratories Licensing Corporation Error concealment system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2684199A (en) * 1950-02-28 1954-07-20 Theodorus Reumerman Counting or number registering mechanism
US2754054A (en) * 1950-03-10 1956-07-10 Willem H T Helmig Devices for determining check symbols for symbol groups
US2759669A (en) * 1949-11-09 1956-08-21 Bull Sa Machines Error checking device for recordcontrolled accounting machine

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB709407A (en) * 1947-06-26 1954-05-26 Eckert Mauchly Comp Corp Electronic numerical integrator and computer
USRE24447E (en) * 1949-04-27 1958-03-25 Diagnostic information monitoring

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2759669A (en) * 1949-11-09 1956-08-21 Bull Sa Machines Error checking device for recordcontrolled accounting machine
US2684199A (en) * 1950-02-28 1954-07-20 Theodorus Reumerman Counting or number registering mechanism
US2684201A (en) * 1950-02-28 1954-07-20 Theodorus Reumerman Device for determining check symbols of symbol groups
US2754054A (en) * 1950-03-10 1956-07-10 Willem H T Helmig Devices for determining check symbols for symbol groups

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3029024A (en) * 1956-04-11 1962-04-10 Cornelis A S Hamelink Checking system
US3089058A (en) * 1956-09-11 1963-05-07 Bell Punch Co Ltd Totalisator system
US3040985A (en) * 1957-12-02 1962-06-26 Ncr Co Information number and control system
US3431406A (en) * 1958-07-03 1969-03-04 Sperry Rand Corp Check digit verifiers
US3183482A (en) * 1958-07-03 1965-05-11 Sperry Rand Corp Check digit verifiers
US3055587A (en) * 1958-11-24 1962-09-25 Ibm Arithmetic system
US3028089A (en) * 1959-10-19 1962-04-03 David L Ringwalt Delay line function generator
US3138701A (en) * 1959-12-29 1964-06-23 Ibm Self-checking numbering devices
US3186639A (en) * 1961-04-13 1965-06-01 Itt Mechanically variable elements to calculate check symbols
US3163748A (en) * 1961-11-21 1964-12-29 Burroughs Corp Data checking apparatus
US3235716A (en) * 1961-12-05 1966-02-15 Ncr Co Data entry checking apparatus
US3304373A (en) * 1962-03-30 1967-02-14 Int Standard Electric Corp Long distance tasi communication systems having answer-back signalling
US3430037A (en) * 1964-06-30 1969-02-25 Philips Corp Apparatus for checking code-group transmission
US3422250A (en) * 1964-11-06 1969-01-14 Sperry Rand Corp Weighted hole count check for punch card equipment
US3531768A (en) * 1965-01-27 1970-09-29 Philips Corp Circuit arrangement for calculating control characters for safeguarding series of information characters
US3448254A (en) * 1965-07-28 1969-06-03 Anker Werke Ag Data checking system
US3484744A (en) * 1967-02-14 1969-12-16 Ultronic Systems Corp Apparatus for verifying or producing check digit numbers
US3525073A (en) * 1967-12-04 1970-08-18 Sylvania Electric Prod Parity-checking apparatus for coded-vehicle identification systems
US3582636A (en) * 1968-12-24 1971-06-01 Philips Corp Circuit arrangement for calculating a check digit
US3778766A (en) * 1971-12-29 1973-12-11 Texaco Inc Check digit calculator

Also Published As

Publication number Publication date
BE551084A (de)
NL92330C (de)
GB777286A (en) 1957-06-19
NL92399C (de)
FR71938E (fr) 1960-03-14
FR1133374A (fr) 1957-03-26
US2911149A (en) 1959-11-03
NL186474B (nl)
DE1101819B (de) 1961-03-09
NL200526A (de)
GB817597A (en) 1959-08-06

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