US2711983A - Printed electric circuits and method of application - Google Patents

Printed electric circuits and method of application Download PDF

Info

Publication number
US2711983A
US2711983A US348708A US34870853A US2711983A US 2711983 A US2711983 A US 2711983A US 348708 A US348708 A US 348708A US 34870853 A US34870853 A US 34870853A US 2711983 A US2711983 A US 2711983A
Authority
US
United States
Prior art keywords
circuits
decalcomania
printed
layer
insulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US348708A
Inventor
Hoyt Karl Robert
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ELECTRONICS RES CORP
Original Assignee
ELECTRONICS RES CORP
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ELECTRONICS RES CORP filed Critical ELECTRONICS RES CORP
Priority to US348708A priority Critical patent/US2711983A/en
Application granted granted Critical
Publication of US2711983A publication Critical patent/US2711983A/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • H05K3/4667Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders characterized by using an inorganic intermediate insulating layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/207Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a prefabricated paste pattern, ink pattern or powder pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0137Materials
    • H05K2201/017Glass ceramic coating, e.g. formed on inorganic substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0275Fibers and reinforcement materials
    • H05K2201/0284Paper, e.g. as reinforcement
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0502Patterning and lithography
    • H05K2203/0531Decalcomania, i.e. transfer of a pattern detached from its carrier before affixing the pattern to the substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/31504Composite [nonstructural laminate]
    • Y10T428/31678Of metal
    • Y10T428/31681Next to polyester, polyamide or polyimide [e.g., alkyd, glue, or nylon, etc.]

Description

June 28, 1955 K. R. HOYT 2,711,983
PRINTED ELECTRIC CIRCUITS AND METHOD OF APPLICATION Filed April 14, 1953 I8 1 1& 2N5
FIG.I.
F I G 3.
F i G 5.
F l G 9 39 39 39 JNVENTOR.
v a F; 5
United States Patent PRINTED ELEQTRIC CIRCUITS AND METHGD OF APPLICATION Kari Robert Hoyt, Newport Beach, Calif., assignor to Electronics Research Corporation, Las Vegas, Nev., a corporation of Nevada Application April 14, 1953, Serial No. 348,708
6 Claims. (Cl. 154-95) This invention relates to the type of electric circuits commonly called printed circuits, in that they are substantially two-dimensional delineations or patterns of electric circuits upon supporting surfaces, although they may be painted, inlaid, electrolytically deposited, or otherwise applied to said surfaces.
The art of making printed or painted electric circuits on supporting surfaces has been highly deveioped, but either involved much hand labor, as when the circuits are painted in electro-conductive paint, or has been restricted to flat surfaces adaptable to printing or stencilling processes. Irregular surfaces, convex or concave, with flanges or with external or internal angles, have not hitherto been considered as available as supports, by mass production methods, of two-dimensional circuits. For example, if a circuit was to cross a corner from one wall of a box to the adjacent wall, the walls forming the corner could not be an integral unit made by stamping or bending but were separate flat pieces, each individually receiving its individual part of the circuit, then joined in a corner, and the individual circuit parts connected by hand-applied paint or solder. Printing, stencilling, or photographic processes necessarily limited the applied circuits to areas of sizes workable according to the chosen process; a continuous circuit extending the length of the fusilage of an aeroplane was impractical even in the improbable event that the long supporting surface was smooth.
Insulation problems further complicated the hitherto existing art. Individual layers of insulation, wiring, and more insulation, had to be applied successfully, and ofte in difiicult situations to the supporting surfaces. For this reason, even on surfaces themselves of insulating material, the application of complex crossed circuits by any of the known methods was, if not impossible, excessively expensive.
It is an object of this invention to provide simple and inexpensive means for applying printed circuits to supporting surfaces which may be flat or uneven or angular or curved, and which may be of much greater extent than has hitherto been found practicable.
It is a further object of this invention to provide means prepared in advance for applying electric circuits of great length and complexity so as to largely eliminate the hand-labor hitherto necessary in connecting small sections applied by the photographic, electrolytic or inlaying processes.
Another object of the invention is to provide means for applying insulation at the same time that the circuits are applied.
Still another object is to provide means for applying a large number of crossed or overlying circuits concurrently in a manner providing for insulating the circuits from one another.
A further object of the invention is to provide prepared circuits which can be intimately bonded to the supporting surfaces.
Yet another object of the invention is to provide oxidation-proof means for applying printed circuits which in the course of fusing to a supporting surface or in subsequent usage would ordinarily subject to oxidation and deterioration, thus permitting the use of inexpensive electro-conductive metals.
In broad terms, I attain the foregoing objects, and others which will appear as the following specification proceeds, by applying the printed circuit or circuits to a base surface by means of a flexible decalcomania in which said circuit or circuits are incorporated, and which also includes a layer or layers of insulating material in a form which is flexible at the time the decalcomania is applied. The circuit or circuits may be embedded between layers of insulation or they may be left uncovered by the insulation, and the insulation may be applied to the supporting surface to insulate the circuit or circuits therefrom, or if the base surface is of itself of insulating material, the insulating material of the decalcomania may be used as exterior protection. The variety of forms in which my invention may be embodied makes possible the use of either press-on or slide-off techniques in applying the decalcomania. It also permits either cold or hot techniques in the application and subsequent curing or drying of the decalcomania, although i prefer when possible to use a method of curing in which the applied decalcomania is gradually baked at successively rising temperature levels, whereby volatile or decomposable elements of the decalcomania are successively removed, the ordinary elements of a decalcomania being removed first and the insulation material being fused to the supporting surface in a final step when no intervening elements remain.
In the accompanying drawing, illustrative of a number of suitable decalcomania arrangement but not intended to be all-inclusive of possible modifications of my invention,
Fig. 1 shows in cross-section a decalcomania having insulation on only one side of the printed circuits and suitable for application by the slide-off technique.
Fig. 2 shows in cross-section a decalcomania having insulation only on one side of the printed circuits but suitable for application by either the slide-off or presson technique.
Figs. 3 and 4 show in cross-section decalcomanias in general similar respectively to those shown in Figs. 1 and 2, but having insulation only on the opposite sides of the circuits.
Fig. 5 is a view similar to Fig. 3, but showing the circuits protected by a different type of insulation.
Figs. 6 and 7 are cross-sectional views showing decalcomania circuits of different colors separated by transparent insulating material;
Fig. 8 shows in cross-section the use of a plurality of layers of insulating material in which a plurality of circuits are embedded.
9 illustrates in cross-section a decalcomania having insulating layers which are discontinuous by reason of pro-formed perforations giving access to the embedded circuits.
Fig. 10 is a plan view of a decalcomania having crossed circuits and access perforations in the manner shown in Fig. 9; and
Fig. 11 shows such a decalcomania applied to an angulated supporting surface.
Having reference to the details of the illustrations, in each of Figs. 1-9, there is shown the usual removable paper backing 15, coated with a layer of soluble binder material 16, which may be a water-soluble gelatin. Gelatins are readily available for the purpose which volatilize or decompose at temperatures of around 250 degrees Fahrenheit, and a binder material of such quality is preferably employed. In the decalcomanias 13 and 14 shown in Figs. 1 and 2, a layer of insulating material 17 is applied to the layer of binding material 16 and the circuit or circuits 18 are printed on the layer 17. The insulating material 17 is shown in Figs. 1 and 2 as being vitreous and may be a composition of finely ground glass particles, carried in a suitable lacquer. A fineness of about 300 mesh is suitable for the glass particles. Numerous lacquers having in themselves good dielectric properties are available, and preferably 1 select one which volatilizes or otherwise decomposes at a temperature considerably higher than the volatilizing point of the gelatin layer 16 but considerably lower than the fusing point of the ground glass. The circuits 18, on the other hand, may be printed in electro-conductive paint, such as silver paint, having a fusing point higher than the glass fusing point. For example, the gelatin as aforesaid may be selected to volatilize at about 259 degrees, the lacquer in the layer 7.7 may selected to volatilize at about 650 degrees, the ground glass to fuse as about 970 degrees, and the silver paint to fuse at about 1100 degrees.
it Will be seen that the decalcomania 13 of Fig. l is suitable for application by the slide-off technique, having gelatin 16 only adjacent to the paper backing 15. The decalcornania 14 shown in 2 has a second layer of gelatin 19 covering the circuits 18 and may be applied by either the slide-off or press-on techniques. Either of these decalcomanias may be applied to a conductive surface by the slide-off technique, then having their respective insulating layers 17 between the surface and the circuits l3, and of course they may be applied to nonconductive surfaces.
Because the ground glass in lacquer is quite flexible, the decalcomanias should be carefully smoothed after having been applied, in order to assure the closest adhesion to the supporting surface, to carry the circuits over and around any unevcnnesses, curves, or angles in the supporting surfaces, and to avoid air-pockets. In many instances they may be applied cold, the ground glass and lacquer layers 17 do not have to be fused in order to provide good insulation for low voltages. Where, however, either the voltages are high or the surfaces to which the decalcotnanias are affixed are subject subsequently to bending, I prefer to heat-treat the aifixed decalcomanias in order at least to remove volatile fractions therefrom, thus improving the dielectric qualities of the layers 17, and usually to fuse the residual ground glass, particularly when the supporting surface is of material to which the glass will fuse. In heat-treating the applied dccalcomanias, I increase the heat in a series of steps, each step being designed to create a new condition requisite to the most satisfactory completion of the following step. l will for example, after of course removing the paper backing i5, first bake the applied decalcomania at about 250 degrees Fahrenheit to drive off the gelatin layer 16, or the layers in and 19. It will be apparent that this step will bring the insulation layer 17 into intimate contact with the supporting surface. After a time sufficient for the generated vapors and gases to escape, so as to leave no gas pockets, the temperature is raised to the vaporizing point of the lacquer in the layer 17, which may be about 650 degrees, and held there until, again, generated vapors have escaped. As a final step the temperature may be raised to the fusing point of the glass, about 976 degrees and the glass fused to the supporting surface. It is quite important to allow sufiicient time between successive increases of temperature to permit escape of vapor and not to over-heat during either of the first two named as otherwise vapor pockets will be formed by too generation of vapor.
The decalcomanias 2G and 21, shown in igs. 3 and 4, are respectively similar to the decalcotnanias l3 and 14 except that their circuits 22 are placed on the side of the insulation layers 23 next to the gelatin layers 16 and the paper backing 15. It will be apparent that either of the decalcomanias 2b and 21 may be applied to nonconductive supporting surfaces by the slide-o1? technique and the circuits 22 will then not be exposed but will be covered by the insulation layers 23. It will also be apparent that if the decalcomania 21 is applied by the press-on technique by means of the gelatin layer 24, it Wi result in the same relative arrangement as the application of either of the decalcomanias 13 or 14 by the slide-ofi technique.
in Fig. 5 is illustrated a decalcornania 25 of the same general construction as the decalcomania 29, but with insulation layer 23 of the latter replaced by a layer of lacquer 26. Such a decalcomania is suitable for application to surfaces to which glass is not readily fusible, and may be applied cold or may be baked on at temperatures sufiicient to dry the gelatin layer 16 without affecting the lacquer layer 26.
An advantage in the use of decalcomanias 14, 20, 21 and Z5, is that the conduits 18 or 22 are within the decaicomanias, that is, between layers of protective material, and the decalcornanias may not only be prepared in advance of application but may be stored unused without damage to the thin printed circuits by scratching or oxidation. When the decalcornanias are applied in such manner that the insulating layers 17 continue to co er the circuits, being on the opposite side of the cirfrom the supporting surfaces, oxidation is prevented even when the decalcomanias are baked or fused. Under these circumstances, such metals as copper or aluminum may be used for the circuits in place of silver.
The structure of plural circuits, including cross-over, is shown in Figs. 6, 7, 8, 9, and 10. in the decalcomanias 2'7 and 28 of Figs. 6 and 7, the structure is essentially the same as in Figs. 3 and 4, an additional circuit 29 being shown crossing the circuits 3% on the opposite side of the i2 ulating layer 23. The circuits 29 and 3% may be printed in different colors, as indicated, so that they may readily be traced through the glass insulating layer 23. The modified decalcornanias 31 and 32 shown in Figs. 8 and 9 illustrate the use of plural insulating layers. An insulating layer 33 is placed upon the binder layer 16 and circuits 34 are printed thereon. Then another insulating layer 35 is spread upon the layer 33 and circuits 34, and circuitsEiare in turn printed thereon. This succession of insulating layers nd circuits may be continued at length without stiffening the decalcomania to the point where it will no longer adhere to a surface angle, as many as eight layers of circuits insulated by insulation layers of a few thousandths of an inch in thickness having been found practicable. The decalcomanias may be topped off by exterior insulating layers 37 and binder layers 38 to make them applicable by either of the standard techniques and to conductive surfaces. As successive layers of insulation are built upon the original backing 15 and binder layer 16, mask- Eng strips or spot disks may be suitably placed to break the continuity of the insulating layers at points where access to enclosed circuits is desired, so as to provide access ports 39 for electrical connections to the circuits. With transparent glass insulating layers, the various circuits and access ports will appear on a flat decalcomania as shown in Fig. 10, and as in Fig. 11 when applied to an angulated support 40.
I claim:
1. In a decalcomania, in combination with a layer of removable backing material, and soluble binder material for affixing said decalcomania to a supporting surface: a plurality of layers of flexible insulation material containing elements destructible by heat and separated from said backing layer by a portion of said binder material and adapted to retain their insulating properties after said destructible elements have been destroyed, and a plurality of interconnected printed electric circuits between said insulation layers said entire decalcomania being a solid unit in cross section and having flexibility sufficient to permit it to extend around a sharp angle.
the
2. In a decalcomania, the combination set forth in claim 1, in which said binder material and insulating material are transparent.
3. In a decalcomania, in combination with a layer of removable backing material, and soluble binder material for afiixing said decalcomania to a supporting surface: a layer of flexible insulation material containing elements destructible by heat and separated from said backing layer by a portion of said binder material, said material hardening upon the destruction of said destructible elements but then retaining its insulating properties, and a plurality of flexible printed electric circuits on opposite sides of said insulation layer.
4. In a decalcomania, the combination set forth in claim 3, in which said electric circuits are printed in electro-conductive material of different coloration.
5. In a decalcomania, the combination set forth in claim 3 in which said insulation material is substantially transparent.
6. The method of applying a plurality of printed electric circuits to a base surface which comprises: applying to said surface a decalcomania inclusive of volatile binding material, and insulating material containing finely ground glass and carrier material therefor volatilizing at a higher temperature relatively to said binding material, said circuits being printed on opposite side of said insulating material; smoothing said decalcomania on said surface to flex, when necessary, said circuits conformingly to irregularities of said surface; heating said decalcomania to a temperature and for a time sufficient to substantially decompose said binding material; further heating said decalcomania to a temperature and for a time suflicient to substantially decompose said carrier material; and further heating said decalcomania to a temperature and for a time sufiicient to fuse said glass.
References Cited in the file of this patent UNITED STATES PATENTS 276,896 Berge May 1, 1883 1,283,606 Warga Nov. 5, 1918 2,441,960 Eisler May 25, 1948

Claims (1)

  1. 6. THE METHOD OF APPLYING A PLURALITY OF PRINTED ELECTRIC CIRCUITS TO A BASE SURFACE WHICH COMPRISES: APPLYING TO SAID SURFACE A DECALCOMANIA INCLUSIVE OF VOLUME BINDING MATERIAL, AND INSULATING MATERIAL CONTAINING FINELY GROUND GLASS AND CARRIER MATERIAL THEREFOR VOLATILIZING AT A HIGHER TEMPERATURE RELATIVELY TO SAID BINDING MATERIAL, SAID CIRCUITS BEING PRINTED ON OPPOSITE SIDE OF SAID INSULATING MATERIAL; SMOOTHING SAID DECALCOMANIA ON SAID SURFACE TO FLEX, WHEN NECESSARY, SAID CIRCUIT CONFROMINGLY TO IRREGULARITIES OF SAID SURFACE; HEATING SAID DECALCOMANIA TO A TEMPERATURE AND FOR A TIME SUFFICIENT TO SUBSTANTIALLY DECOMPOSE SAID BINDING MATERIAL; FURTHER HEATING SAID DECALOMANIA TO A TEMPERATURE AND FOR A TIME SUFFICIENT TO SUBSTANTIALLY DECOMPOSE SAID CARRIER MATERIAL; AND FURTHER HEATING SAID DECALCOMANIA TO A TEMPERATURE AND FOR A TIME SUFFICIENT TO FUSE SAID GLASS.
US348708A 1953-04-14 1953-04-14 Printed electric circuits and method of application Expired - Lifetime US2711983A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US348708A US2711983A (en) 1953-04-14 1953-04-14 Printed electric circuits and method of application

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US348708A US2711983A (en) 1953-04-14 1953-04-14 Printed electric circuits and method of application

Publications (1)

Publication Number Publication Date
US2711983A true US2711983A (en) 1955-06-28

Family

ID=23369186

Family Applications (1)

Application Number Title Priority Date Filing Date
US348708A Expired - Lifetime US2711983A (en) 1953-04-14 1953-04-14 Printed electric circuits and method of application

Country Status (1)

Country Link
US (1) US2711983A (en)

Cited By (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2967766A (en) * 1957-10-22 1961-01-10 Aladdin Ind Inc Method and apparatus for making cylindrical printed circuits
US2998475A (en) * 1959-12-03 1961-08-29 Raymond C Grimsinger Printed electrical circuit panel having angularly disposed sections
US3077511A (en) * 1960-03-11 1963-02-12 Int Resistance Co Printed circuit unit
US3155561A (en) * 1960-03-07 1964-11-03 Sperry Rand Corp Methods for making laminated structures
US3186887A (en) * 1960-12-27 1965-06-01 Sanders Associates Inc Encapsulated article and method of making
US3219749A (en) * 1961-04-21 1965-11-23 Litton Systems Inc Multilayer printed circuit board with solder access apertures
US3266661A (en) * 1961-10-04 1966-08-16 Corning Glass Works Method of applying electro-conductive coatings and resulting article
US3317653A (en) * 1965-05-07 1967-05-02 Cts Corp Electrical component and method of making the same
US3366519A (en) * 1964-01-20 1968-01-30 Texas Instruments Inc Process for manufacturing multilayer film circuits
US3423517A (en) * 1966-07-27 1969-01-21 Dielectric Systems Inc Monolithic ceramic electrical interconnecting structure
US3460113A (en) * 1963-08-31 1969-08-05 Hisao Maeda Magnetic memory device with grooved substrate containing bit drive lines
US3729819A (en) * 1970-01-09 1973-05-01 Nippon Toki Kk Method and device for fabricating printed wiring or the like
US4697335A (en) * 1986-03-31 1987-10-06 Hy-Meg Corporation Method of manufacturing a film-type electronic device
US5453155A (en) * 1994-08-02 1995-09-26 Hung; Chao-I Method of manufacturing a hot-stamped decal
US5700338A (en) * 1994-06-14 1997-12-23 Murata Manufacturing Co., Ltd. Method of manufacturing resistor integrated in sintered body and method of manufacturing multilayer ceramic electronic component
US6108211A (en) * 1998-05-07 2000-08-22 Diessner; Carmen Electrical contact system
US6280552B1 (en) 1999-07-30 2001-08-28 Microtouch Systems, Inc. Method of applying and edge electrode pattern to a touch screen and a decal for a touch screen
US20010028343A1 (en) * 2000-02-02 2001-10-11 Bottari Frank J. Touch panel with an integral wiring harness
US6485591B1 (en) * 1988-03-07 2002-11-26 Matsushita Electric Industrial Co., Ltd. Method for manufacturing laminated-ceramic electronic components
US6488981B1 (en) 2001-06-20 2002-12-03 3M Innovative Properties Company Method of manufacturing a touch screen panel
US6549193B1 (en) 1998-10-09 2003-04-15 3M Innovative Properties Company Touch panel with improved linear response and minimal border width electrode pattern
US20030134095A1 (en) * 2002-01-16 2003-07-17 Bottari Frank J Method of applying an edge electrode pattern to a touch screen
US6651461B2 (en) 2001-05-31 2003-11-25 3M Innovative Properties Company Conveyor belt
US7321362B2 (en) 2001-02-01 2008-01-22 3M Innovative Properties Company Touch screen panel with integral wiring traces

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US276896A (en) * 1883-05-01 Berg-e
US1283606A (en) * 1918-05-11 1918-11-05 American Lithographic Co Decorating glass surfaces.
US2441960A (en) * 1943-02-02 1948-05-25 Eisler Paul Manufacture of electric circuit components

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US276896A (en) * 1883-05-01 Berg-e
US1283606A (en) * 1918-05-11 1918-11-05 American Lithographic Co Decorating glass surfaces.
US2441960A (en) * 1943-02-02 1948-05-25 Eisler Paul Manufacture of electric circuit components

Cited By (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2967766A (en) * 1957-10-22 1961-01-10 Aladdin Ind Inc Method and apparatus for making cylindrical printed circuits
US2998475A (en) * 1959-12-03 1961-08-29 Raymond C Grimsinger Printed electrical circuit panel having angularly disposed sections
US3155561A (en) * 1960-03-07 1964-11-03 Sperry Rand Corp Methods for making laminated structures
US3077511A (en) * 1960-03-11 1963-02-12 Int Resistance Co Printed circuit unit
US3186887A (en) * 1960-12-27 1965-06-01 Sanders Associates Inc Encapsulated article and method of making
US3219749A (en) * 1961-04-21 1965-11-23 Litton Systems Inc Multilayer printed circuit board with solder access apertures
US3266661A (en) * 1961-10-04 1966-08-16 Corning Glass Works Method of applying electro-conductive coatings and resulting article
US3460113A (en) * 1963-08-31 1969-08-05 Hisao Maeda Magnetic memory device with grooved substrate containing bit drive lines
US3366519A (en) * 1964-01-20 1968-01-30 Texas Instruments Inc Process for manufacturing multilayer film circuits
US3317653A (en) * 1965-05-07 1967-05-02 Cts Corp Electrical component and method of making the same
US3423517A (en) * 1966-07-27 1969-01-21 Dielectric Systems Inc Monolithic ceramic electrical interconnecting structure
US3729819A (en) * 1970-01-09 1973-05-01 Nippon Toki Kk Method and device for fabricating printed wiring or the like
US4697335A (en) * 1986-03-31 1987-10-06 Hy-Meg Corporation Method of manufacturing a film-type electronic device
US6485591B1 (en) * 1988-03-07 2002-11-26 Matsushita Electric Industrial Co., Ltd. Method for manufacturing laminated-ceramic electronic components
US5700338A (en) * 1994-06-14 1997-12-23 Murata Manufacturing Co., Ltd. Method of manufacturing resistor integrated in sintered body and method of manufacturing multilayer ceramic electronic component
US5453155A (en) * 1994-08-02 1995-09-26 Hung; Chao-I Method of manufacturing a hot-stamped decal
US6108211A (en) * 1998-05-07 2000-08-22 Diessner; Carmen Electrical contact system
US6549193B1 (en) 1998-10-09 2003-04-15 3M Innovative Properties Company Touch panel with improved linear response and minimal border width electrode pattern
US6781579B2 (en) 1998-10-09 2004-08-24 3M Innovative Properties Company Touch panel with improved linear response and minimal border width electrode pattern
US6280552B1 (en) 1999-07-30 2001-08-28 Microtouch Systems, Inc. Method of applying and edge electrode pattern to a touch screen and a decal for a touch screen
US6841225B2 (en) 1999-07-30 2005-01-11 3M Innovative Properties, Company Touch screen with an applied edge electrode pattern
US7077927B2 (en) 1999-07-30 2006-07-18 3M Innovative Properties Company Method of applying an edge electrode pattern to a touch screen
US20040040645A1 (en) * 1999-07-30 2004-03-04 3M Innovative Properties Company Touch screen with an applied edge electrode pattern
US20040149377A1 (en) * 1999-07-30 2004-08-05 3M Touch Systems, Inc. Method of applying an edge electrode pattern to a touch screen
US7102624B2 (en) 2000-02-02 2006-09-05 3M Innovative Properties Company Integral wiring harness
US6727895B2 (en) 2000-02-02 2004-04-27 3M Innovative Properties Company Touch screen panel with integral wiring traces
US20040160424A1 (en) * 2000-02-02 2004-08-19 3M Innovative Properties Company Touch screen panel with integral wiring traces
US20010028343A1 (en) * 2000-02-02 2001-10-11 Bottari Frank J. Touch panel with an integral wiring harness
US20050253822A1 (en) * 2000-02-02 2005-11-17 3M Innovative Properties Company Integral wiring harness
US7321362B2 (en) 2001-02-01 2008-01-22 3M Innovative Properties Company Touch screen panel with integral wiring traces
US6651461B2 (en) 2001-05-31 2003-11-25 3M Innovative Properties Company Conveyor belt
US6842171B2 (en) 2001-06-20 2005-01-11 3M Innovative Properties Company Touch panel having edge electrodes extending through a protective coating
US20030001826A1 (en) * 2001-06-20 2003-01-02 3M Innovative Properties Company Method of manufacturing a touch screen panel
US6488981B1 (en) 2001-06-20 2002-12-03 3M Innovative Properties Company Method of manufacturing a touch screen panel
US20030134095A1 (en) * 2002-01-16 2003-07-17 Bottari Frank J Method of applying an edge electrode pattern to a touch screen

Similar Documents

Publication Publication Date Title
US2711983A (en) Printed electric circuits and method of application
US2734150A (en) Circuit component and method of making same
US3061911A (en) Method of making printed circuits
US3075866A (en) Method of making printed circuits
HK31382A (en) Insulating substrate with metallic coating and method for manufacturing same
US2922912A (en) Indicia bearing electrolluminescent panel and method of manufacture
US2984597A (en) Method of making electrical conductors on insulating supports
GB639658A (en) Improvements relating to the manufacture of electrical circuits and circuit components
US2965952A (en) Method for manufacturing etched circuitry
GB2246480A (en) P.C.B circuit shielding
US3556366A (en) Methods of severing materials employing a thermal shock
FR2295678A1 (en) Printed circuit boards - made of anodised aluminium and selectively covered with conductor pattern
US3324362A (en) Electrical components formed by thin metallic form on solid substrates
GB980468A (en) Improvements in and relating to electrical circuit elements
JPS54112981A (en) Article having self-cleaning coat
JPS5874373A (en) Thermal head and manufacture thereof
JPS58164288A (en) Method of producing substrate for film integrated circuit
JPH0697711B2 (en) Method for manufacturing ceramic circuit board
JPS6031116B2 (en) Electric wiring circuit board and its manufacturing method
JPS5989489A (en) Method of forming thick film pattern
JPS57104248A (en) Manufacture of hybrid integrated circuit
US3231960A (en) Process for making electrical components and components made thereby
JPH0513903A (en) Metal core substrate and manufacture there0f
JPS5512669A (en) Metallic conductive layer on insulating substrate
FR2236800A1 (en) Cavity insulating glass assembly - with electrically heatable cavity glass surface