US20220272842A1 - Electric circuit module and manufacturing method thereof - Google Patents

Electric circuit module and manufacturing method thereof Download PDF

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Publication number
US20220272842A1
US20220272842A1 US17/671,119 US202217671119A US2022272842A1 US 20220272842 A1 US20220272842 A1 US 20220272842A1 US 202217671119 A US202217671119 A US 202217671119A US 2022272842 A1 US2022272842 A1 US 2022272842A1
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Prior art keywords
circuit board
mold member
circuit module
electronic
module
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US17/671,119
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US11979988B2 (en
Inventor
Shuichi Takizawa
Atsushi Yoshino
Yuki OKINO
Hiromu Harada
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TDK Corp
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TDK Corp
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Assigned to TDK CORPORATION reassignment TDK CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HARADA, HIROMU, OKINO, YUKI, TAKIZAWA, SHUICHI, YOSHINO, ATSUSHI
Publication of US20220272842A1 publication Critical patent/US20220272842A1/en
Priority to US18/340,379 priority Critical patent/US20230337371A1/en
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135—Double encapsulation or coating and encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/36—Assembling printed circuits with other printed circuits
    • H05K3/368—Assembling printed circuits with other printed circuits parallel to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5385—Assembly of a plurality of insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/562—Protection against mechanical damage
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0182—Using a temporary spacer element or stand-off during processing
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0191—Using tape or non-metallic foil in a process, e.g. during filling of a hole with conductive paste
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1305—Moulding and encapsulation
    • H05K2203/1316—Moulded encapsulation of mounted components

Definitions

  • the present invention relates to an electronic circuit module and a manufacturing method therefore and, more particularly, to an electronic circuit module capable of multiplexed implementation and a manufacturing method therefor.
  • JP 2020-035993A discloses an electronic circuit module in which a first circuit board is mounted on a second circuit board, and the second circuit board is mounted on a third circuit board.
  • solder reflow is performed when the first circuit board is implemented on the second circuit board, and additional solder reflow is performed when the second circuit board is implemented on the third circuit board, so that the first circuit board is subjected to the solder reflow a plurality of times.
  • Propagation of such delaminating may cause a connection defect. This becomes remarkable when the reflow is performed a plurality of times.
  • An object of the present invention is therefore to provide an electronic circuit module in which a connection defect caused by delaminating due to a thermal load during solder reflow is less likely to occur and a manufacturing method therefor.
  • An electronic circuit module includes: a first circuit board having a plurality of terminal electrodes on its lower surface; an electronic component mounted on the upper surface of the first circuit board positioned on the side opposite to the lower surface; and a first mold member that covers the upper surface of the first circuit board and a side surface thereof connecting the upper and lower surfaces so as to embed therein the electronic component.
  • a lower area of the side surface of the first circuit board that is positioned on the side close to the lower surface is not covered with the first mold member but is exposed.
  • a space formed between the end surface of the first mold member and the lower area of the side surface of the first circuit board serves as a housing part for an underfill material, so that even when the amount of the underfill material is excessive, delaminating, which may occur during solder reflow, is less likely to propagate. Even when the underfill material is not used, delaminating is likely to occur at the boundary between the inner surface of the first mold member and the side surface of the first circuit board. Thus, making delaminating occur at this portion allows stress relief. This can prevent a connection defect caused by delaminating due to a thermal load.
  • a part of the first mold member that covers the side surface of the first circuit board may have an inner surface contacting the side surface of the first circuit board and an outer surface positioned on the side opposite to the inner surface, and the outer surface may protrude toward the lower surface of the first circuit board from the inner surface.
  • the end surface of the first mold member that connects a lower end portion of the outer surface and a lower end portion of the inner surface may have a tapered shape protruding toward the lower surface of the first circuit board as it separates from the side surface of the first circuit board. This still further facilitates the accommodation of an excess part of the underfill material.
  • the electronic circuit module according to the present invention may further include: a second circuit board that mounts the first circuit board on the upper surface thereof; and a second mold member that covers the upper surface of the second circuit board so as to embed therein the first circuit board.
  • the underfill member may further be supplied between the lower surface of the first circuit board and the upper surface of the second circuit board so as to cover a part of the side surface of the first circuit board that is exposed from the first mold member.
  • the second mold member may cover the part of the side surface of the first circuit board that is exposed from the first mold member.
  • the electronic circuit module according to the present invention may further include a third circuit board that mounts thereon the second circuit board. This can prevent a defect in the first and second circuit boards which may occur in solder reflow performed when the second circuit board is mounted on the third circuit board.
  • An electric circuit module manufacturing method includes: a first step of preparing a first circuit board having a plurality of terminal electrodes on its lower surface and an electronic component on the upper surface of the first circuit board positioned on the side opposite to the lower surface and sticking the lower surface of the first circuit board to a support member; a second step of covering, with a space forming material, the side surface of the first circuit board that connects the upper and lower surfaces not entirely, but selectively at a lower area of the side surface positioned on the side close to the lower surface; a third step of forming a first mold member that covers the upper and side surfaces of the first circuit board so as to embed therein the electronic component; and a fourth step of removing the support member and space forming material and cutting the first mold member for individualization.
  • the lower area of the side surface of the first circuit board can be exposed without being covered with the first mold member.
  • the electric circuit module manufacturing method may further include: a fifth step of preparing a second circuit board and mounting the first circuit board on the upper surface of the second circuit board; and a sixth step of forming a second mold member that covers the upper surface of the second circuit board so as to embed therein the first circuit board.
  • the method may further include, after the fifth step and before the sixth step, a step of filling an underfill material between the lower surface of the first circuit board and the upper surface of the second circuit board. This makes delaminating occurring during solder reflow less likely to propagate even when the amount of the underfill member is excessive.
  • the electric circuit module manufacturing method according to the present invention may further include a seventh step of preparing a third circuit board and mounting the second circuit board on the third circuit board. This can provide a tertiary-mounted electronic circuit module.
  • an electronic circuit module in which a connection defect caused by delaminating due to a thermal load during solder reflow is less likely to occur and a manufacturing method therefor.
  • FIG. 1 is a schematic cross-sectional view for explaining the structure of an electronic circuit module 10 according to a first embodiment of the present invention
  • FIG. 2A-2C are enlarged views of the area A shown in FIG. 1 ;
  • FIG. 3 is a schematic cross-sectional view for explaining the structure of an electronic circuit module 20 according to a second embodiment of the present invention
  • FIG. 4 is a schematic cross-sectional view for explaining the structure of an electronic circuit module 20 a according to a comparative example
  • FIG. 5 is a schematic cross-sectional view for explaining the structure of an electronic circuit module 20 b according to a third embodiment of the present invention.
  • FIG. 6 is a schematic cross-sectional view for explaining the structure of an electronic circuit module 30 according to a fourth embodiment of the present invention.
  • FIG. 7 to FIG. 12 are process views for explaining a manufacturing method of the electronic circuit module 10 .
  • FIG. 1 is a schematic cross-sectional view for explaining the structure of an electronic circuit module 10 according to a first embodiment of the present invention.
  • the electronic circuit module 10 has a circuit board 11 having a lower surface 11 a , an upper surface 11 b , and a side surface 11 c , electronic components 15 a and 15 b mounted on the upper surface 11 b of the circuit board 11 , and a mold member 16 that covers the upper surface 11 b and side surface 11 c of the circuit board 11 so as to embed therein the electronic components 15 a and 15 b .
  • the circuit board 11 is a multilayer substrate including a plurality of wiring layers 12 and a plurality of via conductors 13 each connecting the wiring layers 12 and has a plurality of terminal electrodes 14 a and 14 b on the lower and upper surfaces 11 a and 11 b , respectively.
  • the circuit board 11 is not particularly limited in structure and material and may be a wiring body of metal, ceramic, polymer, or a composite material thereof.
  • the lower and upper surfaces 11 a and 11 b of the circuit board 11 are main surfaces positioned on the sides opposite to each other.
  • the electronic components 15 a and 15 b mounted on the upper surface 11 b of the circuit board 11 are connected respectively to their corresponding terminal electrodes 14 b through a solder.
  • the electrode component is not particularly limited in type.
  • the electrode component 15 a is a filter circuit or a semiconductor IC
  • the electrode component 15 b is a chip component such as a capacitor or an inductor.
  • the mold member 16 covers not only the upper surface 11 b of the circuit board 11 but also the side surface 11 c .
  • the side surface 11 c of the circuit board 11 connects the end portion of the lower surface 11 a and end portion of the upper surface 11 b and is typically perpendicular to the lower and upper surfaces 11 a and 11 b .
  • the mold member 16 does not cover the entire side surface 11 c of the circuit board 11 but selectively covers an upper area 11 c 2 positioned on the side close to the upper surface 11 b without covering a lower area 11 c 1 positioned on the side close to the lower surface 11 a . Accordingly, the lower area 11 c 1 is not covered with the mold member 16 but is exposed.
  • the lower area 11 c 1 not covered with the mold member 16 is excessively wide, reliability may degrade, so that the lower area 11 c 1 is preferably smaller than the upper area 11 c 2 and more preferably smaller than or equal to half of the upper area 11 c 2 .
  • a part of the mold member 16 that covers the side surface 11 c of the circuit board 11 has an inner surface 16 a contacting the side surface 11 c of the circuit board 11 and an outer surface 16 b positioned on the side opposite to the inner surface 16 a .
  • the inner surface 16 a and the outer surface 16 b are almost parallel to each other.
  • the outer surface 16 b protrudes from the inner surface 16 a toward the lower surface 11 a of the circuit board 11 .
  • an end surface 16 c connecting the lower end portion of the outer surface 16 b and the lower end portion of the inner surface 16 a has a tapered shape protruding toward the lower surface 11 a of the circuit board 11 as it separates from the side surface 11 c of the circuit board 11 .
  • a space S is formed by the end surface 16 c of the mold member 16 and the lower area 11 c 1 of the side surface 11 c of the circuit board 11 .
  • the space S preferably has a height H of about 15 ⁇ m to about 300 ⁇ m and a width W of about 15 ⁇ m to about 250 ⁇ m.
  • the space S functions as a housing part for an underfill material to be described later.
  • the end surface 16 c of the mold member 16 need not necessarily have a tapered shape and may have a step-like shape as illustrated in FIG. 2B or a flat shape as illustrated in FIG. 2C .
  • the space S has a more closed shape, with the result that it function more effectively as a housing part, whereas the width W of the space S decreases to reduce the volume of the space S.
  • the end surface 16 c of the mold member 16 has a flat shape as illustrated in FIG. 2C , the volume of the space S increases, whereas the space S has a more opened shape, with the result that the function as a housing part deteriorates.
  • the end surface 16 c of the mold member 16 most preferably has a tapered shape as illustrated in FIG. 2A .
  • FIG. 3 is a schematic cross-sectional view for explaining the structure of an electronic circuit module 20 according to a second embodiment of the present invention.
  • the electronic circuit module 20 has a configuration in which the electronic circuit module 10 illustrated in FIG. 1 is stacked on another circuit board 21 .
  • the circuit board 21 is a multilayer substrate including a plurality of wiring layers 22 and a plurality of via conductors 23 each connecting the wiring layers 22 and has a plurality of terminal electrodes 24 a and 24 b on the lower and upper surfaces 21 a and 21 b , respectively.
  • the lower surface 21 a of the circuit board 21 is covered with a solder resist 27 a except for portions at which the terminal electrodes 24 a are exposed.
  • the upper surface 21 b of the circuit board 21 is covered with a solder resist 27 b except for portions at which the terminal electrodes 24 b are exposed.
  • the electronic circuit module 10 illustrated in FIG. 1 is mounted on the upper surface 21 b of the circuit board 21 .
  • the circuit board 21 and the circuit board 11 are connected through a solder 29 .
  • Another electronic component 25 may be mounted on the upper surface 21 b of the circuit board 21 .
  • a mold member 26 covers the upper surface 21 b of the circuit board 21 so as to embed the electronic circuit module 10 and electronic component 25 .
  • an underfill material 28 is filled between the lower surface 11 a of the circuit board 11 and the upper surface 21 b of the circuit board 21 .
  • the lower area 11 c 1 of the side surface 11 c of the circuit board 11 is covered with the underfill material 28 .
  • An excess part of the underfill material 28 protrudes from the lower surface 11 a of the circuit board 11 and reaches the outer surface 16 b of the mold member 16 .
  • the electronic circuit module 10 has the space S, so that the excess part of the underfill material 28 is partly accommodated in the space S, thereby suppressing unnecessary spreading of the underfill material 28 .
  • the underfill material 28 covers a part of the outer surface 16 b of the mold member 16 , it does not reach the upper surface 16 d of the mold member 16 due to the presence of the space S.
  • FIG. 4 illustrates an electronic circuit module 20 a according to a comparative example.
  • delaminating arrow B
  • the boundary between the underfill material 28 and the mold member 26 propagates along the upper surface 16 d of the mold member 16 and reaches the electronic component 25 , which may break an electrical connection portion between the electronic component 25 and the circuit board 21 .
  • an excess part of the underfill material 28 is partly accommodated in the space S to make the delaminating denoted by the arrow B less likely to reach the upper surface 16 d of the mold member 16 .
  • propagation of the delaminating stops at the outer surface 16 b of the mold member 16 , which makes further delaminating less likely to occur.
  • FIG. 5 is a schematic cross-sectional view for explaining the structure of an electronic circuit module 20 b according to a third embodiment of the present invention.
  • the electronic circuit module 20 b according to the third embodiment differs from the electronic circuit module 20 illustrated in FIG. 3 in that it does not use the underfill material.
  • the lower area 11 c 1 of the side surface 11 c of the circuit board 11 is covered with the mold member 26 .
  • the underfill material is not used, delaminating at the boundary between the mold member 26 and the underfill material does not occur; however, the absence of the underfill means that there are fewer portions for releasing the stress caused due to a thermal load.
  • delaminating may be caused at the boundary between the lower surface 11 a of the circuit board 11 and the mold member 26 by stress ascribable to thermal expansion of the solder 29 , which may cause a connection defect between the electronic circuit module 10 or electronic components 15 a , 15 b and the circuit board 21 .
  • the presence of the space S makes delaminating likely to occur at the boundary between the side surface 11 c of the circuit board 11 and the mold member 16 .
  • making delaminating occur at this portion allows the stress to be released. Since neither element nor electrode exists on the side surface 11 c of the circuit board 11 , even if delaminating occurs at this portion, no malfunction is caused in the electronic circuit module 20 b.
  • FIG. 6 is a schematic cross-sectional view for explaining the structure of an electronic circuit module 30 according to a fourth embodiment of the present invention.
  • the electronic circuit module 30 has a configuration in which the electronic circuit module 20 illustrated in FIG. 3 is stacked on still another circuit board 31 .
  • the circuit board 31 is a multilayer substrate including a plurality of wiring layers 32 and a plurality of via conductors 33 each connecting the wiring layers 32 and has a plurality of terminal electrodes 34 b on an upper surface 31 b .
  • the upper surface 31 b of the circuit board 31 is covered with a solder resist 37 b except for portions at which the terminal electrodes 34 b are exposed.
  • the electronic circuit module 20 illustrated in FIG. 3 is mounted on the upper surface 31 b of the circuit board 31 .
  • the circuit board 31 and the circuit board 21 are connected through a solder 39 .
  • Another electronic circuit module and/or another electronic component may be mounted on the upper surface 31 b of the circuit board 31 .
  • solder reflow is performed when the electronic circuit module 10 is mounted on the circuit board 21 , and additional solder reflow is performed when the electronic circuit module 20 is mounted on the circuit board 31 . That is, a thermal load is applied to the electronic circuit module 20 a plurality of times.
  • unnecessary spreading of the underfill material 28 is suppressed as described above, which makes a connection defect caused by propagation of delaminating due to a thermal load less likely to occur.
  • the following describes a manufacturing method for the electronic circuit module 10 according to the first embodiment of the present invention.
  • a plurality of the circuit boards 11 each mounting the electronic components 15 a and 15 b are prepared and stuck, at their individual lower surfaces 11 a , to a support member 40 .
  • the support member 40 is constituted of a heat-resistant plate material 41 and a heat-resistant double-sided tape 42 , and the lower surface 11 a of the circuit board 11 is stuck to the heat-resistant double-sided tape 42 .
  • the heat-resistant plate material 41 may be a core material having a thickness of about 0.3 mm.
  • the heat-resistant double-sided tape 42 preferably has an adhesive strength of about 0.5 N/20 mm to about 5 N/20 mm and an adhesive thickness of 15 ⁇ m or more.
  • An excessively low adhesive strength causes the circuit board 11 to be delaminated from the support member at the time of formation of the mold member 16 .
  • An excessively high adhesive strength makes it difficult to achieve subsequent mechanical delaminating.
  • An excessively small adhesive thickness causes the circuit board 11 to be delaminated from the support member 40 .
  • a space forming material 51 of a liquid type is supplied from a dispenser 50 , and the surface of the support member 40 that is positioned between the adjacent circuit boards 11 is covered with the space forming material 51 .
  • the space forming material 51 is preferably a thermosetting resin mixture and, more preferably, a material of a liquid type that can be delivered by a dispenser and whose viscosity can be adjusted by heating. Further, in order to facilitate subsequent delaminating, a material having a linear expansion coefficient different significantly from that of the mold member 16 is preferably used.
  • the space forming material 51 is dried and cured.
  • the space forming material 51 before being cured is in a liquid state, so that the surface of the space forming material 51 is curved (concaved at the center) by the effect of surface tension.
  • the mold member 16 is supplied so as to cover the plurality of circuit boards 11 .
  • the mold member 16 can be supplied by a dispenser method, a print method, a transfer mold method, a compression mold method, or the like.
  • the electronic components 15 a and 15 b mounted on the upper surface 11 b of the circuit board 11 are embedded in the mold member 16 , and the mold member 16 is filled between the adjacent circuit boards 11 .
  • the support member 40 and space forming material 51 are removed, with the result that the upper area 11 c 2 of the side surface 11 c of the circuit board 11 is covered with the mold member 16 , while the lower area 11 c 1 is exposed.
  • the mold member 16 is cut for individualization to obtain multiple electronic circuit modules 10 each having the configuration illustrated in FIG. 1 .
  • the end surface 16 c of the mold member 16 can be formed into a tapered shape by surface tension of the space forming material 51 , and the tapered angle can be adjusted by the viscosity, etc., of the space forming material 51 .
  • the thus obtained electronic circuit module 10 can be mounted on another circuit board (e.g., the circuit board 21 ). After being mounted on the circuit board 21 , the electronic circuit module 10 is supplied with the underfill material 28 and covered with the mold member 26 , whereby the electronic circuit module 20 illustrated in FIG. 3 can be obtained. The thus obtained electronic circuit module 20 can be mounted on still another circuit board (e.g., the circuit board 31 ), whereby the electronic circuit module 30 illustrated in FIG. 6 can be obtained.
  • another circuit board e.g., the circuit board 21
  • the electronic circuit module 10 is supplied with the underfill material 28 and covered with the mold member 26 , whereby the electronic circuit module 20 illustrated in FIG. 3 can be obtained.
  • the thus obtained electronic circuit module 20 can be mounted on still another circuit board (e.g., the circuit board 31 ), whereby the electronic circuit module 30 illustrated in FIG. 6 can be obtained.

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  • Engineering & Computer Science (AREA)
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  • Manufacturing & Machinery (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

Disclosed herein is an electric circuit module that includes a circuit board, an electronic component mounted on an upper surface of the circuit board, and a mold member that covers the upper and side surfaces of the circuit board. The lower area of the side surface of the circuit board is exposed so as not to be covered with the mold member.

Description

    BACKGROUND OF THE INVENTION Field of the Invention
  • The present invention relates to an electronic circuit module and a manufacturing method therefore and, more particularly, to an electronic circuit module capable of multiplexed implementation and a manufacturing method therefor.
    • Description of Related Art
  • JP 2020-035993A discloses an electronic circuit module in which a first circuit board is mounted on a second circuit board, and the second circuit board is mounted on a third circuit board. In such multiplexed implementation, solder reflow is performed when the first circuit board is implemented on the second circuit board, and additional solder reflow is performed when the second circuit board is implemented on the third circuit board, so that the first circuit board is subjected to the solder reflow a plurality of times.
  • In a configuration in which an underfill material is filled between the first and second circuit boards, when an excess part of the underfill material reaches the upper surface of a mold member covering the first circuit board, delaminating is likely to occur during solder reflow at the boundary between the mold member covering the first circuit board and a mold member covering the second circuit board. Even when the underfill member is not used, delaminating is likely to occur during solder reflow at the boundary between the lower surface (mounting surface) of the first circuit board and the mold member covering the second circuit board.
  • Propagation of such delaminating may cause a connection defect. This becomes remarkable when the reflow is performed a plurality of times.
    • SUMMARY
  • An object of the present invention is therefore to provide an electronic circuit module in which a connection defect caused by delaminating due to a thermal load during solder reflow is less likely to occur and a manufacturing method therefor.
  • An electronic circuit module according to the present invention includes: a first circuit board having a plurality of terminal electrodes on its lower surface; an electronic component mounted on the upper surface of the first circuit board positioned on the side opposite to the lower surface; and a first mold member that covers the upper surface of the first circuit board and a side surface thereof connecting the upper and lower surfaces so as to embed therein the electronic component. A lower area of the side surface of the first circuit board that is positioned on the side close to the lower surface is not covered with the first mold member but is exposed.
  • According to the present invention, a space formed between the end surface of the first mold member and the lower area of the side surface of the first circuit board serves as a housing part for an underfill material, so that even when the amount of the underfill material is excessive, delaminating, which may occur during solder reflow, is less likely to propagate. Even when the underfill material is not used, delaminating is likely to occur at the boundary between the inner surface of the first mold member and the side surface of the first circuit board. Thus, making delaminating occur at this portion allows stress relief. This can prevent a connection defect caused by delaminating due to a thermal load.
  • In the present invention, a part of the first mold member that covers the side surface of the first circuit board may have an inner surface contacting the side surface of the first circuit board and an outer surface positioned on the side opposite to the inner surface, and the outer surface may protrude toward the lower surface of the first circuit board from the inner surface. This further facilitates housing of an excess part of the underfill material. In this case, the end surface of the first mold member that connects a lower end portion of the outer surface and a lower end portion of the inner surface may have a tapered shape protruding toward the lower surface of the first circuit board as it separates from the side surface of the first circuit board. This still further facilitates the accommodation of an excess part of the underfill material.
  • The electronic circuit module according to the present invention may further include: a second circuit board that mounts the first circuit board on the upper surface thereof; and a second mold member that covers the upper surface of the second circuit board so as to embed therein the first circuit board. This can prevent delaminating at the boundary between the first and second mold members and a connection defect of another electronic component mounted on the second circuit board. In this case, the underfill member may further be supplied between the lower surface of the first circuit board and the upper surface of the second circuit board so as to cover a part of the side surface of the first circuit board that is exposed from the first mold member. Alternatively, the second mold member may cover the part of the side surface of the first circuit board that is exposed from the first mold member.
  • The electronic circuit module according to the present invention may further include a third circuit board that mounts thereon the second circuit board. This can prevent a defect in the first and second circuit boards which may occur in solder reflow performed when the second circuit board is mounted on the third circuit board.
  • An electric circuit module manufacturing method according to the present invention includes: a first step of preparing a first circuit board having a plurality of terminal electrodes on its lower surface and an electronic component on the upper surface of the first circuit board positioned on the side opposite to the lower surface and sticking the lower surface of the first circuit board to a support member; a second step of covering, with a space forming material, the side surface of the first circuit board that connects the upper and lower surfaces not entirely, but selectively at a lower area of the side surface positioned on the side close to the lower surface; a third step of forming a first mold member that covers the upper and side surfaces of the first circuit board so as to embed therein the electronic component; and a fourth step of removing the support member and space forming material and cutting the first mold member for individualization.
  • According to the present invention, the lower area of the side surface of the first circuit board can be exposed without being covered with the first mold member.
  • The electric circuit module manufacturing method according to the present invention may further include: a fifth step of preparing a second circuit board and mounting the first circuit board on the upper surface of the second circuit board; and a sixth step of forming a second mold member that covers the upper surface of the second circuit board so as to embed therein the first circuit board. This can provide a secondary-mounted electronic circuit module. In this case, the method may further include, after the fifth step and before the sixth step, a step of filling an underfill material between the lower surface of the first circuit board and the upper surface of the second circuit board. This makes delaminating occurring during solder reflow less likely to propagate even when the amount of the underfill member is excessive.
  • The electric circuit module manufacturing method according to the present invention may further include a seventh step of preparing a third circuit board and mounting the second circuit board on the third circuit board. This can provide a tertiary-mounted electronic circuit module.
  • As described above, according to the present invention, there can be provided an electronic circuit module in which a connection defect caused by delaminating due to a thermal load during solder reflow is less likely to occur and a manufacturing method therefor.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • The above and other objects, features and advantages of this invention will become more apparent by reference to the following detailed description of the invention taken in conjunction with the accompanying drawings, wherein:
  • FIG. 1 is a schematic cross-sectional view for explaining the structure of an electronic circuit module 10 according to a first embodiment of the present invention;
  • FIG. 2A-2C are enlarged views of the area A shown in FIG. 1;
  • FIG. 3 is a schematic cross-sectional view for explaining the structure of an electronic circuit module 20 according to a second embodiment of the present invention;
  • FIG. 4 is a schematic cross-sectional view for explaining the structure of an electronic circuit module 20 a according to a comparative example;
  • FIG. 5 is a schematic cross-sectional view for explaining the structure of an electronic circuit module 20 b according to a third embodiment of the present invention;
  • FIG. 6 is a schematic cross-sectional view for explaining the structure of an electronic circuit module 30 according to a fourth embodiment of the present invention; and
  • FIG. 7 to FIG. 12 are process views for explaining a manufacturing method of the electronic circuit module 10.
    •  DETAILED DESCRIPTION OF THE EMBODIMENTS
  • Preferred embodiments of the present invention will now be explained in detail with reference to the drawings.
  • FIG. 1 is a schematic cross-sectional view for explaining the structure of an electronic circuit module 10 according to a first embodiment of the present invention.
  • As illustrated in FIG. 1, the electronic circuit module 10 according to the first embodiment has a circuit board 11 having a lower surface 11 a, an upper surface 11 b, and a side surface 11 c, electronic components 15 a and 15 b mounted on the upper surface 11 b of the circuit board 11, and a mold member 16 that covers the upper surface 11 b and side surface 11 c of the circuit board 11 so as to embed therein the electronic components 15 a and 15 b. The circuit board 11 is a multilayer substrate including a plurality of wiring layers 12 and a plurality of via conductors 13 each connecting the wiring layers 12 and has a plurality of terminal electrodes 14 a and 14 b on the lower and upper surfaces 11 a and 11 b, respectively. The circuit board 11 is not particularly limited in structure and material and may be a wiring body of metal, ceramic, polymer, or a composite material thereof. The lower and upper surfaces 11 a and 11 b of the circuit board 11 are main surfaces positioned on the sides opposite to each other. The electronic components 15 a and 15 b mounted on the upper surface 11 b of the circuit board 11 are connected respectively to their corresponding terminal electrodes 14 b through a solder. The electrode component is not particularly limited in type. For example, the electrode component 15 a is a filter circuit or a semiconductor IC, and the electrode component 15 b is a chip component such as a capacitor or an inductor.
  • The mold member 16 covers not only the upper surface 11 b of the circuit board 11 but also the side surface 11 c. The side surface 11 c of the circuit board 11 connects the end portion of the lower surface 11 a and end portion of the upper surface 11 b and is typically perpendicular to the lower and upper surfaces 11 a and 11 b. The mold member 16 does not cover the entire side surface 11 c of the circuit board 11 but selectively covers an upper area 11 c 2 positioned on the side close to the upper surface 11 b without covering a lower area 11 c 1 positioned on the side close to the lower surface 11 a. Accordingly, the lower area 11 c 1 is not covered with the mold member 16 but is exposed. However, when the lower area 11 c 1 not covered with the mold member 16 is excessively wide, reliability may degrade, so that the lower area 11 c 1 is preferably smaller than the upper area 11 c 2 and more preferably smaller than or equal to half of the upper area 11 c 2.
  • A part of the mold member 16 that covers the side surface 11 c of the circuit board 11 has an inner surface 16 a contacting the side surface 11 c of the circuit board 11 and an outer surface 16 b positioned on the side opposite to the inner surface 16 a. The inner surface 16 a and the outer surface 16 b are almost parallel to each other. The outer surface 16 b protrudes from the inner surface 16 a toward the lower surface 11 a of the circuit board 11. In the present embodiment, an end surface 16 c connecting the lower end portion of the outer surface 16 b and the lower end portion of the inner surface 16 a has a tapered shape protruding toward the lower surface 11 a of the circuit board 11 as it separates from the side surface 11 c of the circuit board 11. Thus, a space S is formed by the end surface 16 c of the mold member 16 and the lower area 11 c 1 of the side surface 11 c of the circuit board 11. As illustrated in FIG. 2A which is an enlarged view of the area A illustrated in FIG. 1, the space S preferably has a height H of about 15 μm to about 300 μm and a width W of about 15 μm to about 250 μm. The space S functions as a housing part for an underfill material to be described later.
  • However, the end surface 16 c of the mold member 16 need not necessarily have a tapered shape and may have a step-like shape as illustrated in FIG. 2B or a flat shape as illustrated in FIG. 2C. When the end surface 16 c of the mold member 16 has a step-like shape as illustrated in FIG. 2B, the space S has a more closed shape, with the result that it function more effectively as a housing part, whereas the width W of the space S decreases to reduce the volume of the space S. On the other hand, when the end surface 16 c of the mold member 16 has a flat shape as illustrated in FIG. 2C, the volume of the space S increases, whereas the space S has a more opened shape, with the result that the function as a housing part deteriorates. Considering the above, the end surface 16 c of the mold member 16 most preferably has a tapered shape as illustrated in FIG. 2A.
  • FIG. 3 is a schematic cross-sectional view for explaining the structure of an electronic circuit module 20 according to a second embodiment of the present invention.
  • The electronic circuit module 20 according to the second embodiment has a configuration in which the electronic circuit module 10 illustrated in FIG. 1 is stacked on another circuit board 21. The circuit board 21 is a multilayer substrate including a plurality of wiring layers 22 and a plurality of via conductors 23 each connecting the wiring layers 22 and has a plurality of terminal electrodes 24 a and 24 b on the lower and upper surfaces 21 a and 21 b, respectively. The lower surface 21 a of the circuit board 21 is covered with a solder resist 27 a except for portions at which the terminal electrodes 24 a are exposed. The upper surface 21 b of the circuit board 21 is covered with a solder resist 27 b except for portions at which the terminal electrodes 24 b are exposed. The electronic circuit module 10 illustrated in FIG. 1 is mounted on the upper surface 21 b of the circuit board 21. The circuit board 21 and the circuit board 11 are connected through a solder 29. Another electronic component 25 may be mounted on the upper surface 21 b of the circuit board 21.
  • A mold member 26 covers the upper surface 21 b of the circuit board 21 so as to embed the electronic circuit module 10 and electronic component 25. In the example of FIG. 3, an underfill material 28 is filled between the lower surface 11 a of the circuit board 11 and the upper surface 21 b of the circuit board 21. In this case, the lower area 11 c 1 of the side surface 11 c of the circuit board 11 is covered with the underfill material 28. An excess part of the underfill material 28 protrudes from the lower surface 11 a of the circuit board 11 and reaches the outer surface 16 b of the mold member 16. In the present embodiment, the electronic circuit module 10 has the space S, so that the excess part of the underfill material 28 is partly accommodated in the space S, thereby suppressing unnecessary spreading of the underfill material 28. In particular, although the underfill material 28 covers a part of the outer surface 16 b of the mold member 16, it does not reach the upper surface 16 d of the mold member 16 due to the presence of the space S.
  • FIG. 4 illustrates an electronic circuit module 20 a according to a comparative example. As illustrated in FIG. 4, when an excess part of the underfill material 28 reaches the upper surface 16 d of the mold member 16, delaminating (arrow B) at the boundary between the underfill material 28 and the mold member 26 propagates along the upper surface 16 d of the mold member 16 and reaches the electronic component 25, which may break an electrical connection portion between the electronic component 25 and the circuit board 21. On the other hand, in the present embodiment, an excess part of the underfill material 28 is partly accommodated in the space S to make the delaminating denoted by the arrow B less likely to reach the upper surface 16 d of the mold member 16. Thus, even if delaminating occurs at the boundary between the underfill material 28 and the mold member 26, propagation of the delaminating stops at the outer surface 16 b of the mold member 16, which makes further delaminating less likely to occur.
  • FIG. 5 is a schematic cross-sectional view for explaining the structure of an electronic circuit module 20 b according to a third embodiment of the present invention.
  • The electronic circuit module 20 b according to the third embodiment differs from the electronic circuit module 20 illustrated in FIG. 3 in that it does not use the underfill material. In this case, the lower area 11 c 1 of the side surface 11 c of the circuit board 11 is covered with the mold member 26. When the underfill material is not used, delaminating at the boundary between the mold member 26 and the underfill material does not occur; however, the absence of the underfill means that there are fewer portions for releasing the stress caused due to a thermal load.
  • Accordingly, delaminating may be caused at the boundary between the lower surface 11 a of the circuit board 11 and the mold member 26 by stress ascribable to thermal expansion of the solder 29, which may cause a connection defect between the electronic circuit module 10 or electronic components 15 a, 15 b and the circuit board 21. However, in the present embodiment, the presence of the space S makes delaminating likely to occur at the boundary between the side surface 11 c of the circuit board 11 and the mold member 16. Thus, making delaminating occur at this portion allows the stress to be released. Since neither element nor electrode exists on the side surface 11 c of the circuit board 11, even if delaminating occurs at this portion, no malfunction is caused in the electronic circuit module 20 b.
  • FIG. 6 is a schematic cross-sectional view for explaining the structure of an electronic circuit module 30 according to a fourth embodiment of the present invention.
  • The electronic circuit module 30 according to the fourth embodiment has a configuration in which the electronic circuit module 20 illustrated in FIG. 3 is stacked on still another circuit board 31. The circuit board 31 is a multilayer substrate including a plurality of wiring layers 32 and a plurality of via conductors 33 each connecting the wiring layers 32 and has a plurality of terminal electrodes 34 b on an upper surface 31 b. The upper surface 31 b of the circuit board 31 is covered with a solder resist 37 b except for portions at which the terminal electrodes 34 b are exposed. The electronic circuit module 20 illustrated in FIG. 3 is mounted on the upper surface 31 b of the circuit board 31. The circuit board 31 and the circuit board 21 are connected through a solder 39. Another electronic circuit module and/or another electronic component (not illustrated) may be mounted on the upper surface 31 b of the circuit board 31.
  • In a process of manufacturing the thus configured electronic circuit module 30, solder reflow is performed when the electronic circuit module 10 is mounted on the circuit board 21, and additional solder reflow is performed when the electronic circuit module 20 is mounted on the circuit board 31. That is, a thermal load is applied to the electronic circuit module 20 a plurality of times. However, in the present embodiment, unnecessary spreading of the underfill material 28 is suppressed as described above, which makes a connection defect caused by propagation of delaminating due to a thermal load less likely to occur.
  • The following describes a manufacturing method for the electronic circuit module 10 according to the first embodiment of the present invention.
  • As illustrated in FIG. 7, a plurality of the circuit boards 11 each mounting the electronic components 15 a and 15 b are prepared and stuck, at their individual lower surfaces 11 a, to a support member 40. In the example of FIG. 7, the support member 40 is constituted of a heat-resistant plate material 41 and a heat-resistant double-sided tape 42, and the lower surface 11 a of the circuit board 11 is stuck to the heat-resistant double-sided tape 42. The heat-resistant plate material 41 may be a core material having a thickness of about 0.3 mm. The heat-resistant double-sided tape 42 preferably has an adhesive strength of about 0.5 N/20 mm to about 5 N/20 mm and an adhesive thickness of 15 μm or more. An excessively low adhesive strength causes the circuit board 11 to be delaminated from the support member at the time of formation of the mold member 16. An excessively high adhesive strength makes it difficult to achieve subsequent mechanical delaminating. An excessively small adhesive thickness causes the circuit board 11 to be delaminated from the support member 40.
  • Then, as illustrated in FIG. 8, a space forming material 51 of a liquid type is supplied from a dispenser 50, and the surface of the support member 40 that is positioned between the adjacent circuit boards 11 is covered with the space forming material 51. The space forming material 51 is preferably a thermosetting resin mixture and, more preferably, a material of a liquid type that can be delivered by a dispenser and whose viscosity can be adjusted by heating. Further, in order to facilitate subsequent delaminating, a material having a linear expansion coefficient different significantly from that of the mold member 16 is preferably used. At this time, not the entire side surface 11 c of the circuit board 11 is covered with the space forming material 51, but only the lower area 11 c 1 is selectively covered (that is, the upper area 11 c 2 is not covered with the space forming material 51). After that, as illustrated in FIG. 9, the space forming material 51 is dried and cured. The space forming material 51 before being cured is in a liquid state, so that the surface of the space forming material 51 is curved (concaved at the center) by the effect of surface tension.
  • Then, as illustrated in FIG. 10, the mold member 16 is supplied so as to cover the plurality of circuit boards 11. The mold member 16 can be supplied by a dispenser method, a print method, a transfer mold method, a compression mold method, or the like. As a result, the electronic components 15 a and 15 b mounted on the upper surface 11 b of the circuit board 11 are embedded in the mold member 16, and the mold member 16 is filled between the adjacent circuit boards 11. After that, as illustrated in FIG. 11, the support member 40 and space forming material 51 are removed, with the result that the upper area 11 c 2 of the side surface 11 c of the circuit board 11 is covered with the mold member 16, while the lower area 11 c 1 is exposed.
  • Then, as illustrated in FIG. 12, the mold member 16 is cut for individualization to obtain multiple electronic circuit modules 10 each having the configuration illustrated in FIG. 1. According to the above manufacturing method, it is possible to adjust the area of the lower area 11 c 1 to be exposed from the mold member 16 depending on the supply amount of the space forming material 51. The end surface 16 c of the mold member 16 can be formed into a tapered shape by surface tension of the space forming material 51, and the tapered angle can be adjusted by the viscosity, etc., of the space forming material 51.
  • The thus obtained electronic circuit module 10 can be mounted on another circuit board (e.g., the circuit board 21). After being mounted on the circuit board 21, the electronic circuit module 10 is supplied with the underfill material 28 and covered with the mold member 26, whereby the electronic circuit module 20 illustrated in FIG. 3 can be obtained. The thus obtained electronic circuit module 20 can be mounted on still another circuit board (e.g., the circuit board 31), whereby the electronic circuit module 30 illustrated in FIG. 6 can be obtained.
  • While the preferred embodiment of the present invention has been described, the present invention is not limited to the above embodiment, and various modifications may be made within the scope of the present invention, and all such modifications are included in the present invention.

Claims (11)

What is claimed is:
1. An electronic circuit module comprising:
a first circuit board having a plurality of terminal electrodes on its lower surface;
an electronic component mounted on an upper surface of the first circuit board positioned on a side opposite to the lower surface; and
a first mold member that covers the upper surface of the first circuit board and a side surface thereof connecting the upper and lower surfaces so as to embed therein the electronic component,
wherein a lower area of the side surface of the first circuit board that is positioned on a side close to the lower surface is exposed so as not to be covered with the first mold member.
2. The electronic circuit module as claimed in claim 1,
wherein a part of the first mold member that covers the side surface of the first circuit board has an inner surface contacting the side surface of the first circuit board and an outer surface positioned on a side opposite to the inner surface, and
wherein the outer surface protrudes toward the lower surface of the first circuit board from the inner surface.
3. The electronic circuit module as claimed in claim 2, wherein an end surface of the first mold member that connects a lower end portion of the outer surface and a lower end portion of the inner surface has a tapered shape protruding toward the lower surface of the first circuit board as it separates from the side surface of the first circuit board.
4. The electronic circuit module as claimed in claim 1, further comprising:
a second circuit board that mounts the first circuit board on an upper surface thereof; and
a second mold member that covers the upper surface of the second circuit board so as to embed therein the first circuit board.
5. The electronic circuit module as claimed in claim 4, further comprising an underfill member supplied between the lower surface of the first circuit board and the upper surface of the second circuit board so as to cover a part of the side surface of the first circuit board that is exposed from the first mold member.
6. The electronic circuit module as claimed in claim 4, the second mold member covers a part of the side surface of the first circuit board that is exposed from the first mold member.
7. The electronic circuit module as claimed in claim 4, further comprising a third circuit board that mounts thereon the second circuit board.
8. A method of manufacturing an electric circuit module, the method comprising:
a first step of preparing a first circuit board having a plurality of terminal electrodes on its lower surface and an electronic component on an upper surface of the first circuit board positioned on a side opposite to the lower surface and sticking the lower surface of the first circuit board to a support member;
a second step of covering, with a space forming material, a side surface of the first circuit board that connects the upper and lower surfaces not entirely, but selectively at a lower area of the side surface positioned on a side close to the lower surface;
a third step of forming a first mold member that covers the upper and side surfaces of the first circuit board so as to embed therein the electronic component; and
a fourth step of removing the support member and space forming material and cutting the first mold member for individualization.
9. The method of manufacturing an electric circuit module as claimed in claim 8, the method further comprising:
a fifth step of preparing a second circuit board and mounting the first circuit board on an upper surface of the second circuit board; and
a sixth step of forming a second mold member that covers the upper surface of the second circuit board so as to embed therein the first circuit board.
10. The method of manufacturing an electric circuit module as claimed in claim 9, the method further comprising, after the fifth step and before the sixth step, a step of filling an underfill material between the lower surface of the first circuit board and the upper surface of the second circuit board.
11. The method of manufacturing an electric circuit module as claimed in claim 9, the method further comprising a seventh step of preparing a third circuit board and mounting the second circuit board on the third circuit board.
US17/671,119 2020-12-15 2022-02-14 Electric circuit module and manufacturing method thereof Active 2042-02-27 US11979988B2 (en)

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Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6946323B1 (en) * 2001-11-02 2005-09-20 Amkor Technology, Inc. Semiconductor package having one or more die stacked on a prepackaged device and method therefor
US20060108700A1 (en) * 2004-11-19 2006-05-25 Denso Corporation Semiconductor device, method and apparatus for fabricating the same
US7288835B2 (en) * 2006-03-17 2007-10-30 Stats Chippac Ltd. Integrated circuit package-in-package system
US20080315372A1 (en) * 2007-06-20 2008-12-25 Stats Chippac, Ltd. Wafer Level Integration Package
US7635913B2 (en) * 2006-12-09 2009-12-22 Stats Chippac Ltd. Stacked integrated circuit package-in-package system
US8067308B2 (en) * 2009-06-08 2011-11-29 Stats Chippac, Ltd. Semiconductor device and method of forming an interconnect structure with TSV using encapsulant for structural support
US20130208426A1 (en) * 2012-02-15 2013-08-15 Samsung Electronics Co., Ltd. Semiconductor package having heat spreader and method of forming the same
US8884411B2 (en) * 2011-04-19 2014-11-11 Toyota Jidosha Kabushiki Kaisha Semiconductor device and manufacturing method thereof
US20180323170A1 (en) * 2015-11-12 2018-11-08 Amkor Technology, Inc. Semiconductor package and manufacturing method thereof
US20190244907A1 (en) * 2018-02-05 2019-08-08 Advanced Semiconductor Engineering, Inc. Semiconductor package structure and method for manufacturing the same
US10607914B2 (en) * 2018-03-05 2020-03-31 Samsung Electronics Co., Ltd. Semiconductor package
US20200161252A1 (en) * 2018-11-16 2020-05-21 STATS ChipPAC Pte. Ltd. Molded Laser Package with Electromagnetic Interference Shield and Method of Making
US20200211976A1 (en) * 2018-12-27 2020-07-02 STATS ChipPAC Pte. Ltd. Semiconductor Device with Partial EMI Shielding Removal Using Laser Ablation

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102164794B1 (en) 2018-08-27 2020-10-13 삼성전자주식회사 Fan-out semiconductor package

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6946323B1 (en) * 2001-11-02 2005-09-20 Amkor Technology, Inc. Semiconductor package having one or more die stacked on a prepackaged device and method therefor
US20060108700A1 (en) * 2004-11-19 2006-05-25 Denso Corporation Semiconductor device, method and apparatus for fabricating the same
US7288835B2 (en) * 2006-03-17 2007-10-30 Stats Chippac Ltd. Integrated circuit package-in-package system
US7635913B2 (en) * 2006-12-09 2009-12-22 Stats Chippac Ltd. Stacked integrated circuit package-in-package system
US20080315372A1 (en) * 2007-06-20 2008-12-25 Stats Chippac, Ltd. Wafer Level Integration Package
US8067308B2 (en) * 2009-06-08 2011-11-29 Stats Chippac, Ltd. Semiconductor device and method of forming an interconnect structure with TSV using encapsulant for structural support
US8884411B2 (en) * 2011-04-19 2014-11-11 Toyota Jidosha Kabushiki Kaisha Semiconductor device and manufacturing method thereof
US20130208426A1 (en) * 2012-02-15 2013-08-15 Samsung Electronics Co., Ltd. Semiconductor package having heat spreader and method of forming the same
US20180323170A1 (en) * 2015-11-12 2018-11-08 Amkor Technology, Inc. Semiconductor package and manufacturing method thereof
US20190244907A1 (en) * 2018-02-05 2019-08-08 Advanced Semiconductor Engineering, Inc. Semiconductor package structure and method for manufacturing the same
US10607914B2 (en) * 2018-03-05 2020-03-31 Samsung Electronics Co., Ltd. Semiconductor package
US20200161252A1 (en) * 2018-11-16 2020-05-21 STATS ChipPAC Pte. Ltd. Molded Laser Package with Electromagnetic Interference Shield and Method of Making
US20200211976A1 (en) * 2018-12-27 2020-07-02 STATS ChipPAC Pte. Ltd. Semiconductor Device with Partial EMI Shielding Removal Using Laser Ablation

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