US20200135686A1 - Semiconductor die with multiple contact pads electrically coupled to a lead of a lead frame - Google Patents
Semiconductor die with multiple contact pads electrically coupled to a lead of a lead frame Download PDFInfo
- Publication number
- US20200135686A1 US20200135686A1 US16/664,568 US201916664568A US2020135686A1 US 20200135686 A1 US20200135686 A1 US 20200135686A1 US 201916664568 A US201916664568 A US 201916664568A US 2020135686 A1 US2020135686 A1 US 2020135686A1
- Authority
- US
- United States
- Prior art keywords
- conductive layer
- lead
- contact pad
- semiconductor die
- contact pads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
- H01L23/49513—Lead-frames or other flat leads characterised by the die pad having bonding material between chip and die pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49517—Additional leads
- H01L23/4952—Additional leads the additional leads being a bump or a wire
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/43—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/4813—Connecting within a semiconductor or solid-state body, i.e. fly wire, bridge wire
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48455—Details of wedge bonds
- H01L2224/48456—Shape
- H01L2224/48458—Shape of the interface with the bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48475—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
- H01L2224/48476—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area
- H01L2224/48477—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding)
- H01L2224/48481—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a ball bond, i.e. ball on pre-ball
- H01L2224/48482—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a ball bond, i.e. ball on pre-ball on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
- H01L2224/49173—Radial fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73267—Layer and HDI connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7565—Means for transporting the components to be connected
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus
- H01L2224/83005—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92244—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
Definitions
- the present disclosure is directed to electrically coupling a semiconductor die to a lead frame.
- a semiconductor package typically includes a lead frame and a semiconductor die.
- the lead frame includes a die pad to support the semiconductor die, and a plurality of leads to carry electrical signals between the semiconductor die and an external component, such as a printed circuit board.
- a wire bonding process includes coupling a single wire between a single bonding pad on the semiconductor die and a single lead.
- the present disclosure is directed to a semiconductor die with multiple contact pads electrically coupled to a single lead via a single wire, and methods for fabricating the same.
- multiple contact pads are electrically coupled to each other via a plurality of conductive layers stacked on top of each other.
- the conductive layers may be stacked in a pyramid-like structure in which a first conductive layer is formed on a first contact pad, a second conductive layer is formed on a second contact pad, and a third conductive layer is formed on the first conductive layer and the second conductive layer.
- the uppermost conductive layer is then electrically coupled to a single lead via a single wire.
- the wire has a first end that is attached to the third conductive layer; and a second end that is attached to the lead.
- FIG. 1 is a plan view of a device according to an embodiment disclosed herein.
- FIG. 2 is an enlarged plan view of a portion of the device of FIG. 1 .
- FIG. 3 is a cross-sectional view of the portion of the device of FIG. 1 along the axis shown in FIG. 2 .
- FIG. 4 is an enlarged cross-sectional view of a portion of the device of FIG. 1 along the axis shown in FIG. 1 .
- FIG. 5 is an enlarged cross-sectional view of a portion of the device of FIG. 1 along the axis shown in FIG. 1 .
- FIGS. 6 to 8 are cross-sectional views illustrating various stages of a method of electrically coupling multiple contact pads to a single lead according to an embodiment disclosed herein.
- FIG. 9 is a cross-sectional view of the portion of the device of FIG. 1 along the axis shown in FIG. 2 according to another embodiment disclosed herein.
- references throughout the specification to integrated circuits is generally intended to include integrated circuit components built on semiconducting or glass substrates, whether or not the components are coupled together into a circuit or able to be interconnected.
- layer is used in its broadest sense to include a thin film, a cap, or the like, and one layer may be composed of multiple sub-layers.
- a wire bonding process is often used to electrically couple a semiconductor die to a plurality of leads of a lead frame.
- a wire bonding process includes coupling wires between bonding pads on the semiconductor die and the leads.
- the bonding pads are electrically coupled to the leads in one-to-one correspondence. That is, each bonding pad is electrically coupled to exactly one lead via a single wire.
- semiconductor dies are increasingly including integrated circuits with greater complexity, it is desirable to electrically couple multiple bonding pads to the same lead such that multiple electrical signals may be carried to the same lead. This is beneficial as this allows multiple inputs/output signals of a semiconductor die to be in communication with a single lead.
- multiple bonding pads may be electrically coupled to the same lead via multiple wires.
- three bonding pads may be electrically coupled to a single lead via three wires by coupling a wire between each of the three bonding pads and the single lead.
- This approach has several drawbacks.
- the leads of a lead frame often have limited surface area in which a wire may be attached. Many leads have sufficient surface area to accommodate a single wire. Thus, attaching multiple wires to a single lead may not be possible in some circumstances.
- Another drawback is that increasing the number of wires attached to a lead increases the chance of wires inadvertently contacting each other. That is, due to the wires being close in proximity to each other, the wires may accidently become shorted together. In addition, because of the tight clearance between wires, wires that are already attached to a lead may become damaged due to incidental contact from a capillary being used to attach another wire to the same lead.
- the lead frame is often temporarily attached to a substrate for support using, for example, adhesive tape. When multiple wires are attached to the same lead, the pressure from repeatedly attaching the wires to the lead may cause the adhesive tape to overly stick to the lead, itself. Consequently, when the lead frame is eventually removed from the adhesive tape and the substrate, a residue of the adhesive will sometimes remain on the lead.
- the present disclosure is directed to a semiconductor die with multiple contact pads electrically coupled to a single lead, and methods for fabricating the same.
- the multiple contact pads are coupled to the single lead with a single wire.
- FIG. 1 is a plan view of a device 10 according to an embodiment disclosed herein.
- the device 10 includes a lead frame 12 and a semiconductor die 14 .
- the lead frame 12 provides a platform for the semiconductor die 14 , and is used to carry electrical signals between the semiconductor die 14 and an external component, such as a printed circuit board.
- the lead frame 12 includes supports 16 , a plurality of leads 18 , and a die pad 20 .
- a variety of shapes and sizes of the lead frame are envisioned, such as frames with different sizes of die pads or openings in the die pads.
- the supports 16 are coupled to and extend from corners of the die pad 20 .
- the supports 16 are used to mount the lead frame 12 to a substrate, such as a printed circuit board.
- the supports, arms, or extensions provide structural support for the die pads within a package that includes molding compound around the die and the lead frame.
- the leads 18 are positioned on each of the four sides of the die pad 20 .
- the leads 18 carry electrical signals between the semiconductor die 14 (e.g., an integrated circuit within the semiconductor die 14 ) and an external source, such as a printed circuit board.
- the leads 18 are electrically coupled to the semiconductor die 14 via wires bonded between the leads 18 and the semiconductor die 14 .
- the lead frame 12 may include any number of leads and may have any type of arrangement.
- the lead frame 12 may include 10, 20, or 30 leads on a single side, two sides, or three sides of the die pad 20 .
- the die pad 20 is physically coupled to the supports 16 and positioned between the leads 18 .
- the die pad 20 provides a platform for the semiconductor die 14 .
- an upper surface 22 of the die pad 20 is a continuous, planar surface.
- the supports 16 and the die pad 20 are a single, contiguous piece.
- the lead frame 12 is made of a conductive material.
- the lead frame 12 may be made of steel, aluminum, copper, gold, combinations thereof, or another type of conductive material.
- the lead frame 12 may be fabricated using a variety of fabrication techniques.
- the lead frame 12 is formed by pattern deposition, a combination of blanket deposition and etching, or stamping a continuous sheet of material.
- the semiconductor die 14 is positioned on the upper surface 22 of the die pad 20 .
- the semiconductor die 14 is attached to the die pad using adhesive material, such as adhesive tape or a glue.
- the semiconductor die 14 may include a variety of electronic components or devices.
- the semiconductor die 14 may be a controller or processor, an application specific integrated circuit (ASIC), or any other type of integrated circuit.
- the semiconductor die 14 may be fabricated using fabrication processes known or later developed.
- the semiconductor die 14 includes contact pads 23 .
- the contact pads 23 are positioned on an upper surface 25 of the semiconductor die 14 , and are electrically coupled to integrated circuits, including transistors, active and passive electronic components in the semiconductor die 14 .
- the contact pads 23 are often referred to as bonding pads or contacts.
- the contact pads are conductive materials that are exposed on the upper surface of the die. In one embodiment, as shown in FIG. 1 , the contact pads 23 are aligned along a perimeter of the semiconductor die 14 .
- one or more of the contact pads 23 includes a bonding portion 24 and a probe portion 26 .
- the bonding portion 24 receives ends of wire used to electrically couple the contact pads 23 to the leads 18 .
- the probe portion 26 allows probes to measure the signals at various contact pads 23 . For example, signals may be measured at one or more contact pads 23 to ensure that the semiconductor die 14 is functioning properly.
- one or more of the contact pads 23 includes a bonding portion, but do not include a probe portion.
- contact pads 28 of the contact pads 23 that are located at the corners of the semiconductor die 14 do not include probe portions.
- the semiconductor die 14 may include any number of contact pads and may have any type of arrangement.
- the semiconductor die 14 may include 50, 75, or 100 contact pads along a single side, two sides, or three sides of the semiconductor die 14 .
- Electrodes are transmitted between the semiconductor die 14 (specifically the electronic components or devices in the semiconductor die 14 ) and the leads 18 via wires 30 .
- ends of the wires 30 are bonded to the bonding portions 24 of the contact pads 23 , and the opposite ends of the wires 30 are bonded to the leads 18 .
- FIG. 2 is an enlarged plan view of a portion of the device 10 .
- FIG. 3 is a cross-sectional view of the portion of the device 10 along the axis shown in FIG. 2 .
- two contact pads are electrically coupled to a single lead via a single wire.
- the various electrical components e.g., conductive vias, transistors, resistors, metal levels, etc.
- FIGS. 2 and 3 are not shown in FIG. 3 for simplicity purposes. It is beneficial to review FIGS. 2 and 3 together.
- the two contact pads shown in FIGS. 2 and 3 are electrically coupled to each other by a plurality of conductive layers.
- a first conductive layer 32 is formed on a first contact pad 34 of the contact pads 23
- a second conductive layer 36 is formed on a second contact pad 38 of the contact pads 23
- a third conductive layer 40 is formed on the first conductive layer 32 and the second conductive layer 36 .
- the first conductive layer 32 , the second conductive layer 36 , and the third conductive layer 40 together, electrically couple the first contact pad 34 and the second contact pad 38 to each other.
- the first contact pad 34 and the second contact pad 38 are then electrically coupled to a single lead 41 (shown in FIG. 1 ) of the leads 18 via a wire 42 of the wires 30 .
- the wire 42 has a first end that is attached to the uppermost conductive layer, which in this case is the third conductive layer 40 ; and a second end, which is opposite to the first end, that is attached to the lead 41 .
- the first conductive layer 32 , the second conductive layer 36 , and the third conductive layer 40 are stacked in a pyramid-like structure.
- the first conductive layer 32 and the second conductive layer 36 are in a first plane (i.e., coplanar with each other), and the third conductive layer 40 is in a second plane above and parallel to the first plane.
- the third conductive layer 40 is positioned between the first conductive layer 32 and the second conductive layer 36 , and directly overlies a space 44 (shown in FIG. 3 ) that separates the first conductive layer 32 and the second conductive layer 36 from each other.
- the third conductive layer 40 covers portions of the first conductive layer 32 and the second conductive layer 36 . Stated differently, the third conductive layer 40 does not cover the entire upper surfaces of the first conductive layer 32 and the second conductive layer 36 , and leaves portions of the first conductive layer 32 and the second conductive layer 36 exposed.
- the first conductive layer 32 , the second conductive layer 36 , and the third conductive layer 40 may be made of any conductive material.
- the first conductive layer 32 , the second conductive layer 36 , and the third conductive layer may be made of solder, gold, copper, conductive adhesive, aluminum, combinations thereof, or any other conductive material.
- the first conductive layer 32 , second conductive layer 36 , and third conductive layer are conductive balls.
- FIGS. 2 and 3 allow the first contact pad 34 and the second contact pad 38 to be electrically coupled to the lead 41 .
- electrical signals may be transmitted between the lead 41 and both the first contact pad 34 and the second contact pad 38 .
- the first contact pad 34 and the second contact pad 38 are electrically coupled to the lead 41 via a single wire 42 , many of the drawbacks discussed previously associated with using multiple wires to electrically couple contact pads to the same lead may be avoided.
- the first and second conductive layers 32 , 36 are illustrated as aligning with sidewalls of the contact pads 23 .
- the first and second conductive layers 32 , 36 may be abutting, such that they are electrically coupled to each other.
- the first and second conductive layers 32 , 36 are replaced with a single conductive layer.
- one or more of the first, second, and third conductive layers 32 , 36 , 40 may be bumps or more rounded, ball shaped conductive layers formed using capillary wire bonding techniques.
- the contact pads 23 and others in later figures are illustrated as being on the upper surface of the die, however, in some circumstances the contact pads will be recessed and within the die, such that only a top surface of the contact pad is exposed outside of the die.
- FIG. 4 is an enlarged cross-sectional view of a portion of the device 10 along the axis shown in FIG. 1 .
- three contact pads are electrically coupled to a single lead via a single wire.
- the various electrical components e.g., conductive vias, transistors, resistors, metal levels, etc. are not shown in FIG. 4 for simplicity purposes.
- the three contact pads shown in FIG. 4 are electrically coupled to each other by a plurality of conductive layers.
- a first conductive layer 46 is formed on a first contact pad 48 of the contact pads 23
- a second conductive layer 50 is formed on a second contact pad 52 of the contact pads 23
- a third conductive layer 54 is formed on a third contact pad 56 of the contact pads 23
- a fourth conductive layer 58 is formed on the first conductive layer 46 and the second conductive layer 50
- a fifth conductive layer 60 is formed on the second conductive layer 50 and the third conductive layer 54 .
- the first conductive layer 46 , the second conductive layer 50 , the third conductive layer 54 , the fourth conductive layer 58 , and the fifth conductive layer 60 together, electrically couple the first contact pad 48 , the second contact pad 52 , and the third contact pad 56 to each other.
- the first contact pad 48 , the second contact pad 52 , and the third contact pad 56 are then electrically coupled to a single lead 62 (shown in FIG. 1 ) of the leads 18 via a wire 64 of the wires 30 .
- the wire 64 has a first end that is attached to the fourth conductive layer 58 ; and a second end, which is opposite to the first end, that is attached to the lead 62 .
- the first conductive layer 46 , the second conductive layer 50 , the third conductive layer 54 , the fourth conductive layer 58 , and the fifth conductive layer 60 are stacked in a pyramid-like structure.
- the first conductive layer 46 , the second conductive layer 50 , and the third conductive layer 54 are in a first plane (i.e., coplanar with each other); and the fourth conductive layer 58 and the fifth conductive layer 60 are in a second plane (i.e., coplanar with each other) above and parallel to the first plane.
- the fourth conductive layer 58 is positioned between the first conductive layer 46 and the second conductive layer 50
- the fifth conductive layer 60 is positioned between the second conductive layer 50 and the third conductive layer 54 .
- first, second, and third conductive layers 46 , 50 , 54 may be formed closer together, even abutting.
- the first, second, and third conductive layers 46 , 50 , 54 are replaced with a single conductive layer.
- the fourth and fifth conductive layers 58 and 60 are replaced with a single conductive layer.
- the fourth and fifth conductive layers 58 and 60 may also be formed with larger bumps or balls, to fill or overlap any void or space between adjacent ones of the first, second, and third conductive layers.
- Different diameter bumps may also be formed for the different layers of conductive bumps to accommodate different spacing, arrangements, and function of the die.
- the contact pads 23 may be recessed or otherwise formed in the semiconductor die 14 , such that a top or exposed surface of the contact pads is coplanar with a top surface of the substrate.
- a first layer of the conductive bumps e.g., the first, second, and third conductive layers 46 , 50 , 54 discussed above
- the second layer of bumps may be formed in or partially in the space between adjacent ones of the first conductive bumps.
- FIGS. 1 to 4 Different aspects of the embodiments shown in FIGS. 1 to 4 may also be adjusted to meet various electrical requirements of the semiconductor die 14 .
- the diameters of the wires 30 are altered to adapt with electrical criteria of the semiconductor die 14 .
- wires with larger diameters e.g., 1 to 8 millimeters
- wires with smaller diameters e.g., 10 to 20 micrometers
- the number of wires used to electrically couple contact pads to a lead is adjusted to adapt with electrical criteria of the semiconductor die 14 .
- multiple wires may be used to electrically couple multiple contact pads to a single lead.
- FIG. 5 is an enlarged cross-sectional view of a portion of the device 10 along the axis shown in FIG. 1 .
- the portion shown in FIG. 5 is similar to the embodiment shown in FIG. 4 , except that two wires are used instead of a single wire.
- a first conductive layer 66 is formed on a first contact pad 68 of the contact pads 23
- a second conductive layer 70 is formed on a second contact pad 72 of the contact pads 23
- a third conductive layer 74 is formed on a third contact pad 76 of the contact pads 23
- a fourth conductive layer 78 is formed on the first conductive layer 66 and the second conductive layer 70
- a fifth conductive layer 80 is formed on the second conductive layer 70 and the third conductive layer 74 .
- the first contact pad 68 , the second contact pad 72 , and the third contact pad 76 are then electrically coupled to a single lead 82 (shown in FIG.
- the wire 84 has a first end that is attached to the fourth conductive layer 78 ; and a second end, which is opposite to the first end, that is attached to the lead 82 .
- the wire 86 has a first end that is attached to the fifth conductive layer 80 ; and a second end, which is opposite to the first end, that is attached to the lead 82 .
- the wires 84 , 86 may also be attached to two different leads.
- the wire 84 may have a first end that is attached to the fourth conductive layer 78 ; and a second end, which is opposite to the first end, that is attached to the lead 82 .
- the wire 86 may then have a first end that is attached to the fifth conductive layer 80 ; and a second end, which is opposite to the first end, that is attached to a lead that is different from the lead 82 .
- FIGS. 6 to 8 are cross-sectional views illustrating various stages of a method of electrically coupling multiple contact pads to a single lead according to an embodiment disclosed herein.
- FIGS. 6 to 8 are cross-sectional views illustrating various stages of a method of fabricating the embodiment shown in FIGS. 2 and 3 .
- the semiconductor die 14 is fabricated and attached to the upper surface 22 of the die pad 20 .
- the first conductive layer 32 is formed on the first contact pad 34 .
- the first conductive layer 32 may be formed using fabrication processes known or later developed.
- a capillary 88 is used to dispense conductive material on the first contact pad 34 to form the first conductive layer 32 .
- the second conductive layer 36 is formed on the second contact pad 38 .
- the second conductive layer 36 may be formed using fabrication processes known or later developed.
- the capillary 88 is used to dispense conductive material on the second contact pad 38 to form the second conductive layer 36 .
- the third conductive layer 40 is formed on the first conductive layer 32 and the second conductive layer 36 .
- the third conductive layer 40 may be formed using fabrication processes known or later developed.
- the capillary 88 is used to dispense conductive material on the first conductive layer 32 and the second conductive layer 36 to form the third conductive layer 40 .
- a first end of the wire 42 is attached or bonded to the third conductive layer 40 , and a second end, which is opposite to the first end, is attached to the lead 41 .
- the wire 42 may be attached using fabrication processes known or later developed.
- the capillary 88 is used to place the wire 42 on the third conductive layer 40 , while the conductive material for the third conductive layer 40 is being dispensed.
- the lead frame 12 , the semiconductor die 14 , and the wires 30 are encapsulated by a molding compound. Subsequently, a singulation process may be performed to separate the device 10 from other devices or semiconductor packages.
- one or more of the first, second, and third conductive layers 32 , 36 , 40 may be bumps or more rounded, ball shaped conductive layers. Stated differently, the first, second, and third conductive layers 32 , 36 , 40 may have irregular shapes with curved edges. This may be due, in part, to the first, second, and third conductive layers 32 , 36 , 40 and the wire 42 being formed using the capillary wire bonding techniques described with respect to FIGS. 6 to 8 .
- FIG. 9 is a cross-sectional view of the portion of the device of FIG. 1 along the axis shown in FIG. 2 according to another embodiment disclosed herein. As shown in FIG.
- the first, second, and third conductive layers 32 , 36 , 40 are not rectangular in shape as shown, for example, in FIG. 3 . Instead, each of the first, second, and third conductive layers 32 , 36 , 40 have irregular, curved side surfaces and vary in width.
- the various embodiments provide a semiconductor die with multiple contact pads electrically coupled to a single lead via a single wire, and methods for fabricating the same.
- a single wire to electrically couple multiple contact pads electrically coupled to a lead
- many of the drawbacks associated with using multiple wires to electrically couple contact pads to the same lead may be avoided.
- specialized or custom lead frames are unnecessary as most, if not all, lead frames include leads having sufficient surface area to accommodate a single wire.
- wires are less likely to inadvertently contact each other and short each other.
- wires that are already attached to a lead are less likely to become damaged due to incidental contact from a capillary being used to attach another wire to the same lead, as wires are spaced further apart from each other.
- a lead frame is often temporarily attached to a substrate for support using, for example, adhesive tape.
- adhesive tape When multiple wires are attached to the same lead, the pressure from repeatedly attaching the wires to the lead may cause the adhesive tape to overly stick to the lead, itself. Consequently, when the lead frame is eventually removed from the adhesive tape and the substrate, a residue of the adhesive will sometimes remain on the lead. This problem is avoided since a single wire is attached to a single lead, and, thus, less pressure will be applied to the same lead.
Abstract
Description
- The present disclosure is directed to electrically coupling a semiconductor die to a lead frame.
- A semiconductor package typically includes a lead frame and a semiconductor die. The lead frame includes a die pad to support the semiconductor die, and a plurality of leads to carry electrical signals between the semiconductor die and an external component, such as a printed circuit board.
- The semiconductor die is often electrically coupled to the leads of the lead frame by a wire bonding process. Generally, a wire bonding process includes coupling a single wire between a single bonding pad on the semiconductor die and a single lead.
- The present disclosure is directed to a semiconductor die with multiple contact pads electrically coupled to a single lead via a single wire, and methods for fabricating the same.
- In one or more embodiments, multiple contact pads are electrically coupled to each other via a plurality of conductive layers stacked on top of each other. For example, the conductive layers may be stacked in a pyramid-like structure in which a first conductive layer is formed on a first contact pad, a second conductive layer is formed on a second contact pad, and a third conductive layer is formed on the first conductive layer and the second conductive layer. The uppermost conductive layer is then electrically coupled to a single lead via a single wire. For example, the wire has a first end that is attached to the third conductive layer; and a second end that is attached to the lead.
- By using a single wire to electrically couple multiple contact pads to the same lead, many of the drawbacks associated with using multiple wires to electrically couple contact pads to a single lead may be avoided. For example, specialized or custom lead frames are unnecessary as most, if not all, lead frames include leads having sufficient surface area to accommodate a single wire. In addition, because the total amount of wires used to electrically couple contact pads to leads are decreased, the chance of wires inadvertently contacting each other and shorting each other decreases. Further, wires that are already attached to a lead are less likely to become damaged due to incidental contact from a capillary being used to attach another wire to the same lead as wires are spaced further apart from each other.
- In the drawings, identical reference numbers identify similar features or elements. The size and relative positions of features in the drawings are not necessarily drawn to scale.
-
FIG. 1 is a plan view of a device according to an embodiment disclosed herein. -
FIG. 2 is an enlarged plan view of a portion of the device ofFIG. 1 . -
FIG. 3 is a cross-sectional view of the portion of the device ofFIG. 1 along the axis shown inFIG. 2 . -
FIG. 4 is an enlarged cross-sectional view of a portion of the device ofFIG. 1 along the axis shown inFIG. 1 . -
FIG. 5 is an enlarged cross-sectional view of a portion of the device ofFIG. 1 along the axis shown inFIG. 1 . -
FIGS. 6 to 8 are cross-sectional views illustrating various stages of a method of electrically coupling multiple contact pads to a single lead according to an embodiment disclosed herein. -
FIG. 9 is a cross-sectional view of the portion of the device ofFIG. 1 along the axis shown inFIG. 2 according to another embodiment disclosed herein. - In the following description, certain specific details are set forth in order to provide a thorough understanding of various aspects of the disclosed subject matter. However, the disclosed subject matter may be practiced without these specific details. In some instances, well-known structures and methods of manufacturing and packaging electronic devices have not been described in detail to avoid obscuring the descriptions of other aspects of the present disclosure.
- Unless the context requires otherwise, throughout the specification and claims that follow, the word “comprise” and variations thereof, such as “comprises” and “comprising,” are to be construed in an open, inclusive sense, that is, as “including, but not limited to.”
- Reference throughout the specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, the appearance of the phrases “in one embodiment” or “in an embodiment” in various places throughout the specification are not necessarily all referring to the same aspect. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more aspects of the present disclosure.
- Reference throughout the specification to integrated circuits is generally intended to include integrated circuit components built on semiconducting or glass substrates, whether or not the components are coupled together into a circuit or able to be interconnected. Throughout the specification, the term “layer” is used in its broadest sense to include a thin film, a cap, or the like, and one layer may be composed of multiple sub-layers.
- As previously discussed, a wire bonding process is often used to electrically couple a semiconductor die to a plurality of leads of a lead frame. Generally, a wire bonding process includes coupling wires between bonding pads on the semiconductor die and the leads. In a standard wire bonding process, the bonding pads are electrically coupled to the leads in one-to-one correspondence. That is, each bonding pad is electrically coupled to exactly one lead via a single wire. However, as semiconductor dies are increasingly including integrated circuits with greater complexity, it is desirable to electrically couple multiple bonding pads to the same lead such that multiple electrical signals may be carried to the same lead. This is beneficial as this allows multiple inputs/output signals of a semiconductor die to be in communication with a single lead.
- One possible solution to electrically couple multiple bonding pads to the same lead is to use multiple wires. Namely, instead of electrically coupling bonding pads and leads in one-to-one correspondence as previously discussed, multiple bonding pads may be electrically coupled to the same lead via multiple wires. For example, three bonding pads may be electrically coupled to a single lead via three wires by coupling a wire between each of the three bonding pads and the single lead. This approach, however, has several drawbacks. For example, the leads of a lead frame often have limited surface area in which a wire may be attached. Many leads have sufficient surface area to accommodate a single wire. Thus, attaching multiple wires to a single lead may not be possible in some circumstances. Another drawback is that increasing the number of wires attached to a lead increases the chance of wires inadvertently contacting each other. That is, due to the wires being close in proximity to each other, the wires may accidently become shorted together. In addition, because of the tight clearance between wires, wires that are already attached to a lead may become damaged due to incidental contact from a capillary being used to attach another wire to the same lead. As another example, during a packaging process of the semiconductor die, the lead frame is often temporarily attached to a substrate for support using, for example, adhesive tape. When multiple wires are attached to the same lead, the pressure from repeatedly attaching the wires to the lead may cause the adhesive tape to overly stick to the lead, itself. Consequently, when the lead frame is eventually removed from the adhesive tape and the substrate, a residue of the adhesive will sometimes remain on the lead.
- The present disclosure is directed to a semiconductor die with multiple contact pads electrically coupled to a single lead, and methods for fabricating the same. In some embodiments, the multiple contact pads are coupled to the single lead with a single wire.
-
FIG. 1 is a plan view of adevice 10 according to an embodiment disclosed herein. Thedevice 10 includes alead frame 12 and a semiconductor die 14. Thelead frame 12 provides a platform for thesemiconductor die 14, and is used to carry electrical signals between thesemiconductor die 14 and an external component, such as a printed circuit board. Thelead frame 12 includes supports 16, a plurality ofleads 18, and adie pad 20. A variety of shapes and sizes of the lead frame are envisioned, such as frames with different sizes of die pads or openings in the die pads. - The
supports 16 are coupled to and extend from corners of thedie pad 20. In some embodiments, thesupports 16 are used to mount thelead frame 12 to a substrate, such as a printed circuit board. In other embodiments, the supports, arms, or extensions, provide structural support for the die pads within a package that includes molding compound around the die and the lead frame. - The leads 18 are positioned on each of the four sides of the
die pad 20. The leads 18 carry electrical signals between the semiconductor die 14 (e.g., an integrated circuit within the semiconductor die 14) and an external source, such as a printed circuit board. As will be discussed in further detail below, theleads 18 are electrically coupled to the semiconductor die 14 via wires bonded between theleads 18 and the semiconductor die 14. - The
lead frame 12 may include any number of leads and may have any type of arrangement. For example, thelead frame 12 may include 10, 20, or 30 leads on a single side, two sides, or three sides of thedie pad 20. - The
die pad 20 is physically coupled to thesupports 16 and positioned between the leads 18. Thedie pad 20 provides a platform for the semiconductor die 14. In one embodiment, anupper surface 22 of thedie pad 20 is a continuous, planar surface. In one embodiment, thesupports 16 and thedie pad 20 are a single, contiguous piece. - In one embodiment, the
lead frame 12, including thesupports 16, theleads 18, and thedie pad 20, is made of a conductive material. For example, thelead frame 12 may be made of steel, aluminum, copper, gold, combinations thereof, or another type of conductive material. - The
lead frame 12 may be fabricated using a variety of fabrication techniques. For example, in one embodiment, thelead frame 12 is formed by pattern deposition, a combination of blanket deposition and etching, or stamping a continuous sheet of material. - The semiconductor die 14 is positioned on the
upper surface 22 of thedie pad 20. In one embodiment, the semiconductor die 14 is attached to the die pad using adhesive material, such as adhesive tape or a glue. The semiconductor die 14 may include a variety of electronic components or devices. For example, the semiconductor die 14 may be a controller or processor, an application specific integrated circuit (ASIC), or any other type of integrated circuit. The semiconductor die 14 may be fabricated using fabrication processes known or later developed. - The semiconductor die 14 includes
contact pads 23. Thecontact pads 23 are positioned on anupper surface 25 of the semiconductor die 14, and are electrically coupled to integrated circuits, including transistors, active and passive electronic components in the semiconductor die 14. Thecontact pads 23 are often referred to as bonding pads or contacts. The contact pads are conductive materials that are exposed on the upper surface of the die. In one embodiment, as shown inFIG. 1 , thecontact pads 23 are aligned along a perimeter of the semiconductor die 14. - In one embodiment, one or more of the
contact pads 23 includes abonding portion 24 and aprobe portion 26. As will be discussed in further detail below, thebonding portion 24 receives ends of wire used to electrically couple thecontact pads 23 to the leads 18. Theprobe portion 26 allows probes to measure the signals atvarious contact pads 23. For example, signals may be measured at one ormore contact pads 23 to ensure that the semiconductor die 14 is functioning properly. - In one embodiment, one or more of the
contact pads 23 includes a bonding portion, but do not include a probe portion. For example, as shown inFIG. 1 ,contact pads 28 of thecontact pads 23 that are located at the corners of the semiconductor die 14 do not include probe portions. - The semiconductor die 14 may include any number of contact pads and may have any type of arrangement. For example, the semiconductor die 14 may include 50, 75, or 100 contact pads along a single side, two sides, or three sides of the semiconductor die 14.
- Electrical signals are transmitted between the semiconductor die 14 (specifically the electronic components or devices in the semiconductor die 14) and the
leads 18 viawires 30. In particular, ends of thewires 30 are bonded to thebonding portions 24 of thecontact pads 23, and the opposite ends of thewires 30 are bonded to the leads 18. - Multiple contact pads of the
contact pads 23 may be electrically coupled to a single lead of the leads 18.FIG. 2 is an enlarged plan view of a portion of thedevice 10.FIG. 3 is a cross-sectional view of the portion of thedevice 10 along the axis shown inFIG. 2 . In the embodiment shown inFIGS. 2 and 3, two contact pads are electrically coupled to a single lead via a single wire. It is noted that the various electrical components (e.g., conductive vias, transistors, resistors, metal levels, etc.) are not shown inFIG. 3 for simplicity purposes. It is beneficial to reviewFIGS. 2 and 3 together. - The two contact pads shown in
FIGS. 2 and 3 are electrically coupled to each other by a plurality of conductive layers. A firstconductive layer 32 is formed on afirst contact pad 34 of thecontact pads 23, a secondconductive layer 36 is formed on asecond contact pad 38 of thecontact pads 23, and a thirdconductive layer 40 is formed on the firstconductive layer 32 and the secondconductive layer 36. The firstconductive layer 32, the secondconductive layer 36, and the thirdconductive layer 40, together, electrically couple thefirst contact pad 34 and thesecond contact pad 38 to each other. - The
first contact pad 34 and thesecond contact pad 38 are then electrically coupled to a single lead 41 (shown inFIG. 1 ) of theleads 18 via awire 42 of thewires 30. Thewire 42 has a first end that is attached to the uppermost conductive layer, which in this case is the thirdconductive layer 40; and a second end, which is opposite to the first end, that is attached to thelead 41. - In one embodiment, the first
conductive layer 32, the secondconductive layer 36, and the thirdconductive layer 40 are stacked in a pyramid-like structure. For example, in the embodiment shown inFIG. 3 , the firstconductive layer 32 and the secondconductive layer 36 are in a first plane (i.e., coplanar with each other), and the thirdconductive layer 40 is in a second plane above and parallel to the first plane. The thirdconductive layer 40 is positioned between the firstconductive layer 32 and the secondconductive layer 36, and directly overlies a space 44 (shown inFIG. 3 ) that separates the firstconductive layer 32 and the secondconductive layer 36 from each other. - In one embodiment, as shown in
FIGS. 2 and 3 , the thirdconductive layer 40 covers portions of the firstconductive layer 32 and the secondconductive layer 36. Stated differently, the thirdconductive layer 40 does not cover the entire upper surfaces of the firstconductive layer 32 and the secondconductive layer 36, and leaves portions of the firstconductive layer 32 and the secondconductive layer 36 exposed. - The first
conductive layer 32, the secondconductive layer 36, and the thirdconductive layer 40 may be made of any conductive material. For example, the firstconductive layer 32, the secondconductive layer 36, and the third conductive layer may be made of solder, gold, copper, conductive adhesive, aluminum, combinations thereof, or any other conductive material. In one embodiment, the firstconductive layer 32, secondconductive layer 36, and third conductive layer are conductive balls. - The configuration shown in
FIGS. 2 and 3 allows thefirst contact pad 34 and thesecond contact pad 38 to be electrically coupled to thelead 41. Thus, electrical signals may be transmitted between the lead 41 and both thefirst contact pad 34 and thesecond contact pad 38. Further, as thefirst contact pad 34 and thesecond contact pad 38 are electrically coupled to thelead 41 via asingle wire 42, many of the drawbacks discussed previously associated with using multiple wires to electrically couple contact pads to the same lead may be avoided. - The first and second
conductive layers contact pads 23. In some embodiments, the first and secondconductive layers conductive layers - In some embodiments, one or more of the first, second, and third
conductive layers - The
contact pads 23 and others in later figures are illustrated as being on the upper surface of the die, however, in some circumstances the contact pads will be recessed and within the die, such that only a top surface of the contact pad is exposed outside of the die. - Although two contact pads are electrically coupled to each other in the embodiment shown in
FIGS. 2 and 3 , any number of contact pads may be electrically coupled to each other using a similar technique. For example,FIG. 4 is an enlarged cross-sectional view of a portion of thedevice 10 along the axis shown inFIG. 1 . In the portion shown inFIG. 4 , three contact pads are electrically coupled to a single lead via a single wire. It is noted that the various electrical components (e.g., conductive vias, transistors, resistors, metal levels, etc.) are not shown inFIG. 4 for simplicity purposes. - Similar to the embodiment shown in
FIGS. 2 and 3 , the three contact pads shown inFIG. 4 are electrically coupled to each other by a plurality of conductive layers. A firstconductive layer 46 is formed on afirst contact pad 48 of thecontact pads 23, a secondconductive layer 50 is formed on asecond contact pad 52 of thecontact pads 23, a thirdconductive layer 54 is formed on athird contact pad 56 of thecontact pads 23, a fourthconductive layer 58 is formed on the firstconductive layer 46 and the secondconductive layer 50, and a fifthconductive layer 60 is formed on the secondconductive layer 50 and the thirdconductive layer 54. The firstconductive layer 46, the secondconductive layer 50, the thirdconductive layer 54, the fourthconductive layer 58, and the fifthconductive layer 60, together, electrically couple thefirst contact pad 48, thesecond contact pad 52, and thethird contact pad 56 to each other. - The
first contact pad 48, thesecond contact pad 52, and thethird contact pad 56 are then electrically coupled to a single lead 62 (shown inFIG. 1 ) of theleads 18 via awire 64 of thewires 30. Thewire 64 has a first end that is attached to the fourthconductive layer 58; and a second end, which is opposite to the first end, that is attached to thelead 62. - In one embodiment, the first
conductive layer 46, the secondconductive layer 50, the thirdconductive layer 54, the fourthconductive layer 58, and the fifthconductive layer 60 are stacked in a pyramid-like structure. For example, in the embodiment shown inFIG. 4 , the firstconductive layer 46, the secondconductive layer 50, and the thirdconductive layer 54 are in a first plane (i.e., coplanar with each other); and the fourthconductive layer 58 and the fifthconductive layer 60 are in a second plane (i.e., coplanar with each other) above and parallel to the first plane. The fourthconductive layer 58 is positioned between the firstconductive layer 46 and the secondconductive layer 50, and the fifthconductive layer 60 is positioned between the secondconductive layer 50 and the thirdconductive layer 54. - Different conductive layer shapes may also be used to implement the stacked contact pad arrangement. For example, the first, second, and third
conductive layers conductive layers conductive layers conductive layers - Different diameter bumps may also be formed for the different layers of conductive bumps to accommodate different spacing, arrangements, and function of the die.
- As mentioned above, the
contact pads 23 may be recessed or otherwise formed in the semiconductor die 14, such that a top or exposed surface of the contact pads is coplanar with a top surface of the substrate. In such embodiments, a first layer of the conductive bumps (e.g., the first, second, and thirdconductive layers - In situations where the first conductive bumps are formed where there is a space between adjacent bumps, the second layer of bumps may be formed in or partially in the space between adjacent ones of the first conductive bumps.
- Different aspects of the embodiments shown in
FIGS. 1 to 4 may also be adjusted to meet various electrical requirements of the semiconductor die 14. - In one embodiment, the diameters of the
wires 30 are altered to adapt with electrical criteria of the semiconductor die 14. For example, wires with larger diameters (e.g., 1 to 8 millimeters) may be used for cases in which wires with high resistances are desirable. Similarly, wires with smaller diameters (e.g., 10 to 20 micrometers) may be used for cases in which wires with low resistances are desirable. - In one embodiment, the number of wires used to electrically couple contact pads to a lead is adjusted to adapt with electrical criteria of the semiconductor die 14. For example, instead of using a single wire (e.g., the embodiments shown in
FIGS. 2 to 4 ), multiple wires may be used to electrically couple multiple contact pads to a single lead. For instance,FIG. 5 is an enlarged cross-sectional view of a portion of thedevice 10 along the axis shown inFIG. 1 . The portion shown inFIG. 5 is similar to the embodiment shown inFIG. 4 , except that two wires are used instead of a single wire. Namely, a firstconductive layer 66 is formed on afirst contact pad 68 of thecontact pads 23, a secondconductive layer 70 is formed on asecond contact pad 72 of thecontact pads 23, a thirdconductive layer 74 is formed on athird contact pad 76 of thecontact pads 23, a fourthconductive layer 78 is formed on the firstconductive layer 66 and the secondconductive layer 70, and a fifthconductive layer 80 is formed on the secondconductive layer 70 and the thirdconductive layer 74. Thefirst contact pad 68, thesecond contact pad 72, and thethird contact pad 76 are then electrically coupled to a single lead 82 (shown inFIG. 1 ) of theleads 18 viawires wires 30. Thewire 84 has a first end that is attached to the fourthconductive layer 78; and a second end, which is opposite to the first end, that is attached to thelead 82. Thewire 86 has a first end that is attached to the fifthconductive layer 80; and a second end, which is opposite to the first end, that is attached to thelead 82. - It is noted that the
wires wire 84 may have a first end that is attached to the fourthconductive layer 78; and a second end, which is opposite to the first end, that is attached to thelead 82. Thewire 86 may then have a first end that is attached to the fifthconductive layer 80; and a second end, which is opposite to the first end, that is attached to a lead that is different from thelead 82. -
FIGS. 6 to 8 are cross-sectional views illustrating various stages of a method of electrically coupling multiple contact pads to a single lead according to an embodiment disclosed herein. In particular,FIGS. 6 to 8 are cross-sectional views illustrating various stages of a method of fabricating the embodiment shown inFIGS. 2 and 3 . - Before the various conductive layers are formed, the semiconductor die 14 is fabricated and attached to the
upper surface 22 of thedie pad 20. - Subsequently, in
FIG. 6 , the firstconductive layer 32 is formed on thefirst contact pad 34. The firstconductive layer 32 may be formed using fabrication processes known or later developed. For example, in one embodiment, a capillary 88 is used to dispense conductive material on thefirst contact pad 34 to form the firstconductive layer 32. - In
FIG. 7 , the secondconductive layer 36 is formed on thesecond contact pad 38. The secondconductive layer 36 may be formed using fabrication processes known or later developed. For example, in one embodiment, the capillary 88 is used to dispense conductive material on thesecond contact pad 38 to form the secondconductive layer 36. - Subsequent to the first
conductive layer 32 and the secondconductive layer 36 being formed, the thirdconductive layer 40 is formed on the firstconductive layer 32 and the secondconductive layer 36. The thirdconductive layer 40 may be formed using fabrication processes known or later developed. For example, in one embodiment, the capillary 88 is used to dispense conductive material on the firstconductive layer 32 and the secondconductive layer 36 to form the thirdconductive layer 40. - In
FIG. 8 , a first end of thewire 42 is attached or bonded to the thirdconductive layer 40, and a second end, which is opposite to the first end, is attached to thelead 41. Thewire 42 may be attached using fabrication processes known or later developed. For example, in one embodiment, the capillary 88 is used to place thewire 42 on the thirdconductive layer 40, while the conductive material for the thirdconductive layer 40 is being dispensed. - After the
contact pads 28 have been electrically coupled to theleads 18, thelead frame 12, the semiconductor die 14, and thewires 30 are encapsulated by a molding compound. Subsequently, a singulation process may be performed to separate thedevice 10 from other devices or semiconductor packages. - As previously discussed, in some embodiments, one or more of the first, second, and third
conductive layers conductive layers conductive layers wire 42 being formed using the capillary wire bonding techniques described with respect toFIGS. 6 to 8 . For example,FIG. 9 is a cross-sectional view of the portion of the device ofFIG. 1 along the axis shown inFIG. 2 according to another embodiment disclosed herein. As shown inFIG. 9 , the first, second, and thirdconductive layers FIG. 3 . Instead, each of the first, second, and thirdconductive layers - The various embodiments provide a semiconductor die with multiple contact pads electrically coupled to a single lead via a single wire, and methods for fabricating the same. By using a single wire to electrically couple multiple contact pads electrically coupled to a lead, many of the drawbacks associated with using multiple wires to electrically couple contact pads to the same lead may be avoided. For example, specialized or custom lead frames are unnecessary as most, if not all, lead frames include leads having sufficient surface area to accommodate a single wire. In addition, because the total amount of wires used to electrically couple contact pads to leads are decreased, wires are less likely to inadvertently contact each other and short each other. Further, wires that are already attached to a lead are less likely to become damaged due to incidental contact from a capillary being used to attach another wire to the same lead, as wires are spaced further apart from each other. As another example, as previously discussed, during a packaging process of a semiconductor die, a lead frame is often temporarily attached to a substrate for support using, for example, adhesive tape. When multiple wires are attached to the same lead, the pressure from repeatedly attaching the wires to the lead may cause the adhesive tape to overly stick to the lead, itself. Consequently, when the lead frame is eventually removed from the adhesive tape and the substrate, a residue of the adhesive will sometimes remain on the lead. This problem is avoided since a single wire is attached to a single lead, and, thus, less pressure will be applied to the same lead.
- The various embodiments described above can be combined to provide further embodiments. These and other changes can be made to the embodiments in light of the above-detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and the claims, but should be construed to include all possible embodiments along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by the disclosure.
Claims (18)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US16/664,568 US11152326B2 (en) | 2018-10-30 | 2019-10-25 | Semiconductor die with multiple contact pads electrically coupled to a lead of a lead frame |
US17/479,988 US11688715B2 (en) | 2018-10-30 | 2021-09-20 | Semiconductor die with multiple contact pads electrically coupled to a lead of a lead frame |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201862752676P | 2018-10-30 | 2018-10-30 | |
US16/664,568 US11152326B2 (en) | 2018-10-30 | 2019-10-25 | Semiconductor die with multiple contact pads electrically coupled to a lead of a lead frame |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US17/479,988 Continuation US11688715B2 (en) | 2018-10-30 | 2021-09-20 | Semiconductor die with multiple contact pads electrically coupled to a lead of a lead frame |
Publications (2)
Publication Number | Publication Date |
---|---|
US20200135686A1 true US20200135686A1 (en) | 2020-04-30 |
US11152326B2 US11152326B2 (en) | 2021-10-19 |
Family
ID=70325499
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US16/664,568 Active US11152326B2 (en) | 2018-10-30 | 2019-10-25 | Semiconductor die with multiple contact pads electrically coupled to a lead of a lead frame |
US17/479,988 Active US11688715B2 (en) | 2018-10-30 | 2021-09-20 | Semiconductor die with multiple contact pads electrically coupled to a lead of a lead frame |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US17/479,988 Active US11688715B2 (en) | 2018-10-30 | 2021-09-20 | Semiconductor die with multiple contact pads electrically coupled to a lead of a lead frame |
Country Status (1)
Country | Link |
---|---|
US (2) | US11152326B2 (en) |
Family Cites Families (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5976964A (en) * | 1997-04-22 | 1999-11-02 | Micron Technology, Inc. | Method of improving interconnect of semiconductor device by utilizing a flattened ball bond |
US6277672B1 (en) | 1999-09-03 | 2001-08-21 | Thin Film Module, Inc. | BGA package for high density cavity-up wire bond device connections using a metal panel, thin film and build up multilayer technology |
US6564449B1 (en) | 2000-11-07 | 2003-05-20 | Advanced Semiconductor Engineering, Inc. | Method of making wire connection in semiconductor device |
JP3649169B2 (en) * | 2001-08-08 | 2005-05-18 | 松下電器産業株式会社 | Semiconductor device |
JP3741274B2 (en) * | 2002-02-14 | 2006-02-01 | ローム株式会社 | Semiconductor device |
US7157790B2 (en) | 2002-07-31 | 2007-01-02 | Microchip Technology Inc. | Single die stitch bonding |
US7064433B2 (en) * | 2004-03-01 | 2006-06-20 | Asm Technology Singapore Pte Ltd | Multiple-ball wire bonds |
DE102005034485B4 (en) * | 2005-07-20 | 2013-08-29 | Infineon Technologies Ag | Connecting element for a semiconductor device and method for producing a semiconductor power device |
US20080237887A1 (en) * | 2007-03-29 | 2008-10-02 | Hem Takiar | Semiconductor die stack having heightened contact for wire bond |
US20080242076A1 (en) * | 2007-03-29 | 2008-10-02 | Hem Takiar | Method of making semiconductor die stack having heightened contact for wire bond |
WO2008139273A1 (en) | 2007-05-10 | 2008-11-20 | Freescale Semiconductor, Inc. | Power lead-on-chip ball grid array package |
US7960845B2 (en) * | 2008-01-03 | 2011-06-14 | Linear Technology Corporation | Flexible contactless wire bonding structure and methodology for semiconductor device |
CN101615587A (en) | 2008-06-27 | 2009-12-30 | 桑迪士克股份有限公司 | Conducting wire stack type suture in the semiconductor device engages |
US8409978B2 (en) * | 2010-06-24 | 2013-04-02 | Stats Chippac, Ltd. | Semiconductor device and method of forming vertically offset bond on trace interconnect structure on leadframe |
US8836101B2 (en) * | 2010-09-24 | 2014-09-16 | Infineon Technologies Ag | Multi-chip semiconductor packages and assembly thereof |
MY152355A (en) * | 2011-04-11 | 2014-09-15 | Carsem M Sdn Bhd | Short and low loop wire bonding |
US8810012B2 (en) * | 2011-11-15 | 2014-08-19 | Xintec Inc. | Chip package, method for forming the same, and package wafer |
US20150303169A1 (en) | 2014-04-17 | 2015-10-22 | Tu-Anh N. Tran | Systems and methods for multiple ball bond structures |
US10431532B2 (en) * | 2014-05-12 | 2019-10-01 | Rohm Co., Ltd. | Semiconductor device with notched main lead |
US9358567B2 (en) | 2014-06-20 | 2016-06-07 | Stmicroelectronics, Inc. | Microfluidic system with single drive signal for multiple nozzles |
US20160035652A1 (en) * | 2014-08-01 | 2016-02-04 | Texas Instruments Incorporated | Integrated Circuit Device With Wire Bond Connections |
US9761554B2 (en) | 2015-05-07 | 2017-09-12 | Invensas Corporation | Ball bonding metal wire bond wires to metal pads |
US10026695B2 (en) * | 2015-05-13 | 2018-07-17 | Rohm Co., Ltd. | Semiconductor device and method for manufacturing the same |
WO2018004695A1 (en) | 2016-07-01 | 2018-01-04 | Intel Corporation | Electronic device packages and methods for maximizing electrical current to dies and minimizing bond finger size |
US20180019194A1 (en) * | 2016-07-14 | 2018-01-18 | Semtech Corporation | Low Parasitic Surface Mount Circuit Over Wirebond IC |
US10593612B2 (en) * | 2018-03-19 | 2020-03-17 | Stmicroelectronics S.R.L. | SMDs integration on QFN by 3D stacked solution |
US10692801B2 (en) * | 2018-05-31 | 2020-06-23 | Infineon Technologies Austria Ag | Bond pad and clip configuration for packaged semiconductor device |
US10861775B2 (en) * | 2018-09-28 | 2020-12-08 | Semiconductor Components Industries, Llc | Connecting clip design for pressure sintering |
-
2019
- 2019-10-25 US US16/664,568 patent/US11152326B2/en active Active
-
2021
- 2021-09-20 US US17/479,988 patent/US11688715B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US11688715B2 (en) | 2023-06-27 |
US11152326B2 (en) | 2021-10-19 |
US20220005782A1 (en) | 2022-01-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6300679B1 (en) | Flexible substrate for packaging a semiconductor component | |
US8373277B2 (en) | Stacked die in die BGA package | |
US20080182398A1 (en) | Varied Solder Mask Opening Diameters Within a Ball Grid Array Substrate | |
US7679178B2 (en) | Semiconductor package on which a semiconductor device can be stacked and fabrication method thereof | |
US11664239B2 (en) | Lead frame for improving adhesive fillets on semiconductor die corners | |
US8564110B2 (en) | Power device with bottom source electrode | |
US6916682B2 (en) | Semiconductor package device for use with multiple integrated circuits in a stacked configuration and method of formation and testing | |
JP2005252078A (en) | Semiconductor device and its manufacturing method | |
US7385298B2 (en) | Reduced-dimension microelectronic component assemblies with wire bonds and methods of making same | |
US6380629B1 (en) | Wafer level stack package and method of fabricating the same | |
US9613894B2 (en) | Electronic package | |
KR100370529B1 (en) | Semiconductor device | |
US11929259B2 (en) | Method for manufacturing leadless semiconductor package with wettable flanks | |
US9391005B2 (en) | Method for packaging a power device with bottom source electrode | |
US11688715B2 (en) | Semiconductor die with multiple contact pads electrically coupled to a lead of a lead frame | |
US11309237B2 (en) | Semiconductor package with wettable slot structures | |
JP2682200B2 (en) | Semiconductor device | |
TWI818719B (en) | Carrier structure | |
TWI401777B (en) | Window-type semiconductor stacked structure and the forming method thereof | |
KR101690859B1 (en) | Manufacturing method of a semiconductor substrate and the package | |
TW202412195A (en) | Carrier structure | |
TWI502657B (en) | Method of manufacturing semiconductor package | |
JP2006040983A (en) | Method of manufacturing semiconductor device | |
KR100379086B1 (en) | Semiconductor Package Manufacturing Method | |
TW201810545A (en) | Electronic package and the manufacture thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
FEPP | Fee payment procedure |
Free format text: ENTITY STATUS SET TO UNDISCOUNTED (ORIGINAL EVENT CODE: BIG.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
AS | Assignment |
Owner name: STMICROELECTRONICS, INC., PHILIPPINES Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:RODRIGUEZ, RENNIER;SEGUIDO, RAMMIL;NARVADEZ, RAYMOND ALBERT;AND OTHERS;REEL/FRAME:054507/0949 Effective date: 20181121 |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: NON FINAL ACTION MAILED |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: RESPONSE TO NON-FINAL OFFICE ACTION ENTERED AND FORWARDED TO EXAMINER |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: NOTICE OF ALLOWANCE MAILED -- APPLICATION RECEIVED IN OFFICE OF PUBLICATIONS |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: AWAITING TC RESP., ISSUE FEE NOT PAID |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: NOTICE OF ALLOWANCE MAILED -- APPLICATION RECEIVED IN OFFICE OF PUBLICATIONS |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: PUBLICATIONS -- ISSUE FEE PAYMENT VERIFIED |
|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |