US20190189494A1 - Package structure and manufacturing method thereof - Google Patents
Package structure and manufacturing method thereof Download PDFInfo
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- US20190189494A1 US20190189494A1 US15/847,936 US201715847936A US2019189494A1 US 20190189494 A1 US20190189494 A1 US 20190189494A1 US 201715847936 A US201715847936 A US 201715847936A US 2019189494 A1 US2019189494 A1 US 2019189494A1
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- package
- singulated
- encapsulation
- integrated circuit
- manufacturing
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Definitions
- the present invention relates to a manufacturing method thereof, and more particularly, to a manufacturing method of package structure.
- wafer level or panel level package is to be understood as meaning that the entire packaging and all the interconnections on the wafer as well as other processing steps such as wire bonding, die bonding or molding, are carried out before the singulation by dicing into a plurality of semiconductor dies.
- it requires large-scale equipment to perform such processes in wafer or panel level format.
- it requires very heavy capital investment for such large-scale equipment, while such capital investment does not provide cost benefits. Therefore, how to accomplish the processing steps using existing equipment to minimize equipment costs and overall manufacturing costs has become a challenge to researchers in the field.
- the invention provides a manufacturing method of a package structure, which increases the production and provides processing stability.
- the invention provides a manufacturing method of a package structure.
- the method includes the following steps.
- a package panel is provided.
- the package panel includes a first encapsulation, a plurality of first integrated circuit components and a plurality of redistribution circuit patterns electrically connected to the first integrated circuit components, the first integrated circuit components are encapsulated by the first encapsulation, and the redistribution circuit patterns are distributed on the first encapsulation and the first integrated circuit components.
- the first encapsulation of the package panel is cut to form a plurality of singulated package strips.
- Each of the singulated package strips includes a first singulated encapsulation, one of the redistribution circuit patterns and at least one of the first integrated circuit components encapsulated by the first singulated encapsulation.
- One of the singulated package strips is attached onto an attachment region of a substrate.
- the substrate includes at least one tooling hole distributed outside of the attachment region.
- a package process is performed over the singulated package strip attached onto the substrate with the substrate affixed through the at least one tooling hole to form the package structure.
- the invention provides a manufacturing method of a package structure.
- the method includes the following steps.
- a package panel is provided in a first process chamber.
- the package panel includes a first encapsulation, a plurality of first integrated circuit components and a plurality of redistribution circuit patterns electrically connected to the first integrated circuit components, the first integrated circuit components are encapsulated by the first encapsulation, and the redistribution circuit patterns are distributed on the first encapsulation and the first integrated circuit components.
- the first encapsulation of the package panel is cut to form a plurality of singulated package strips in the first process chamber.
- Each of the singulated package strips includes a first singulated encapsulation, one of the redistribution circuit patterns and at least one of the first integrated circuit components encapsulated by the first singulated encapsulation.
- the singulated package strips are transferred to a second process chamber.
- At least one holding fixture is configured in the second process chamber.
- One of the singulated package strips is attached onto an attachment region of a substrate in the second process chamber.
- the substrate includes at least one tooling hole distributed outside of the attachment region.
- the substrate is affixed by the at least one holding fixture in the second process chamber.
- the at least one holding fixture corresponding to the at least one tooling hole of the substrate.
- a package process is performed over the singulated package strip attached onto the substrate to form the package structure in the second process chamber.
- the package panel is cut to form the singulated package strips before the package process so as to avoid using large-scale equipment to perform such package process.
- existing equipment may be leveraged with changes and compatible to the manufacturing process flow and also it maintains a stable manufacturing process which can be cost optimized according to the applications being implemented in the package.
- FIG. 1 is a schematic cross-sectional view illustrating a manufacturing method of a package structure according to an embodiment of the invention.
- FIG. 2A is a schematic top view illustrating a manufacturing method of a package structure according to an embodiment of the invention.
- FIG. 2B is a schematic cross-sectional view illustrating along the line A-A of the manufacturing method of the package structure in FIG. 2A .
- FIG. 3A is schematic top view illustrating a manufacturing method of a package structure according to an embodiment of the invention.
- FIG. 3B is a schematic cross-sectional view along the line A-A of the manufacturing method of the package structure in FIG. 3A .
- FIG. 3C to FIG. 3D are schematic cross-sectional views illustrating a manufacturing method of a package structure according to an embodiment of the invention.
- FIG. 1 is a schematic cross-sectional view illustrating a manufacturing method of a package structure according to an embodiment of the invention.
- FIG. 1 shows a portion of a package at an intermediate stage of manufacturing process.
- a plurality of redistribution circuit patterns 120 is formed over a carrier 110 a .
- the carrier 110 a is, for example, a glass substrate or other suitable substrate material, which is not limited thereto as long as the material is able to withstand the subsequent processes while carrying the package formed thereon.
- the redistribution circuit patterns 120 include a first surface 120 a and a second surface 120 b opposite to the first surface 120 a .
- the second surface 120 b faces towards and is adhered to the carrier 110 a .
- a plurality of conductive terminals 150 are formed over the first surface 120 a of the redistribution circuit patterns 120 by a placement process and/or a reflow process so as to electrically connect to the redistribution circuit patterns 120 .
- the conductive terminals 150 may be conductive bumps, conductive pillars or other possible forms and shapes, which is not limited thereto.
- a plurality of first integrated circuit components 130 are formed over the first surface 120 a of the redistribution circuit patterns 120 with the conductive terminals 150 surrounding the first integrated circuit components 130 .
- the first integrated circuit component 130 has a rear surface 130 a and an active surface 130 b opposite to the rear surface 130 a .
- the active surface 130 b of the first integrated circuit components 130 are electrically connected to the redistribution circuit patterns 120 by bumps 130 c .
- the first integrated circuit components 130 may be an ASIC (Application-Specific Integrated Circuit) or other suitable active devices, which is not limited thereto.
- the chip bonding process of the first integrated circuit components 130 is performed prior to the formation of the conductive terminals 150 .
- the chip bonding process of the first integrated circuit components 130 is performed after the formation of the conductive terminals 150 .
- a first encapsulation 140 is formed over the first surface 120 a of the redistribution circuit patterns 120 to encapsulate the first integrated circuit components 130 and the conductive terminals 150 .
- the first encapsulation 140 may be a molding compound formed by molding processes.
- the first encapsulation 140 may be formed by an insulating material such as epoxy or other suitable insulating resins, which is not limited thereto.
- the first encapsulation 140 may be grinded by a chemical mechanical polishing (CMP) or other suitable grinding technique in order to expose the conductive terminals 150 and reduce the overall thickness of the package structure 400 (shown in FIG. 3D ).
- CMP chemical mechanical polishing
- the rear surface 130 a of the first integrated circuit components 130 and the conductive terminals 150 may be exposed simultaneously.
- the exposed rear surface 130 a of the integrated circuit components 130 and the exposed surface of the conductive terminals 150 may be aligned after grinding.
- the conductive terminals 150 may be exposed while the rear surface 130 a of the first integrated circuit components 130 may be covered by the first encapsulation 140 .
- the thickness of the first integrated circuit components 130 may be, for instance, less than the diameter (or thickness) of the grinded conductive terminals 150 . In some embodiment, the grinding process may be omitted depending on the design requirement.
- the second surface 120 b of the redistribution circuit patterns 120 is de-bonded from the carrier 110 a by physical treatment (e.g. laser lift-off process) or chemical treatment (e.g. chemical etching).
- the de-bonding layer (not shown) may be disposed between the second surface 120 b of the redistribution circuit patterns 120 and the carrier 100 a .
- the de-bonding layer may be formed on the carrier 100 a prior to the formation of the redistribution circuit patterns 120 .
- the de-bonding between the redistribution circuit patterns 120 and the carrier 110 a may be performed by peeling off the de-bonding layer from the redistribution circuit patterns 120 or the carrier 100 a.
- FIG. 2A is a schematic top view illustrating a manufacturing method of a package structure according to an embodiment of the invention
- FIG. 2B is a schematic cross-sectional view illustrating along the line A-A of the manufacturing method of the package structure in FIG. 2A
- the structure illustrated in FIG. 1 is flipped upside down and disposed on the carrier 110 b to form the package panel 200 after de-bonding the second surface 120 b of the redistribution circuit patterns 120 from the carrier 110 a . Therefore, the package panel 200 is provided with the second surface 120 b facing upward.
- the first integrated circuit components 130 may be arranged in an array on the carrier 110 b.
- FIG. 3A is schematic top view illustrating a manufacturing method of a package structure according to an embodiment of the invention.
- FIG. 3B is a schematic cross-sectional view along the line A-A of the manufacturing method of the package structure in FIG. 3A .
- the package panel 200 sealed with the first encapsulation 140 is cut along the scribe line into strip level to form a plurality of singulated package strips 300 .
- the cutting process in a two-dimensional array, such as a set of row cuts and column cuts may be performed by rotating blade or laser beam, which is not limited thereto.
- each of the singulated package strips 300 includes a first singulated encapsulation 240 , one of the redistribution circuit patterns 120 and at least one of the first integrated circuit components 130 encapsulated by the first singulated encapsulation 240 .
- the aforementioned processes may be performed in a first process chamber (not illustrated) with large-scale equipment.
- the singulated package strips 300 may be transferred to a second process chamber (not illustrated) with relatively small-scale equipment in order to perform the following processes.
- the first process chamber and the second process chamber may be isolated or combined, which is not limited thereto.
- the equipment in the first process chamber may perform the package process in a wafer level or a panel level
- the equipment in the second process chamber may perform the package process in a strip level or a block level for efficient assembly.
- the existing assembly technologies and the existing equipment may be compatible to perform the subsequent package process instead of performing the most package process or even the entire package process with large-scale equipment.
- the singulated package strip 300 is attached onto an attachment region 310 a of a substrate 310 .
- the substrate 310 is, for example, a glass or other suitable material. It should be noted that the shape, material and thickness of the substrate construe no limitation in the invention as long the substrate 310 is able to withstand the subsequent processes while carrying the package structure formed thereon.
- an adhesive layer 330 is at least formed on the attachment region 310 a of the substrate 310 to enhance the adhesion between the singulated package strips 300 and the substrate 310 .
- the formation of the adhesive layer 330 on the substrate 310 may be, for instance, performed prior to or after the transferring process of the singulated package strips 300 .
- the formation of the adhesive layer 330 on the substrate 310 is performed before attaching one of the singulated package strips 300 onto the attachment region 310 a of the substrate 310 .
- the adhesive layer 330 may be formed by, for example, attaching a film, applying a paste or glue, or other suitable material and manner, which is not limited thereto.
- the area of the substrate 310 is greater than the area of the singulated package strip 300 .
- the substrate 310 includes at least one tooling hole 320 distributed outside of the attachment region 310 a .
- the tooling holes 320 may be distributed at a periphery area surrounding the attachment region 310 a .
- the tooling hole 320 may be utilized for alignment or affixation of the substrate 310 for the subsequent processes. It should be noted that although three tooling holes 320 are shown in FIG. 3A , the amount of tooling holes 320 is not limited thereto.
- the tooling holes 320 may be located on the different planes with the adhesive layer 330 . For instance, the tooling holes 320 may be disposed on the sidewalls of the substrate 310 . The configuration of the tooling holes is not limited thereto.
- the process equipment in the second chamber may perform the subsequent processes by positioning the tooling holes 320 so as to align the location of the singulated package strips 300 on the substrate 310 .
- the substrate 310 may be affixed by the tooling holes 320 fixed with a holding fixture (not illustrated).
- the holding fixture provides a mechanical support for the substrate 310 .
- the holding fixture may be configured in the second process chamber or to the transferring equipment so as to ensure performing the processes in a stable state.
- the holding fixture may be positioned at the tooling holes 320 of the substrate 310 .
- the holding fixture may include a plurality of pins which corresponds to the tooling holes 320 .
- the pins of the holding fixture may be inserted into the tooling holes to avoid any undesired movement or shift of the substrate 310 .
- the holding fixture may be a vacuum fixture or a clamp, but is not limited thereto as long as it may affix the substrate 310 without causing the damage of the singulated package strips 300 during transferring or processing.
- FIG. 3C to FIG. 3D are schematic cross-sectional views illustrating a manufacturing method of a package structure according to an embodiment of the invention.
- a plurality of passive components 340 are formed over the second surface 120 b of the redistribution circuit patterns 120 .
- the passive components 340 may be, for instance, disposed corresponding to the conductive terminals 150 . It should be noted that the passive components 340 may be disposed in any manner as long as the passive components 340 are electrically connected to the redistribution circuit patterns 120 .
- the passive components 340 may be, for instance, capacitors, resistors, inductors and so on.
- the second integrated circuit component 350 is also formed over the second surface 120 b of the redistribution circuit patterns 120 by bonding process.
- the second integrated circuit component 350 may be memory devices such as NAND flash die or other suitable chips, which is not limited thereto.
- the second integrated circuit component 350 is electrically connected to the redistribution circuit patterns 120 through wires by wire bonding process. That is to say, the second integrated circuit component 350 is electrically connected to the conductive terminals 150 by wires.
- the bonding process of the passive components 340 is performed prior to the bonding process of the second integrated circuit component 350 .
- the bonding process of the passive components 340 is performed after the bonding process of the second integrated circuit component 350 .
- the sequential order of bonding process between the passive components 340 and the second integrated circuit component 350 construe no limitation in the invention.
- a second encapsulation 360 is formed to encapsulate the passive components 340 and the second integrated circuit component 350 .
- the second encapsulation 360 may be also formed by a molding compound or an insulating material by molding process. It may be understood that other components may also be assembled onto the substrate 310 , such as when packages in system are being fabricated. Subsequently, a singulation process is performed on the singulated package strips 300 so as to obtain a plurality of package structures 400 .
- each of the package structures 400 includes a second singulated encapsulation 360 a , the passive components 340 and at least one second integrated circuit component 350 .
- the second integrated circuit component 350 is electrically connected to the redistribution circuit patterns 120 of the singulated package strip 300 .
- the passive components 340 and the second integrated circuit components 350 are encapsulated by the second singulated encapsulation 360 a .
- the singulation process may be, for example, cutting with rotating blade or laser beam or other suitable technique, which is not limited thereto.
- the adhesive layer 330 and the substrate 310 are removed from the package structures 400 .
- the external energy for example, UV laser, visible light, or heat
- the adhesive layer 330 may be applied to the adhesive layer 330 , so as to allow the package structures 400 to de-bond from the substrate 310 .
- an epoxy mold compound (EMC) layer may be further formed over the rear surface 130 a in order to encapsulate the first integrated circuit components 130 .
- the substrate 310 with the tooling holes 320 may be reused after de-bonding from the package structures 400 so as to reduce the packaging costs.
- the package panel is cut to form the singulated package strips before the package process so as to avoid using large-scale equipment to perforin such package process.
- the package process is more efficient in strip format.
- the package process performed on the substrate with fixed the tooling hole may ensure the stability of the manufacturing process. As such, existing equipment may be leveraged with changes and compatible to the manufacturing process flow and also it maintains a stable manufacturing process as well as improvement of the product yield.
Abstract
Description
- The present invention relates to a manufacturing method thereof, and more particularly, to a manufacturing method of package structure.
- Generally, wafer level or panel level package is to be understood as meaning that the entire packaging and all the interconnections on the wafer as well as other processing steps such as wire bonding, die bonding or molding, are carried out before the singulation by dicing into a plurality of semiconductor dies. However, it requires large-scale equipment to perform such processes in wafer or panel level format. Further, it requires very heavy capital investment for such large-scale equipment, while such capital investment does not provide cost benefits. Therefore, how to accomplish the processing steps using existing equipment to minimize equipment costs and overall manufacturing costs has become a challenge to researchers in the field.
- The invention provides a manufacturing method of a package structure, which increases the production and provides processing stability.
- The invention provides a manufacturing method of a package structure. The method includes the following steps. A package panel is provided. The package panel includes a first encapsulation, a plurality of first integrated circuit components and a plurality of redistribution circuit patterns electrically connected to the first integrated circuit components, the first integrated circuit components are encapsulated by the first encapsulation, and the redistribution circuit patterns are distributed on the first encapsulation and the first integrated circuit components. The first encapsulation of the package panel is cut to form a plurality of singulated package strips. Each of the singulated package strips includes a first singulated encapsulation, one of the redistribution circuit patterns and at least one of the first integrated circuit components encapsulated by the first singulated encapsulation. One of the singulated package strips is attached onto an attachment region of a substrate. The substrate includes at least one tooling hole distributed outside of the attachment region. A package process is performed over the singulated package strip attached onto the substrate with the substrate affixed through the at least one tooling hole to form the package structure.
- The invention provides a manufacturing method of a package structure. The method includes the following steps. A package panel is provided in a first process chamber. The package panel includes a first encapsulation, a plurality of first integrated circuit components and a plurality of redistribution circuit patterns electrically connected to the first integrated circuit components, the first integrated circuit components are encapsulated by the first encapsulation, and the redistribution circuit patterns are distributed on the first encapsulation and the first integrated circuit components. The first encapsulation of the package panel is cut to form a plurality of singulated package strips in the first process chamber. Each of the singulated package strips includes a first singulated encapsulation, one of the redistribution circuit patterns and at least one of the first integrated circuit components encapsulated by the first singulated encapsulation. The singulated package strips are transferred to a second process chamber. At least one holding fixture is configured in the second process chamber. One of the singulated package strips is attached onto an attachment region of a substrate in the second process chamber. The substrate includes at least one tooling hole distributed outside of the attachment region. The substrate is affixed by the at least one holding fixture in the second process chamber. The at least one holding fixture corresponding to the at least one tooling hole of the substrate. A package process is performed over the singulated package strip attached onto the substrate to form the package structure in the second process chamber.
- Based on the above, the package panel is cut to form the singulated package strips before the package process so as to avoid using large-scale equipment to perform such package process. As such, existing equipment may be leveraged with changes and compatible to the manufacturing process flow and also it maintains a stable manufacturing process which can be cost optimized according to the applications being implemented in the package.
- To make the above features and advantages of the present invention more comprehensible, several embodiments accompanied with drawings are described in detail as follows.
- The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.
-
FIG. 1 is a schematic cross-sectional view illustrating a manufacturing method of a package structure according to an embodiment of the invention. -
FIG. 2A is a schematic top view illustrating a manufacturing method of a package structure according to an embodiment of the invention. -
FIG. 2B is a schematic cross-sectional view illustrating along the line A-A of the manufacturing method of the package structure inFIG. 2A . -
FIG. 3A is schematic top view illustrating a manufacturing method of a package structure according to an embodiment of the invention. -
FIG. 3B is a schematic cross-sectional view along the line A-A of the manufacturing method of the package structure inFIG. 3A . -
FIG. 3C toFIG. 3D are schematic cross-sectional views illustrating a manufacturing method of a package structure according to an embodiment of the invention. - Reference will now be made in detail to the present preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.
-
FIG. 1 is a schematic cross-sectional view illustrating a manufacturing method of a package structure according to an embodiment of the invention. Referring toFIG. 1 ,FIG. 1 shows a portion of a package at an intermediate stage of manufacturing process. A plurality ofredistribution circuit patterns 120 is formed over acarrier 110 a. Thecarrier 110 a is, for example, a glass substrate or other suitable substrate material, which is not limited thereto as long as the material is able to withstand the subsequent processes while carrying the package formed thereon. Theredistribution circuit patterns 120 include afirst surface 120 a and asecond surface 120 b opposite to thefirst surface 120 a. Thesecond surface 120 b faces towards and is adhered to thecarrier 110 a. A plurality ofconductive terminals 150 are formed over thefirst surface 120 a of theredistribution circuit patterns 120 by a placement process and/or a reflow process so as to electrically connect to theredistribution circuit patterns 120. For example, theconductive terminals 150 may be conductive bumps, conductive pillars or other possible forms and shapes, which is not limited thereto. - In the present embodiment, a plurality of first
integrated circuit components 130 are formed over thefirst surface 120 a of theredistribution circuit patterns 120 with theconductive terminals 150 surrounding the firstintegrated circuit components 130. Moreover, the first integratedcircuit component 130 has arear surface 130 a and anactive surface 130 b opposite to therear surface 130 a. Theactive surface 130 b of the firstintegrated circuit components 130 are electrically connected to theredistribution circuit patterns 120 bybumps 130 c. For instance, the firstintegrated circuit components 130 may be an ASIC (Application-Specific Integrated Circuit) or other suitable active devices, which is not limited thereto. In some embodiments, the chip bonding process of the firstintegrated circuit components 130 is performed prior to the formation of theconductive terminals 150. In some alternative embodiments, the chip bonding process of the firstintegrated circuit components 130 is performed after the formation of theconductive terminals 150. In addition, afirst encapsulation 140 is formed over thefirst surface 120 a of theredistribution circuit patterns 120 to encapsulate the firstintegrated circuit components 130 and theconductive terminals 150. For example, thefirst encapsulation 140 may be a molding compound formed by molding processes. However, in some embodiments, thefirst encapsulation 140 may be formed by an insulating material such as epoxy or other suitable insulating resins, which is not limited thereto. - Furthermore, the
first encapsulation 140 may be grinded by a chemical mechanical polishing (CMP) or other suitable grinding technique in order to expose theconductive terminals 150 and reduce the overall thickness of the package structure 400 (shown inFIG. 3D ). In one embodiment, after the grinding process, therear surface 130 a of the firstintegrated circuit components 130 and theconductive terminals 150 may be exposed simultaneously. Moreover, the exposedrear surface 130 a of theintegrated circuit components 130 and the exposed surface of theconductive terminals 150 may be aligned after grinding. In another embodiment, after the grinding process, theconductive terminals 150 may be exposed while therear surface 130 a of the firstintegrated circuit components 130 may be covered by thefirst encapsulation 140. Moreover, the thickness of the firstintegrated circuit components 130 may be, for instance, less than the diameter (or thickness) of the grindedconductive terminals 150. In some embodiment, the grinding process may be omitted depending on the design requirement. Next, thesecond surface 120 b of theredistribution circuit patterns 120 is de-bonded from thecarrier 110 a by physical treatment (e.g. laser lift-off process) or chemical treatment (e.g. chemical etching). In one embodiment, the de-bonding layer (not shown) may be disposed between thesecond surface 120 b of theredistribution circuit patterns 120 and the carrier 100 a. In other words, the de-bonding layer (not shown) may be formed on the carrier 100 a prior to the formation of theredistribution circuit patterns 120. As such, the de-bonding between theredistribution circuit patterns 120 and thecarrier 110 a may be performed by peeling off the de-bonding layer from theredistribution circuit patterns 120 or the carrier 100 a. -
FIG. 2A is a schematic top view illustrating a manufacturing method of a package structure according to an embodiment of the invention, andFIG. 2B is a schematic cross-sectional view illustrating along the line A-A of the manufacturing method of the package structure inFIG. 2A . Referring toFIG. 2A andFIG. 2B , the structure illustrated inFIG. 1 is flipped upside down and disposed on thecarrier 110 b to form thepackage panel 200 after de-bonding thesecond surface 120 b of theredistribution circuit patterns 120 from thecarrier 110 a. Therefore, thepackage panel 200 is provided with thesecond surface 120 b facing upward. It should be noted that the firstintegrated circuit components 130 may be arranged in an array on thecarrier 110 b. -
FIG. 3A is schematic top view illustrating a manufacturing method of a package structure according to an embodiment of the invention.FIG. 3B is a schematic cross-sectional view along the line A-A of the manufacturing method of the package structure inFIG. 3A . Referring toFIG. 3A andFIG. 3B , thepackage panel 200 sealed with thefirst encapsulation 140 is cut along the scribe line into strip level to form a plurality of singulated package strips 300. For example, the cutting process in a two-dimensional array, such as a set of row cuts and column cuts may be performed by rotating blade or laser beam, which is not limited thereto. In addition, each of the singulated package strips 300 includes a firstsingulated encapsulation 240, one of theredistribution circuit patterns 120 and at least one of the firstintegrated circuit components 130 encapsulated by the firstsingulated encapsulation 240. The aforementioned processes may be performed in a first process chamber (not illustrated) with large-scale equipment. However, after the cutting process, the singulated package strips 300 may be transferred to a second process chamber (not illustrated) with relatively small-scale equipment in order to perform the following processes. Moreover, the first process chamber and the second process chamber may be isolated or combined, which is not limited thereto. - For instance, the equipment in the first process chamber may perform the package process in a wafer level or a panel level, while the equipment in the second process chamber may perform the package process in a strip level or a block level for efficient assembly. As such, the existing assembly technologies and the existing equipment may be compatible to perform the subsequent package process instead of performing the most package process or even the entire package process with large-scale equipment.
- The
singulated package strip 300 is attached onto anattachment region 310 a of asubstrate 310. Thesubstrate 310 is, for example, a glass or other suitable material. It should be noted that the shape, material and thickness of the substrate construe no limitation in the invention as long thesubstrate 310 is able to withstand the subsequent processes while carrying the package structure formed thereon. In one embodiment, anadhesive layer 330 is at least formed on theattachment region 310 a of thesubstrate 310 to enhance the adhesion between the singulated package strips 300 and thesubstrate 310. The formation of theadhesive layer 330 on thesubstrate 310 may be, for instance, performed prior to or after the transferring process of the singulated package strips 300. In one embodiment, the formation of theadhesive layer 330 on thesubstrate 310 is performed before attaching one of the singulated package strips 300 onto theattachment region 310 a of thesubstrate 310. Theadhesive layer 330 may be formed by, for example, attaching a film, applying a paste or glue, or other suitable material and manner, which is not limited thereto. - In the present embodiment, the area of the
substrate 310 is greater than the area of thesingulated package strip 300. In addition, thesubstrate 310 includes at least onetooling hole 320 distributed outside of theattachment region 310 a. In other words, the tooling holes 320 may be distributed at a periphery area surrounding theattachment region 310 a. Thetooling hole 320 may be utilized for alignment or affixation of thesubstrate 310 for the subsequent processes. It should be noted that although threetooling holes 320 are shown inFIG. 3A , the amount of tooling holes 320 is not limited thereto. In one embodiment, the tooling holes 320 may be located on the different planes with theadhesive layer 330. For instance, the tooling holes 320 may be disposed on the sidewalls of thesubstrate 310. The configuration of the tooling holes is not limited thereto. - For example, the process equipment in the second chamber may perform the subsequent processes by positioning the tooling holes 320 so as to align the location of the singulated package strips 300 on the
substrate 310. Furthermore, for the stability of the subsequent processes, thesubstrate 310 may be affixed by the tooling holes 320 fixed with a holding fixture (not illustrated). The holding fixture provides a mechanical support for thesubstrate 310. For instance, the holding fixture may be configured in the second process chamber or to the transferring equipment so as to ensure performing the processes in a stable state. The holding fixture may be positioned at the tooling holes 320 of thesubstrate 310. For example, the holding fixture may include a plurality of pins which corresponds to the tooling holes 320. When transferring or processing thesubstrate 310 thereon, the pins of the holding fixture may be inserted into the tooling holes to avoid any undesired movement or shift of thesubstrate 310. In one embodiment, the holding fixture may be a vacuum fixture or a clamp, but is not limited thereto as long as it may affix thesubstrate 310 without causing the damage of the singulated package strips 300 during transferring or processing. -
FIG. 3C toFIG. 3D are schematic cross-sectional views illustrating a manufacturing method of a package structure according to an embodiment of the invention. Referring toFIG. 3C andFIG. 3D , a plurality ofpassive components 340 are formed over thesecond surface 120 b of theredistribution circuit patterns 120. In addition, thepassive components 340 may be, for instance, disposed corresponding to theconductive terminals 150. It should be noted that thepassive components 340 may be disposed in any manner as long as thepassive components 340 are electrically connected to theredistribution circuit patterns 120. Thepassive components 340 may be, for instance, capacitors, resistors, inductors and so on. Moreover, at least one secondintegrated circuit component 350 is also formed over thesecond surface 120 b of theredistribution circuit patterns 120 by bonding process. For example, the secondintegrated circuit component 350 may be memory devices such as NAND flash die or other suitable chips, which is not limited thereto. In addition, the secondintegrated circuit component 350 is electrically connected to theredistribution circuit patterns 120 through wires by wire bonding process. That is to say, the secondintegrated circuit component 350 is electrically connected to theconductive terminals 150 by wires. In some embodiments, the bonding process of thepassive components 340 is performed prior to the bonding process of the secondintegrated circuit component 350. In some alternative embodiments, the bonding process of thepassive components 340 is performed after the bonding process of the secondintegrated circuit component 350. However, the sequential order of bonding process between thepassive components 340 and the secondintegrated circuit component 350 construe no limitation in the invention. - In the present embodiment, a
second encapsulation 360 is formed to encapsulate thepassive components 340 and the secondintegrated circuit component 350. Similar to thefirst encapsulation 140, thesecond encapsulation 360 may be also formed by a molding compound or an insulating material by molding process. It may be understood that other components may also be assembled onto thesubstrate 310, such as when packages in system are being fabricated. Subsequently, a singulation process is performed on the singulated package strips 300 so as to obtain a plurality ofpackage structures 400. Moreover, each of thepackage structures 400 includes a secondsingulated encapsulation 360 a, thepassive components 340 and at least one secondintegrated circuit component 350. In addition, the secondintegrated circuit component 350 is electrically connected to theredistribution circuit patterns 120 of thesingulated package strip 300. Thepassive components 340 and the secondintegrated circuit components 350 are encapsulated by the secondsingulated encapsulation 360 a. Furthermore, the singulation process may be, for example, cutting with rotating blade or laser beam or other suitable technique, which is not limited thereto. - Referring to
FIG. 3D , after the singulation process described above, theadhesive layer 330 and thesubstrate 310 are removed from thepackage structures 400. For instance, the external energy (for example, UV laser, visible light, or heat) may be applied to theadhesive layer 330, so as to allow thepackage structures 400 to de-bond from thesubstrate 310. However, other suitable technique depending on the structure and material of theadhesive layer 330 may be applied, which is not limited thereto. In one embodiment, after removing theadhesive layer 330, an epoxy mold compound (EMC) layer may be further formed over therear surface 130 a in order to encapsulate the firstintegrated circuit components 130. Moreover, thesubstrate 310 with the tooling holes 320 may be reused after de-bonding from thepackage structures 400 so as to reduce the packaging costs. - Based on the foregoing, the package panel is cut to form the singulated package strips before the package process so as to avoid using large-scale equipment to perforin such package process. In addition, the package process is more efficient in strip format. Moreover, the package process performed on the substrate with fixed the tooling hole may ensure the stability of the manufacturing process. As such, existing equipment may be leveraged with changes and compatible to the manufacturing process flow and also it maintains a stable manufacturing process as well as improvement of the product yield.
- It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.
Claims (19)
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JP2018074451A JP2019114761A (en) | 2017-12-20 | 2018-04-09 | Package structure and method for manufacturing the same |
TW107144142A TW201929103A (en) | 2017-12-20 | 2018-12-07 | Package structure and manufacturing method thereof |
CN201811563080.6A CN109979832A (en) | 2017-12-20 | 2018-12-20 | Encapsulating structure and its manufacturing method |
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US20190189494A1 true US20190189494A1 (en) | 2019-06-20 |
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JP2546629B2 (en) * | 1994-09-13 | 1996-10-23 | 株式会社イースタン | Tape carrier package for semiconductor device, manufacturing method thereof, and manufacturing method of semiconductor device |
US5859475A (en) * | 1996-04-24 | 1999-01-12 | Amkor Technology, Inc. | Carrier strip and molded flex circuit ball grid array |
CN101009230A (en) | 2006-01-24 | 2007-08-01 | 探微科技股份有限公司 | Wafer-level encapsulation and cutting method |
CN102130072B (en) * | 2010-01-15 | 2013-03-13 | 矽品精密工业股份有限公司 | Bearing plate and manufacturing method thereof |
TWI480992B (en) | 2010-01-26 | 2015-04-11 | Powertech Technology Inc | Flip-chip package maintaining alignment during soldering |
US8884431B2 (en) | 2011-09-09 | 2014-11-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Packaging methods and structures for semiconductor devices |
US8367475B2 (en) * | 2011-03-25 | 2013-02-05 | Broadcom Corporation | Chip scale package assembly in reconstitution panel process format |
US9679836B2 (en) | 2011-11-16 | 2017-06-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package structures and methods for forming the same |
US9831170B2 (en) * | 2011-12-30 | 2017-11-28 | Deca Technologies, Inc. | Fully molded miniaturized semiconductor module |
JP5949193B2 (en) * | 2012-06-12 | 2016-07-06 | 富士通株式会社 | Manufacturing method of electronic device |
US9704780B2 (en) | 2012-12-11 | 2017-07-11 | STATS ChipPAC, Pte. Ltd. | Semiconductor device and method of forming low profile fan-out package with vertical interconnection units |
TWI635585B (en) | 2013-07-10 | 2018-09-11 | 矽品精密工業股份有限公司 | Semiconductor package and method of manufacture |
EP3126541A1 (en) * | 2014-04-02 | 2017-02-08 | Applied Materials, Inc. | Vacuum processing system and method for mounting a processing system |
US9799622B2 (en) * | 2014-06-18 | 2017-10-24 | Dyi-chung Hu | High density film for IC package |
US9947625B2 (en) * | 2014-12-15 | 2018-04-17 | Bridge Semiconductor Corporation | Wiring board with embedded component and integrated stiffener and method of making the same |
US9502272B2 (en) * | 2014-12-29 | 2016-11-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Devices and methods of packaging semiconductor devices |
US9461018B1 (en) * | 2015-04-17 | 2016-10-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Fan-out PoP structure with inconsecutive polymer layer |
US9659911B1 (en) * | 2016-04-20 | 2017-05-23 | Powertech Technology Inc. | Package structure and manufacturing method thereof |
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