US20180114943A1 - Display device and method of manufacturing the same - Google Patents

Display device and method of manufacturing the same Download PDF

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Publication number
US20180114943A1
US20180114943A1 US15/784,539 US201715784539A US2018114943A1 US 20180114943 A1 US20180114943 A1 US 20180114943A1 US 201715784539 A US201715784539 A US 201715784539A US 2018114943 A1 US2018114943 A1 US 2018114943A1
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Prior art keywords
protective member
plastic substrate
pad portion
display device
upper protective
Prior art date
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Abandoned
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US15/784,539
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English (en)
Inventor
Kwonhyung LEE
Chanwoo LEE
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LG Display Co Ltd
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LG Display Co Ltd
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Assigned to LG DISPLAY CO., LTD. reassignment LG DISPLAY CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: LEE, CHANWOO, LEE, KWONHYUNG
Publication of US20180114943A1 publication Critical patent/US20180114943A1/en
Priority to US16/937,101 priority Critical patent/US11362304B2/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H10K50/844—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/129—Chiplets
    • H01L51/5253—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • H01L27/3276—
    • H01L51/0097—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/873—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10—Substrates, e.g. flexible substrates
    • H10K77/111—Flexible substrates
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
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    • G—PHYSICS
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • H01L2227/323—
    • H01L2251/5338—
    • H01L27/322—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/311—Flexible OLED
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/38—Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/549—Organic PV cells

Definitions

  • the present disclosure relates to a display device, and, more particularly, to display device for preventing damage of a plastic substrate, and a method of manufacturing the same.
  • a large-sized cathode ray tube (CRT) display has been rapidly replaced by a flat panel display (FPD) having advantages of a thin profile, light weight, and a large-sized screen.
  • the flat panel display include a liquid crystal display (LCD), a plasma display panel (PDP), an organic light-emitting diode (OLED) display, and an electrophoresis display (EPD).
  • An OLED display includes self-emitting elements capable of emitting light by themselves, and has advantages of a fast response time, a high emission efficiency, a high luminance, and a wide viewing angle.
  • the OLED display can be manufactured on a flexible plastic substrate.
  • the OLED display has additional advantages of a lower driving voltage, lower power consumption, and better color tone as compared to a plasma display panel or an inorganic electroluminescent display.
  • polyimide is coated on a glass substrate; elements, such as an organic light-emitting diode including a thin film transistor, an organic layer, etc. are manufactured; and a flexible printed circuit board, such as a chip-on-film (COF), is attached to a pad portion.
  • COF chip-on-film
  • FIGS. 1 and 2 are cross-sectional views of an OLED display according to a related art.
  • FIG. 3 is an image illustrating a damaged pad portion in a related art.
  • an OLED display is configured such that an upper protective film UP and a lower protective film LP are respectively attached to a front surface and a back surface of a plastic substrate PI on which elements, such as an organic light-emitting diode, are formed, a chip-on-film COF is attached to a pad portion PD positioned on one side of the plastic substrate PI, and a resin layer RE is coated on the pad portion PD to protect the pad portion PD.
  • the pad portion PD or an edge of the plastic substrate PI is exposed to the outside of the upper and lower protective films UP and LP, there is a problem that the plastic substrate PI is easily torn out by an external impact.
  • the pad portion PD was entirely torn out, as shown by the string of chip-on-film elements.
  • the OLED display is damaged by a damage of the plastic substrate PI, and a defective driving of the OLED display occurs.
  • the present disclosure is directed to a display device and a method of manufacturing the same that substantially obviate one or more of the issues due to limitations and disadvantages of the related art.
  • An aspect is to provide a display device capable of preventing a substrate from being damaged by an external impact.
  • Another aspect is to provide a display device capable of preventing a damage and a defective driving of the display device.
  • a display device including: a plastic substrate including: a display portion including organic light emitting diodes, and a pad portion including chip-on-films, a lower protective member attached to an entire lower surface of the plastic substrate, and an upper protective member attached to an upper surface of the plastic substrate, the upper protective member covering at least the display portion and both edges of the pad portion.
  • a method of manufacturing a display device including: providing a plastic substrate including: providing a display portion including organic light emitting diodes, providing a pad portion, attaching chip-on-films to the pad portion, attaching a lower protective member to an entire lower surface of the plastic substrate, and attaching an upper protective member to an upper surface of the plastic substrate, the upper protective member covering at least the display portion and both edges of the pad portion.
  • FIGS. 1 and 2 are cross-sectional views of an organic light-emitting diode (OLED) display according to a related art.
  • OLED organic light-emitting diode
  • FIG. 3 is an image illustrating a damaged pad portion in a related art.
  • FIG. 4 is a schematic block diagram of an organic light-emitting diode (OLED) display according to an example embodiment.
  • OLED organic light-emitting diode
  • FIG. 5 illustrates a first example of a circuit configuration of a subpixel
  • FIG. 6 illustrates a second example of a circuit configuration of a subpixel.
  • FIG. 7 is a plan view of an OLED display according to a first example embodiment.
  • FIG. 8 is a cross-sectional view illustrating a subpixel of an OLED display according to a first example embodiment.
  • FIG. 9 is a cross-sectional view taken along line I-I′ of FIG. 7 .
  • FIG. 10 is a cross-sectional view taken along line II-II′ of FIG. 7 .
  • FIG. 11 is a plan view of an OLED display according to a first example embodiment.
  • FIG. 12 is a plan view of a display device according to a second example embodiment.
  • FIG. 13 is a cross-sectional view taken along line III-III′ of FIG. 12 .
  • FIG. 14 is a cross-sectional view taken along line IV-IV′ of FIG. 12 .
  • FIG. 15 is a plan view of a display device according to a second example embodiment.
  • FIG. 16 is an image illustrating a display device according to an example embodiment used in an experiment.
  • FIG. 17 is an image illustrating an experiment when an impact is applied to a display device according to an example embodiment.
  • FIG. 18 is an image illustrating an experiment after an impact is applied to a display device according to an example embodiment.
  • Example embodiments are described below with reference to FIGS. 4 to 18 .
  • FIG. 4 is a schematic block diagram of an OLED display according to an example embodiment.
  • FIG. 5 illustrates a first example of a circuit configuration of a subpixel.
  • FIG. 6 illustrates a second example of a circuit configuration of a subpixel.
  • an OLED display may include an image processing unit 10 , a timing controller 20 , a data driver 30 , a gate driver 40 , and a display panel 50 .
  • the image processing unit 10 may output a data signal DATA and a data enable signal DE supplied from the outside.
  • the image processing unit 10 may output one or more of: a vertical sync signal, a horizontal sync signal, and a clock signal. For convenience of explanation, these signals are not shown.
  • the image processing unit 10 may be formed on a system circuit board as an integrated circuit (IC).
  • the timing controller 20 may receive the data signal DATA and driving signals, including the data enable signal DE or the vertical sync signal, the horizontal sync signal, the clock signal, etc. from the image processing unit 10 . Based on the driving signals, the timing controller 20 may output a gate timing control signal GDC for controlling operation timing of the gate driver 40 , and a data timing control signal DDC for controlling operation timing of the data driver 30 .
  • the timing controller 20 may be formed on a control circuit board as an IC.
  • the data driver 30 may sample and latch the data signal DATA received from the timing controller 20 in response to the data timing control signal DDC supplied from the timing controller 20 , and may convert the sampled and latched data signal DATA using gamma reference voltages.
  • the data driver 30 may output the converted data signal DATA to data lines DL 1 to DLn.
  • the data driver 30 may be attached to a substrate as an IC.
  • the gate driver 40 may output a gate signal while shifting a level of a gate voltage in response to the gate timing control signal GDC supplied from the timing controller 20 .
  • the gate driver 40 may output the gate signal to gate lines GL 1 to GLm.
  • the gate driver 40 may be formed on a gate circuit board as an IC, or may be formed on the display panel 50 in a gate-in-panel (GIP) manner.
  • GIP gate-in-panel
  • the display panel 50 may display an image in response to the data signal DATA and the gate signal respectively received from the data driver 30 and the gate driver 40 .
  • the display panel 50 may include subpixels SP for displaying an image.
  • each subpixel may include a switching transistor SW, a driving transistor DR, a compensation circuit CC, and an organic light-emitting diode (OLED).
  • the OLED may operate to emit light based on a driving current generated by the driving transistor DR.
  • the switching transistor SW may perform a switching operation so that a data signal supplied through a first data line DL 1 may be stored in a capacitor Cst as a data voltage in response to a gate signal supplied through a gate line GL 1 .
  • the driving transistor DR may enable a driving current to flow between a high potential power line VDD and a low potential power line GND (not limited to a ground potential) based on the data voltage stored in the capacitor Cst.
  • the compensation circuit CC is a circuit for compensating for a threshold voltage of the driving transistor DR.
  • a capacitor connected to the switching transistor SW or the driving transistor DR may be mounted inside the compensation circuit CC.
  • the compensation circuit CC may include one or more thin film transistors (TFTs) and a capacitor. Configuration of the compensation circuit CC may be variously changed depending on a compensation method. A brief description of the compensation circuit CC will be made.
  • a subpixel including the compensation circuit CC may further include a signal line and a power line for driving a compensation TFT and supplying a predetermined signal or electric power.
  • the gate line GL 1 may include a first gate line GL 1 a supplying the gate signal to the switching transistor SW, and a second gate line GL 1 b for driving the compensation TFT included in the subpixel.
  • the added power line may be defined as an initialization power line INIT for initializing a predetermined node of the subpixel to a predetermined voltage.
  • this is merely an example, and embodiments are not limited thereto.
  • FIGS. 5 and 6 illustrate that one subpixel may include the compensation circuit CC by way of example.
  • the compensation circuit CC may be omitted, for example, when an object (e.g., the data driver 30 ) to be compensated is positioned outside the subpixel.
  • the subpixel may have a configuration of 2T(Transistor)1C(Capacitor) in which the switching transistor SW, the driving transistor DR, the capacitor, and the OLED are provided.
  • the compensation circuit CC when the compensation circuit CC is added to the subpixel, the subpixel may have various configurations, such as 3T1C, 4T2C, 5T2C, 6T2C, 7T2C, or the like.
  • the compensation circuit CC may be positioned between the switching transistor SW and the driving transistor DR by way of an example. However, the compensation circuit CC may be further positioned between the driving transistor DR and the OLED. The position and the structure of the compensation circuit CC are not limited to the ones illustrated in FIGS. 5 and 6 .
  • FIG. 7 is a plan view of an OLED display according to a first example embodiment.
  • FIG. 8 is a cross-sectional view illustrating a subpixel of an OLED display according to a first example embodiment.
  • FIG. 9 is a cross-sectional view taken along line I-I′ of FIG. 7 .
  • FIG. 10 is a cross-sectional view taken along line II-II′ of FIG. 7 .
  • FIG. 11 is a plan view of an OLED display according to a first example embodiment.
  • an OLED display may include a plastic substrate PI, a display portion A/A, and a pad portion PD disposed on one side of the plastic substrate PI outside the display portion A/A.
  • the display portion A/A may include a plurality of subpixels SP. For example, R (red), G (green), and B (blue) subpixels or R, G, B, and W (white) subpixels of the display portion A/A may emit light to represent the full color.
  • Chip-on-films COF may be attached to the pad portion PD disposed on one side, for example, the lower side of the display portion A/A.
  • a data signal and electric power may be applied to a plurality of signal lines (not shown) connected to the display portion A/A through the chip-on-films COF.
  • the OLED display may further include a gate-in-panel (GIP) driver on one side of the plastic substrate PI.
  • GIP gate-in-panel
  • a first buffer layer BUF 1 may be positioned on the plastic substrate PI.
  • the plastic substrate PI may be, for example, a polyimide substrate.
  • the plastic substrate PI according to an embodiment may have flexible characteristics.
  • the first buffer layer BUF 1 may protect a thin film transistor, formed in a subsequent process from impurities, for example, alkali ions that may be discharged from the plastic substrate PI.
  • the first buffer layer BUF 1 may be, for example, a silicon oxide (SiO x ) layer, a silicon nitride (SiN x ) layer, or a multilayer thereof.
  • a shield layer LS may be positioned on the first buffer layer BUF 1 .
  • the shield layer LS may prevent a reduction in a panel driving current, which may be generated by using a polyimide substrate.
  • a second buffer layer BUF 2 may be positioned on the shield layer LS.
  • the second buffer layer BUF 2 may protect a thin film transistor, formed in a subsequent process, from impurities, for example, alkali ions discharged from the shield layer LS.
  • the second buffer layer BUF 2 may be, for example, a silicon oxide (SiO x ) layer, a silicon nitride (SiN x ) layer, or a multilayer thereof.
  • a semiconductor layer ACT may be positioned on the second buffer layer BUF 2 , and may be formed of, e.g., a silicon semiconductor or an oxide semiconductor.
  • the silicon semiconductor may include, for example, amorphous silicon or crystallized polycrystalline silicon.
  • the polycrystalline silicon has a high mobility (for example, more than 100 cm 2 /Vs), low power consumption, and excellent reliability.
  • the polycrystalline silicon can be applied for a gate driver and/or a multiplexer (MUX) for use in a driving element or applied to a driving TFT of each pixel of the OLED display. Because the oxide semiconductor has a low OFF-current, the oxide semiconductor may be suitable for a switching TFT which has a short ON-time and a long OFF-time.
  • the oxide semiconductor may increase a voltage hold time of the pixel due to the low OFF-current, the oxide semiconductor may be suitable for a display device requiring a low-speed drive and/or low power consumption.
  • the semiconductor layer ACT may include a drain region and a source region, each including p-type or n-type impurities, and may also include a channel region between the drain region and the source region.
  • a gate insulating layer GI may be positioned on the semiconductor layer ACT, and may be formed of a silicon oxide (SiO x ) layer, a silicon nitride (SiN x ) layer, or a multilayer thereof.
  • a gate electrode GA may be positioned on the gate insulating layer GI at a location corresponding to a predetermined region (e.g., the channel region when impurities are injected) of the semiconductor layer ACT.
  • the gate electrode GA may be formed of, for example, one or more of: molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), or a combination thereof.
  • the gate electrode GA may be a multilayer, which may be formed of, for example, one or more of: molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), or a combination thereof.
  • the gate electrode GA may be formed as a double layer, e.g., of Mo/Al—Nd or Mo/Al.
  • An interlayer dielectric layer ILD may be positioned on the gate electrode GA, and may insulate the gate electrode GA.
  • the interlayer dielectric layer ILD may be formed, for example, of a silicon oxide (SiO x ) layer, a silicon nitride (SiN x ) layer, or a multilayer thereof.
  • Contact holes CH exposing a portion of the semiconductor layer ACT may be formed where each of the interlayer dielectric layer ILD and the gate insulating layer GI is formed.
  • a drain electrode DE and a source electrode SE may be positioned on the interlayer dielectric layer ILD.
  • the drain electrode DE may be connected to the semiconductor layer ACT through the contact hole CH exposing the drain region of the semiconductor layer ACT.
  • the source electrode SE may be connected to the semiconductor layer ACT through the contact hole CH exposing the source region of the semiconductor layer ACT.
  • Each of the source electrode SE and the drain electrode DE may be formed as a single layer or as a multilayer.
  • each of the source electrode SE and the drain electrode DE may be formed, for example, of one or more of: molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), or a combination thereof.
  • Mo molybdenum
  • Al aluminum
  • Cr chromium
  • Au gold
  • Ti titanium
  • Ni nickel
  • Nd neodymium
  • Cu copper
  • each of the source electrode SE and the drain electrode DE may be formed, for example, as a double layer of, e.g., Mo/Al—Nd or as a triple layer of, e.g., Ti/Al/Ti, Mo/Al/Mo, or Mo/Al—Nd/Mo.
  • a thin film transistor TFT including the semiconductor layer ACT, the gate electrode GA, the source electrode SE, and the drain electrode DE may be formed.
  • a passivation layer PAS may be positioned on the plastic substrate PI including the thin film transistor TFT.
  • the passivation layer PAS may be an insulating layer protecting the component underlying the passivation layer PAS, and may be formed, for example, of a silicon oxide (SiO x ) layer, a silicon nitride (SiN x ) layer, or a multilayer thereof.
  • a color filter CF may be positioned on the passivation layer PAS.
  • the color filter CF may convert white light emitted by an organic light-emitting diode OLED into red, green, or blue light.
  • An overcoat layer OC may be positioned on the color filter CF.
  • the overcoat layer OC may be a planarization layer for reducing a height difference (or step coverage) of an underlying structure, and may be formed, for example, of an organic material, such as polyimide, benzocyclobutene-based resin, and acrylate.
  • the overcoat layer OC may be formed through a spin-on-glass (SOG) method for coating the organic material in a liquid state, and then curing the organic material.
  • SOG spin-on-glass
  • a via hole VIA exposing the drain electrode DE of the thin film transistor TFT may be positioned in a portion of the overcoat layer OC.
  • the organic light-emitting diode OLED may be positioned on the overcoat layer OC.
  • a first electrode ANO may be positioned on the overcoat layer OC.
  • the first electrode ANO may serve as a pixel electrode, and may be connected to the drain electrode DE of the thin film transistor TFT through the via hole VIA.
  • the first electrode ANO may be an anode, and may be formed, for example, of a transparent conductive material, such as indium tin oxide (ITO), indium zinc oxide (IZO), and/or zinc oxide (ZnO).
  • the first electrode ANO may further include a reflective layer.
  • the reflective layer may be formed, for example, of one or more of: aluminum (Al), copper (Cu), silver (Ag), nickel (Ni), palladium (Pd), or a combination thereof.
  • the reflective layer may be formed of an Ag/Pd/Cu (APC) alloy.
  • a bank layer BNK defining pixels may be positioned on the plastic substrate PI including the first electrode ANO.
  • the bank layer BNK may be formed of an organic material, such as polyimide, benzocyclobutene-based resin, and/or acrylate.
  • the bank layer BNK may include a pixel definition portion OP exposing the first electrode ANO.
  • An organic layer OLE contacting the first electrode ANO may be positioned at a front surface of the plastic substrate PI.
  • the organic layer OLE may be a layer in which electrons and holes combine and emit light.
  • a hole injection layer and/or a hole transport layer may be positioned between the organic layer OLE and the first electrode ANO.
  • An electron injection layer and/or an electron transport layer may be positioned on the organic layer OLE.
  • a second electrode CAT may be positioned on the organic layer OLE, and may be positioned on an entire surface of the display area A/A (see the FIG. 4 example).
  • the second electrode CAT may be a cathode electrode, and may be formed, for example, of one or more of: magnesium (Mg), calcium (Ca), aluminum (Al), silver (Ag), or a combination thereof, each having a low work function.
  • Mg magnesium
  • Ca calcium
  • Al aluminum
  • Ag silver
  • the second electrode CAT may be thin enough to transmit light.
  • the second electrode CAT is a reflective electrode
  • the second electrode CAT may be thick enough to reflect light.
  • An upper protective member UP may be attached to an upper surface of the plastic substrate PI, on which the thin film transistor TFT and the organic light-emitting diode OLED may be formed, through an adhesive layer ADL.
  • the upper protective member UP may be, for example, a transparent plastic substrate or a metal thin film.
  • a lower protective member LP may be attached to a lower surface of the plastic substrate PI. Because the lower protective member LP may have to transmit light, the lower protective member LP may be formed of a transparent plastic substrate.
  • the lower protective member LP may be disposed on the entire lower surface of the plastic substrate PI, and the upper protective member UP may be disposed on the upper surface of the plastic substrate PI. Because no component may be present on the lower surface of the plastic substrate PI, the lower protective member LP may be attached to the entire lower surface of the plastic substrate PI. Further, a resin layer RE may be disposed to cover the chip-on-films COF on the pad portion PD and the pad portion PD.
  • the pad portion PD may be positioned on the upper surface of the plastic substrate PI.
  • the chip-on-films COF may be attached to the pad portion PD.
  • the upper protective member UP may not be attached to a portion of the pad portion PD to which the chip-on-films COF are attached. Thus, the upper protective member UP may be disposed on the entire upper surface of the plastic substrate PI, except for a portion of the pad portion PD.
  • the plastic substrate PI can be prevented from being damaged by an external impact.
  • the side of the plastic substrate PI may be most vulnerable to an impact, and may generate cracks, the impact may be propagated to elements inside the plastic substrate PI, thus causing damage of the display device.
  • embodiments may cover the plastic substrate PI using the upper protective member UP and the lower protective member LP, thereby preventing damage of the plastic substrate PI.
  • all the sides of the lower protective member LP may be formed to coincide with all the sides of the plastic substrate PI.
  • the lower protective member LP and the plastic substrate PI may have the same size.
  • the lower protective member LP may be attached to the entire lower surface of the plastic substrate PI, and may cover the entire lower surface of the plastic substrate PI.
  • the sides of the upper protective member UP may be formed to coincide with the sides of the plastic substrate PI, except for the side of the plastic substrate PI on which the pad portion PD may be formed.
  • the upper protective member UP may be disposed to cover both edges of the plastic substrate PI, even at the side on which the pad portion PD may be formed.
  • the plurality of chip-on-films COF may be attached to the pad portion PD, and edges of the plastic substrate PI may be positioned outside the left side and the right side of the pad portion PD, to which the chip-on-film COF may not be attached.
  • the upper protective member UP may include first protrusions PP 1 protruding to the pad portion PD.
  • the first protrusions PP 1 may be disposed to overlap the edges of the plastic substrate PI.
  • the upper protective member UP may be disposed on the entire upper surface of the plastic substrate PI, except for a portion to which the chip-on-films COF may be attached.
  • the upper protective member UP according to the embodiment may be disposed at both edges of the plastic substrate PI, even in the area in which the pad portion PD may be formed. Hence, even when the impact is applied to the edges of the plastic substrate PI, the upper protective member UP can prevent the plastic substrate PI from being torn out in the formation area of the pad portion PD.
  • the lower protective member LP may be disposed on the entire lower surface of the plastic substrate PI.
  • the upper protective member UP may be disposed to cover portions between both edges of the plastic substrate PI and the chip-on-films COF in the formation area of the pad portion PD.
  • the upper protective member UP may include first protrusions PP 1 covering both edges at the side of the plastic substrate PI on which the pad portion PD is disposed, and second protrusions PP 2 covering the plastic substrate PI between the chip-on-films COF.
  • the second protrusions PP 2 may extend and protrude between the chip-on-films COF, and may be disposed to coincide with one side of the plastic substrate PI.
  • the upper protective member UP may be disposed on the entire upper surface of the plastic substrate PI, except for a portion to which the chip-on-films COF may be attached, thereby preventing the plastic substrate PI positioned at the pad portion PD from being torn out when the impact is applied to the edge of the plastic substrate PI.
  • the display device may form the lower protective member LP on the entire lower surface of the plastic substrate PI and forms the upper protective member UP on the entire upper surface of the plastic substrate PI, except for a portion to which the chip-on-films COF may be attached, thereby preventing the plastic substrate PI from being damaged by the impact applied to the side of the plastic substrate PI.
  • the first embodiment can prevent the damage and defective driving of the display device.
  • FIG. 12 is a plan view of a display device according to a second example embodiment.
  • FIG. 13 is a cross-sectional view taken along line III-III′ of FIG. 12 .
  • FIG. 14 is a cross-sectional view taken along line IV-IV′ of FIG. 12 .
  • FIG. 15 is a plan view of a display device according to a second example embodiment.
  • a lower protective member LP may be disposed on an entire lower surface of a plastic substrate PI, and an upper protective member UP may be disposed on an upper surface of the plastic substrate PI.
  • the lower protective member LP and the upper protective member UP may each have a size larger than the plastic substrate PI.
  • the lower protective member LP and the upper protective member UP may completely cover the plastic substrate PI so that the sides of the plastic substrate PI may not be exposed to the outside, except for the side of the plastic substrate PI on which a pad portion PD may be formed.
  • the pad portion PD may be disposed on the upper surface of the plastic substrate PI, and chip-on-films COF may be attached to the pad portion PD.
  • the upper protective member UP may not be attached to a portion of the pad portion PD to which the chip-on-films COF are attached.
  • the upper protective member UP may be disposed on the entire upper surface of the plastic substrate PI, except for a portion of the pad portion PD. Because the upper protective member UP may have the size larger than the plastic substrate PI as described above, the upper protective member UP may further protrude to the outside of the sides of the plastic substrate PI, except for the side on which the pad portion PD may be formed. For example, as shown in FIG.
  • the upper protective member UP may protrude further than the upper side, the left side, and the right side of the plastic substrate PI.
  • the lower protective member LP may have a size larger than the plastic substrate PI as described above, but may be configured such that one side of the lower protective member LP may coincide with the lower side of the plastic substrate PI on which the pad portion PD may be formed.
  • the lower protective member LP may protrude further than the remaining sides of the plastic substrate PI, except for the side of the plastic substrate PI on which the pad portion PD may be formed.
  • the upper protective member UP may cover both edges of the plastic substrate PI in the formation area of the pad portion PD, and may protrude further than the sides of the pad portion PD.
  • the plurality of chip-on-films COF may be attached to the pad portion PD, and edges of the plastic substrate PI may be positioned outside the left side and the right side of the pad portion PD, on which the chip-on-film COF may not be attached.
  • the upper protective member UP may include third protrusions PP 3 protruding to the pad portion PD.
  • the third protrusions PP 3 may be disposed to overlap the edges of the plastic substrate PI.
  • the upper protective member UP may be disposed on the entire upper surface of the plastic substrate PI, except for a portion to which the chip-on-films COF may be attached.
  • the lower protective member LP may cover both edges of the plastic substrate PI in the formation area of the pad portion PD, and may protrude further than the sides of the pad portion PD.
  • the lower protective member LP may include fifth protrusions PP 5 protruding to the pad portion PD.
  • the fifth protrusions PP 5 may be disposed to overlap the edges of the plastic substrate PI.
  • the lower protective member LP may cover the entire lower surface of the plastic substrate PI, and may protrudes from all the sides of the plastic substrate PI, except for a portion to which the chip-on-films COF may be attached.
  • the upper protective member UP and the lower protective member LP protruding to the outside of the plastic substrate PI may be attached to each other using an adhesive layer, and the plastic substrate PI may be sealed, except for a portion of the pad portion PD. Further, the third protrusions PP 3 of the upper protective member UP and the fifth protrusions PP 5 of the lower protective member LP may be attached to each other.
  • the upper protective member UP and the lower protective member LP protruding to the outside of the plastic substrate PI may protrude by a particular length. For example, as shown in the FIG.
  • lengths “d” of the upper protective member UP and the lower protective member LP protruding from the side of the plastic substrate PI may be equal to or greater than, e.g., 200 ⁇ m.
  • an adhesive strength of the upper protective member UP and the lower protective member LP can increase, and the plastic substrate PI can be protected from an external impact.
  • the upper protective member UP and the lower protective member LP according to the embodiment may be disposed at both edges of the plastic substrate PI, even in the area in which the pad portion PD may be formed. Hence, even when the impact is applied to the edges of the plastic substrate PI, the upper protective member UP and the lower protective member LP according to the embodiment can prevent the plastic substrate PI from being torn out in the formation area of the pad portion PD.
  • the upper protective member UP and the lower protective member LP may completely cover the plastic substrate PI so that most of the plastic substrate PI is not exposed to the outside, except for the formation area of the pad portion PD. Therefore, the upper protective member UP and the lower protective member LP can prevent the plastic substrate PI from being damaged by the external impact.
  • the impact may be propagated to elements inside the plastic substrate PI, causing damage of the display device.
  • embodiments may cover the sides of the plastic substrate PI using the upper protective member UP and the lower protective member LP, thereby preventing damage of the plastic substrate PI.
  • the upper protective member UP and the lower protective member LP may each have a size greater than the plastic substrate PI, and may be disposed to protrude to the outside of at least one side of the plastic substrate PI.
  • the upper protective member UP and the lower protective member LP may be disposed to cover portions between both edges of the plastic substrate PI and the chip-on-films COF in the formation area of the pad portion PD.
  • the upper protective member UP may include third protrusions PP 3 covering both edges at the side of the plastic substrate PI on which the pad portion PD is disposed, and fourth protrusions PP 4 covering the plastic substrate PI between the chip-on-films COF.
  • the fourth protrusions PP 4 may extend and protrude between the chip-on-films COF, and may be disposed to protrude to the outside of one side of the plastic substrate PI.
  • the lower protective member LP may include fifth protrusions PP 5 covering both edges at the side of the plastic substrate PI on which the pad portion PD is disposed, and sixth protrusions PP 6 covering the plastic substrate PI between the chip-on-films COF.
  • the sixth protrusions PP 6 may extend and protrude between the chip-on-films COF, and may be disposed to protrude to the outside of one side of the plastic substrate PI.
  • the upper protective member UP and the lower protective member LP may seal the plastic substrate PI so that the sides of the plastic substrate PI may not be exposed to the outside throughout the plastic substrate PI, except for a portion to which the chip-on-films COF may be attached.
  • the upper protective member UP and the lower protective member LP can prevent the plastic substrate PI positioned at the pad portion PD or the edge of the plastic substrate PI from being torn out.
  • the display device according to the second embodiment may form the lower protective member LP having a larger size than the entire lower surface of the plastic substrate PI, and may form the upper protective member UP having a larger size than the entire upper surface of the plastic substrate PI, except for a portion to which the chip-on-films COF may be attached.
  • the display device according to the second embodiment can prevent the plastic substrate PI from being damaged by the impact applied to the side of the plastic substrate PI, and can prevent the damage and the defective driving of the display device.
  • FIG. 16 is an image illustrating a display device according to an example embodiment used in an experiment.
  • FIG. 17 is an image illustrating an experiment when an impact is applied to a display device according to an example embodiment.
  • FIG. 18 is an image illustrating an experiment after an impact is applied to a display device according to an example embodiment.
  • protective members were respectively attached to an upper surface and a lower surface of a plastic substrate of a display device formed according to an example embodiment, on which an organic light-emitting diode was formed.
  • an upper protective member and a lower protective member were attached to the plastic substrate to protrude from the side of the plastic substrate by about 200 ⁇ m, and were attached to each other.
  • the distance from one side of the PI substrate to the tab bonding portion is 30 mm.
  • the display device may include the protective members, which may be respectively disposed on the upper surface and the lower surface of the plastic substrate to cover the edge of the pad portion, thereby preventing the plastic substrate from being damaged by the impact applied to the side of the plastic substrate.
  • the display device can prevent the damage and the defective driving of the display device.

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US20190165308A1 (en) * 2017-11-30 2019-05-30 Wuhan China Star Optoelectronics Semiconductor Dis Flexible display panel and flexible display
US11031573B2 (en) * 2017-11-30 2021-06-08 Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Encapsulation layer of flexible display panel and flexible display
US11237590B2 (en) * 2018-11-19 2022-02-01 Samsung Display Co., Ltd. Cover member and display device including the same
CN110579916A (zh) * 2019-08-22 2019-12-17 武汉华星光电技术有限公司 一种显示面板及其制备方法、显示装置
US11126046B2 (en) 2019-08-22 2021-09-21 Wuhan China Star Optoelectronics Technology Co., Ltd. Display panel, manufacturing method thereof, and display device

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TWI639045B (zh) 2018-10-21
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JP2018073823A (ja) 2018-05-10
KR20180045095A (ko) 2018-05-04
DE102017124796A1 (de) 2018-04-26
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US11362304B2 (en) 2022-06-14
US20200358031A1 (en) 2020-11-12

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