US20130270326A1

US20130270326A1 - Alloy formation control of transient liquid phase bonding

Info

Publication number: US20130270326A1
Application number: US13/448,632
Authority: US
Inventors: Sang Won Yoon; Koji Shiozaki
Original assignee: Toyota Motor Engineering and Manufacturing North America Inc
Current assignee: Denso Corp
Priority date: 2012-04-17
Filing date: 2012-04-17
Publication date: 2013-10-17
Also published as: US10058951B2; JP5676670B2; JP2013220476A

Abstract

A bonding structure enabling fast and reliable methods to fabricate a substantially homogeneous bondline with reduced dependency of a thickness limitation is disclosed. Also, this system creates a bondline targeted for performance in power electronics. This system is highly adaptable as various structures and fabrication options may be implemented. This enables diverse fabrication selection and creates less dependency on outside conditions. The disclosed system is at least applicable to wafer-to-wafer, die-to-wafer, die-to-substrate, or die-to-die bonding.

Description

FIELD OF THE INVENTION

The present disclosure relates to alloy formation, and more particularly, to alloy formation using transient liquid phase bonding in power electronics.

BACKGROUND

Various processes may be used to join materials together. Welding has been used in the automotive industries for years. Welding is the joining together of materials (typically metals or thermoplastics), usually by a fusion process. Design of complex components is often based on the concept of the “weakest link” limiting structural performance. The “ideal joint” would exhibit all of the characteristics of the bulk material comprising the structures being joined. Such a joint is by no means simple to produce.
The automobile fabrication process, and the elements and subsystems within, require highly reliable couplings available in relatively short production windows. Waiting hours for a bond to occur is not an option. An emphasis on the electrical properties of welds and the characteristics of the any alloys in the bond has not been a primary focus in the industry.

SUMMARY

The above needs are successfully met via the disclosed system and method. The present disclosure is generally directed to control of alloy formation via transient liquid phase bonding in power electronics. In various embodiments, a technology to improve bonding quality and fabrication reliability of bonding technologies for electronic devices is disclosed. This method is especially useful for bonding technologies generating multiple compounds (or alloys).
This disclosure describes a new bonding technique enabling fast and reliable fabrication of a substantially homogeneous bondline with reduced dependency of a thickness limitation. Stated another way, a substantially homogeneous bondline made of substantially a single alloy without a thickness limitation and excessive bonding time can be achieved using the techniques disclosed herein. A (more) suitable bondline providing better and targeted performance for power electronics may also be achieved. This system is highly adaptable as various structures and fabrication options may be implemented. This enables a diverse selection of fabrication techniques and creates less dependency on outside conditions. This process can be used over a wide field of applications. Moreover, for instance, this process can be used on any application associated with power electronics. For instance, this system is at least applicable to wafer-to-wafer, die-to-wafer, die-to-substrate, or die-to-die bonding. Moreover, this system is compatible with conventional fabrication techniques.

BRIEF DESCRIPTION OF THE DRAWINGS

The features and advantages of the embodiments of the present disclosure will become more apparent from the detailed description set forth below when taken in conjunction with the drawings. Naturally, the drawings and their associated descriptions illustrate example arrangements within the scope of the claims and do not limit the scope of the claims. Reference numbers are reused throughout the drawings to indicate correspondence between referenced elements.

FIG. 1 depicts an exemplary embodiment of transient liquid phase bonding;

FIG. 2 depicts a phase diagram of Cu—Sn TLP bonding;

FIG. 3 depicts an example of Cu—Sn TLP bonding with non-homogeneous bondlines;

FIG. 4A illustrates an exemplary embodiment of TLP bonding without altering the surface properties of the materials;

FIG. 4B illustrates an exemplary embodiment of TLP bonding comprising altered surface properties of at least one of the materials;

FIG. 5 illustrates an exemplary embodiment of a modified bondline;

FIGS. 6A-6F illustrate exemplary embodiments of two dimensional altered surface features of at least one of the materials;

FIGS. 7A-7C illustrate exemplary embodiments of three dimensional variations associated with the altered surface features;

FIGS. 8A-8C illustrate a reflow of one material into another material with surface features altered;

FIG. 9A illustrates an exemplary embodiment of a material deposition method;

FIG. 9B illustrates an exemplary embodiment of a pattern transfer deposition method; and

FIG. 9C illustrates an exemplary embodiment of a growth via catalyst method.

DETAILED DESCRIPTION

In the following detailed description, numerous specific details are set forth to provide a understanding of the present disclosure. It will be apparent, however, to one ordinarily skilled in the art that elements of the present disclosure may be practiced without some of these specific details. In other instances, well-known structures and techniques have not been shown in detail to avoid unnecessarily obscuring the present disclosure.
The present disclosure is generally directed to control of alloy formation via transient liquid phase bonding in power electronics. Transient liquid phase (TLP) bonding produces joints that have microstructural and hence mechanical properties similar to those properties of the base materials. TLP bonding differs from diffusion bonding in which diffusion occurs when a melting point depressant element from an interlayer moves into lattice and grain boundaries of the substrates at the bonding temperature. Solid state diffusional processes lead to a change of composition at the bond interface and the dissimilar interlayer melts at a lower temperature than the parent materials. Thus, a thin layer of liquid spreads along the interface to form a joint at a lower temperature than the melting point of either of the parent materials. A reduction in bonding temperature leads to solidification of the melt, and this phase can subsequently be diffused away into the parent materials by holding at bonding temperature.
In various embodiments, a system and method 100 to improve bonding quality and fabrication reliability of bonding technologies for electronic devices is disclosed. This method 100 is especially useful for bonding technologies generating multiple compounds (or alloys).
With reference to FIG. 1 according to various embodiments, the present method 100 utilizes transient liquid phase (TLP) bonding for electronics packaging. TLP bonding may be effective for high power semiconductor devices as during this process the remelting temperature (i.e., sustainable temperature) is significantly larger than the bonding temperature. TLP may be useful in may electronic devices, especially by high temperature power electronic devices, such as those made of silicon, SiC, GaN, etc.
An overview of TLP is illustrated in FIG. 1. In general, two (or multiple) materials are involved with TLP bonding. As depicted, two materials denoted as material A 50 (that has high melting temperature) and material B 75 (that has low melting temperature with respect to the melting temperature of material A 50). It should be appreciated that both material A 50 and material B 75 need not be pure in composition. As bonding temperature increases, the material B 75 begins to melt and diffuse into the material A 50, as shown at step 2 of FIG. 1. The diffused materials may sequentially react with the material B 75 and form an alloy via isothermal solidification. The solidification may continue until the bondline becomes a complete set of A+B alloy, such as depicted in step 4 of FIG. 1 (e.g., homogeneous bondline). Mechanical pressure (such as the range of several kPa to several MPa, such as from 3 kPa to 1 MPa) may applied during the TLP bonding process.
In some TLP materials, multiple A+B alloys may generate multiple compounds such as depicted in step 5 of FIG. 1 leading to the non-homogeneous bondline. This non-homogenous bondline is often considered to be non-ideal because of its non-uniformity, inconsistency, uncontrollability, and unpredictable quality, which may present problems for production. For example, copper-tin (Cu—Sn) are TLP materials that may generate multiple Cu—Sn compounds (or alloys). As both copper and tin are widely employed in power electronics materials, in various embodiments, the methods 100 of this disclosure are configured to minimize the non-homogeneous bondline generation.
In general, a particular alloy of the multiple available alloys may be more suitable for power electronics applications, due to the high power usage and high temperature generation of the power electronics, such as a conductive bondline. For example, the Cu₃Sn alloy has higher electrical conductivity as compared to Cu₆Sn₅, even though both alloys are generated during Cu—Sn TLP bonding process (Cu₃Sn corresponds to alloy B+ and Cu₆Sn₅corresponds to alloy A+). Thus, for power electronics, a target may be to utilize a process to create a homogeneous bondline made of the preferred material (e.g., Cu₃Sn alloy instead of Cu₆Sn₅). The above disclosed needs are successfully met via the disclosed system and method 100.
Copper-tin (Cu—Sn) TLP bonding has a complicated phase diagram (shown in FIG. 2) and may generate multiple composite formations. Among Cu—Sn composites (or alloys) in the figure, Cu₃Sn and Cu₆Sn₅are the most frequently observed in power electronics applications. Using previous methods, the two Cu—Sn alloys may co-exist in a bondline of die attachment of power electronics, (one example such bondline is shown in FIG. 3). The bondline shown in FIG. 3 is non-homogeneous (i.e., made of multiple materials) with an ambiguous shape. The Cu₃Sn alloy may be surrounded by the Cu₆Sn₅alloy (FIG. 3) or sandwiched by the alloy Cu₆Sn₅. Bondline quality is hard to control. Several methods to produce only a Cu₃Sn bondline have been attempted. One is reducing the thickness of Sn and the other is extending bonding time. However, both methods have problems. The first method (thinner Sn layer) is able to fabricate only a thin bondline, such as 1-5 μm, which experience more stress when exposed to high temperature compared to thick bondline. The present method may produce a bondline not limited in size, such as from 1-30 μm, or from 5 μm to 50 μm. The high temperature-induced stress, which is a general challenge in power electronics, increases the chance of damage at the bondline and thus thinning Sn is a limited approach. The second method (longer bonding time) can achieve a thicker bondline but requires long process time, which is inadequate for mass production. These approaches and problems are not limited to Cu—Sn, which is used as an example herein, and can be observed in materials that have a complex phase diagram and generate multiple alloys. For example, table 1 below illustrates a non-exhaustive list of additional conventional bonding materials.

TABLE 1

Material System	Bonding Process	Remelt Temp.

Copper - Tin	4 min at 280° C.	>415° C.
Silver - Tin	60 min at 250° C.	>600° C.
Silver - Indium	120 min at 175° C.	>880° C.
Gold - Tin	15 min at 260° C.	>278° C.
Gold - Indium	0.5 min at 200° C.	>495° C.
Nickel - Tin	6 min at 300° C.	>400° C.

In various embodiments the present system 100 may be utilized to achieve a homogeneous bondline made of a single alloy. For instance, a single alloy may be achieved based on attributes targeted to power electronics applications. One example alloy is Cu₃Sn which is more suitable in power electronics compared to other alloys, such as Cu₆Sn₅. The present system 100 may be configured to fabricate a thick bondline, which is advantageous in reducing bondline stress induced by high temperature. Also, aiding in mass production, the present system does not require long bonding time and is less depend on fabrication conditions. For instance, the bonding process of the present system 100 is between about 30 minutes to about 2 hours. The present system 100 provides excellent contact and good electrical and thermal conductivity to bonded devices, and therefore, improves device performance as well as bonding quality over prior techniques.
Multiple structures and fabrication options are proposed. Various materials may be used. Also, a pre-treatment of a material surface may be performed. This variety enables a flexible design and fabrication process and easy translation of this technology to many applications. For instance, this system and method 100 may be applied to wafer-to-wafer, die-to-wafer, die-to-substrate, or die-to-die bonding. Also, the presently disclosed technology 100 is compatible with conventional fabrication techniques.
With reference to FIGS. 4A and 4B, a conceptual view of an exemplary embodiment of the presently disclosed technology is depicted. As previously discussed, TLP may employ bonding two materials: material A 50 having a high melting temperature and material B 75 having a comparatively low melting temperature. The system 100 is configured to leverage the results of increasing the contact area between the two materials. The “wavy” surface (shown in FIG. 4B) increases the contact area more than 40% compared to the flat surface (shown in FIG. 4A). The altered surface properties, such as the wavy surface, may achieved using the processes and techniques recited herein. (See for example FIGS. 8-9).
A system 100 using a Cu—Sn is disclosed; however, an analogous method 100 can be used in other two-material TLP bonding that generates multiple alloys (such as those disclosed in table 1). For example the first material, material A 50 and the second material, material B 75, may comprise any of copper, tin, silver, indium, gold, nickel, and/or boron. The two most common alloys of Cu—Sn (Cu₃Sn and Cu₆Sn₅) may be formed in following ways. First, Cu (material A 50) reacts with Sn (material B 75) and produces the first Cu—Sn alloy, Cu₆Sn₅. This Cu₆Sn₅may react with left-over Cu 50 and form Cu₃Sn. Therefore, in various embodiments the Cu₆Sn₅is configured to have increased contact with Cu 50, which expedites the reaction between the two materials and forms Cu₃Sn more rapidly. Thus, a resultant uniform bondline of substantially only Cu₃Sn may be achieved in shorter time compared to the flat surface (FIG. 4A).
This method 100 has another advantage other than fabricating a homogeneous bondline at relatively short time. In power electronics, a bondline proving high electrical conductivity is beneficial. Cu₃Sn has higher electrical conductivity than Cu₆Sn₅and thus is generally better suited for power electronics. Stated another way, the techniques disclosed herein create a bondline made of substantially only Cu₃Sn without Cu₆Sn₅which is well suited for power electronics applications. FIG. 5 illustrates the transition from the multiple-alloy bondline to a single alloy bondline with high suitability for power electronics. The methods 100 disclosed herein are at least applicable to automotive, watercraft aerospace, nuclear, and/or electronics industries. Additionally, the methods 100 disclosed herein are at least applicable to hybrid, plug-in hybrid, and/or electrical vehicles.
As previously disclosed, the wavy surface approach of FIG. 4B is just one permutation of the available altered surface properties. Altered surface properties may be any shape. For instance, altered surface properties could follow a geometric or non-geometric pattern and/or combinations thereof. The altered surface properties may be a regular or an inconsistent pattern. For instance, a non-exhaustive listing of variations is shown in FIGS. 6 and 7. FIG. 6 depicts 2D cross-section views of the variations. The wavy surface can be series of several structures including rectangular pillars or cylinders (FIG. 6A), pyramids or chopped channels, similar to axe marks (FIG. 6B), or round bumps (FIGS. 6C and 6D). It is also possible to make a Velcro like structure (FIGS. 6E and 6F) to enhance the interface strength between material A 50 and B 75 (and/or between material A 50 and alloy of material B 75 after the alloy formation).
The arrangement of the structures may also be varied. For instance, FIG. 7 illustrates such arrangement variations of the rectangular pillars shown in FIG. 6A. The arrangement includes array of slits (FIG. 7A), grid/plaid pattern (FIG. 7B), or array of pillars (FIG. 7C). Of course, other variations shown in FIG. 7 also have the arrangement variations. For instance, a random pattern or a combination of patterns such as a combination of FIGS. 7A-7C, and/or a combination of a random pattern and one of the regular patterns such as FIGS. 7A-7C.
In various embodiments, material B 75 may be sandwiched between two sections. These two sections may both be material A 50 or be made of material A and another material having altered surface features.
In various embodiments, material A 50 and/or material B 75 may have altered surface features. For instance, applying a surface feature such as a pattern to material A 50 (having a high melting temperature) without applying a surface feature, such as a pattern, to material B 75, may be convenient for fabrication. This is because the material B 75 will be melted during TLP bonding process (FIG. 1, step 2). Thus, the melted material B 75 (for example Sn) reflows into the valley of the patterned material A (for example Cu). FIG. 8 depicts this process in greater detail.
For example, during assembly (FIG. 8A, step 1 in FIG. 1), only material A 50 has altered surface features such as a pattern, whereas material B 75 does not have an substantially altered surface feature. In response to the bonding process starting, the material B melts and reflows into the holes or valleys of material A 50 (FIG. 8B, step 2). As the bonding proceeds, the reflowed material B 75 forms the large contact structure with material A 50 (FIG. 8C, step 3).
The altered surface properties, e.g., wavy surface and/or pattern, can be fabricated in numerous ways. For instance, the altered surface properties may be by (1) etching and/or (2) deposition. In general, etching is removing unwanted areas and deposition is adding wanted area. Etching can be achieved in multiple fashions. For instance, etching can be achieved by chemical etching (usage of liquid removing material A 50), dry etching (usage of gas or plasma removing material A 50), mechanical grinding or scribing, or high energy beam etching such as laser etching. Deposition can be achieved in multiple fashions. For example, deposition can be achieved by depositing additional material A 50 through a mask using electroplating, evaporating, or supporting; pattern transfer such as nano-pattern transfer or selective bonding of material A 50; or growth of material A 50. FIGS. 9A-9C depict these deposition methods. FIG. 9A illustrates the first deposition through a mask. FIG. 9B depicts pattern transfer using a mold and pre-filled material A. FIG. 9C illustrates a patterned catalyst for material A 50 and growth of material A 50 (or capture of material A 50).
This disclosure describes a new bonding system 100 enabling fast and reliable fabrication of a homogeneous bondline with reduced dependency of thickness limitation. This system 100 is highly adaptable as various structures and fabrication options may be implemented. This enables less dependency on fabrication conditions. This process can be used over a wide field of applications. For instance, this process 100 can be used on any application associated with power electronics. For instance, this system 100 is applicable to wafer-to-wafer, die-to-wafer, die-to-substrate, or die-to-die bonding. Moreover, this system 100 is compatible with conventional fabrication techniques.
Those of ordinary skill will appreciate that the various illustrative logical blocks and process steps described in connection with the examples disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Ordinarily skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed apparatus and methods.
The steps of a method or algorithm described in connection with the examples disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an Application Specific Integrated Circuit (ASIC).
The foregoing description of the disclosed example embodiments is provided to enable any person of ordinary skill in the art to make or use the present invention. Various modifications to these examples will be readily apparent to those of ordinary skill in the art, and the principles disclosed herein may be applied to other examples without departing from the spirit or scope of the present invention. The described embodiments are to be considered in all respects only as illustrative and not restrictive and the scope of the invention is, therefore, indicated by the following claims rather than by the foregoing description. All changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.

Claims

1. A transient liquid phase bonding method for alloy formation control comprising the steps of:

altering the surface features of a first material having a higher melting temperature than a second material to increase the surface area of the first material;

positioning the first material and the second material such that the altered surface features of the first material are in contact with a surface of the second material;

starting a bonding process by raising the temperature to a bonding temperature of the second material to create partial liquid diffusion;

reacting the partially diffused material with the second material to form an alloy via isothermal solidification; and

creating a substantially homogenous bondline of the alloy at least about 5 μm thick, the bonding process lasting less than or equal to about 2 hours.

2. The transient liquid phase bonding method of claim 1, further comprising sandwichably positioning the second material between a first section of the first material and a second section of the first material.

3. The transient liquid phase bonding method of claim 1, further comprising sandwichably positioning the second material between a first material section and a third material section.

4. The transient liquid phase bonding method of claim 1, further comprising applying between about 3 kPa to about 1 MPa of compressive force to the first material and the second material.

5. The transient liquid phase bonding method of claim 1, wherein the bondline is between about 5 μm to about 50 μm.

6. The transient liquid phase bonding method of claim 1, wherein altering the surface features comprises etching at least one of the first material and the second material.

7. The transient liquid phase bonding method of claim 6, wherein the etching is achieved by at least one of chemical etching, dry etching, mechanical grinding, mechanical scribing, and high energy beam etching.

8. The transient liquid phase bonding method of claim 1, wherein altering the surface features comprises performing deposition on of the first material or the second material.

9. The transient liquid phase bonding method of claim 8, wherein the deposition is achieved by at least one of material deposition, by pattern transfer, and by growth of material.

10. The transient liquid phase bonding method of claim 1, wherein the substantially homogeneous bondline comprises a single alloy bondline having high electrical conductivity.

11. The transient liquid phase bonding method of claim 1, further comprising altering the surface features of the second material to substantially mirror the altering of the surface features of the first material.

12. The transient liquid phase bonding method of claim 1, wherein altering the surface features comprises altering the surface features in at least one of a random pattern, a regular pattern, or a combination of a regular and random pattern.

13. The transient liquid phase bonding method of claim 1, further comprising varying the type of surface feature across the face of the first material in contact with the second material.

14. The transient liquid phase bonding method of claim 1, wherein at least one of the first material and the second material are copper, tin, silver, indium, gold, nickel, and boron.

15. The transient liquid phase bonding method of claim 1, wherein the creation of the alloy is selected based upon the conductive properties of the alloy as compared with the conductive properties of other possible alloys.

16. The transient liquid phase bonding method of claim 1, wherein the bonding process is between about 30 minutes to about 2 hours.

17. The transient liquid phase bonding method of claim 1, wherein the method is used for creation of power electronics.

18. The transient liquid phase bonding method of claim 1, wherein the method is used for at least one of hybrid, plug-in hybrid, and electrical vehicles.

19. A method comprising the steps of:

sandwichably positioning the second material between a first section of the first material and a second section of the first material such that the altered surface features of the first material are in contact with a surface of the second material for transient liquid phase bonding; and

creating a substantially homogenous bondline of an alloy material at least 5 μm thick via transient liquid phase bonding in less than or equal to about 2 hours.

20. A system for creating a substantially homogenous bondline of an alloy material via transient liquid phase bonding comprising:

sandwichably positioning a second material between a first section of a first material and a second section of the first material, the surface features of at least one of the first material and the second material in contact with another material altered to increase surface area, and

via transient liquid phase bonding, creating the substantially homogenous bondline of the alloy at least 5 μm thick, the transient liquid phase bonding lasting less than or equal to about 2 hours and the alloy selected is based on the conductive properties of the alloy.